53 lines
No EOL
1.2 KiB
NASM
53 lines
No EOL
1.2 KiB
NASM
[bits 32]
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extern i686_ISR_Handler
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; cpu pushes to the stack: ss, esp, eflags, cs, eip
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%macro ISR_NOERRORCODE 1
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global i686_ISR%1:
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i686_ISR%1:
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push 0 ; push dummy error code
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push %1 ; push interrupt number
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jmp isr_common
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%endmacro
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%macro ISR_ERRORCODE 1
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global i686_ISR%1:
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i686_ISR%1:
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; cpu pushes an error code to the stack
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push %1 ; push interrupt number
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jmp isr_common
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%endmacro
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%include "arch/i686/isrs_gen.inc"
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isr_common:
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pusha ; pushes in order: eax, ecx, edx, ebx, esp, ebp, esi, edi
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xor eax, eax ; push ds
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mov ax, ds
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push eax
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mov ax, 0x10 ; use kernel data segment
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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push esp ; pass pointer to stack to C, so we can access all the pushed information
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call i686_ISR_Handler
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add esp, 4
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pop eax ; restore old segment
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mov ds, ax
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mov es, ax
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mov fs, ax
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mov gs, ax
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popa ; pop what we pushed with pusha
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add esp, 8 ; remove error code and interrupt number
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iret ; will pop: cs, eip, eflags, ss, esp |