485 lines
15 KiB
C
485 lines
15 KiB
C
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/*
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* QEMU PAPR Storage Class Memory Interfaces
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*
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* Copyright (c) 2019-2020, IBM Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/ppc/spapr_drc.h"
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#include "hw/ppc/spapr_nvdimm.h"
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#include "hw/mem/nvdimm.h"
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#include "qemu/nvdimm-utils.h"
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#include "hw/ppc/fdt.h"
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#include "qemu/range.h"
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void spapr_nvdimm_validate_opts(NVDIMMDevice *nvdimm, uint64_t size,
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Error **errp)
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{
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char *uuidstr = NULL;
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QemuUUID uuid;
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int ret;
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if (object_property_get_int(OBJECT(nvdimm), NVDIMM_LABEL_SIZE_PROP,
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&error_abort) == 0) {
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error_setg(errp, "PAPR requires NVDIMM devices to have label-size set");
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return;
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}
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if (size % SPAPR_MINIMUM_SCM_BLOCK_SIZE) {
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error_setg(errp, "PAPR requires NVDIMM memory size (excluding label)"
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" to be a multiple of %" PRIu64 "MB",
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SPAPR_MINIMUM_SCM_BLOCK_SIZE / MiB);
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return;
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}
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uuidstr = object_property_get_str(OBJECT(nvdimm), NVDIMM_UUID_PROP,
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&error_abort);
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ret = qemu_uuid_parse(uuidstr, &uuid);
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g_assert(!ret);
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g_free(uuidstr);
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if (qemu_uuid_is_null(&uuid)) {
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error_setg(errp, "NVDIMM device requires the uuid to be set");
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return;
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}
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}
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void spapr_add_nvdimm(DeviceState *dev, uint64_t slot, Error **errp)
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{
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SpaprDrc *drc;
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bool hotplugged = spapr_drc_hotplugged(dev);
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Error *local_err = NULL;
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drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot);
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g_assert(drc);
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spapr_drc_attach(drc, dev, &local_err);
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if (local_err) {
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error_propagate(errp, local_err);
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return;
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}
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if (hotplugged) {
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spapr_hotplug_req_add_by_index(drc);
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}
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}
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int spapr_pmem_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr,
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void *fdt, int *fdt_start_offset, Error **errp)
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{
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NVDIMMDevice *nvdimm = NVDIMM(drc->dev);
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*fdt_start_offset = spapr_dt_nvdimm(fdt, 0, nvdimm);
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return 0;
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}
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void spapr_create_nvdimm_dr_connectors(SpaprMachineState *spapr)
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{
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MachineState *machine = MACHINE(spapr);
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int i;
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for (i = 0; i < machine->ram_slots; i++) {
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spapr_dr_connector_new(OBJECT(spapr), TYPE_SPAPR_DRC_PMEM, i);
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}
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}
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int spapr_dt_nvdimm(void *fdt, int parent_offset,
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NVDIMMDevice *nvdimm)
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{
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int child_offset;
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char *buf;
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SpaprDrc *drc;
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uint32_t drc_idx;
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uint32_t node = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_NODE_PROP,
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&error_abort);
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uint64_t slot = object_property_get_uint(OBJECT(nvdimm), PC_DIMM_SLOT_PROP,
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&error_abort);
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uint32_t associativity[] = {
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cpu_to_be32(0x4), /* length */
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cpu_to_be32(0x0), cpu_to_be32(0x0),
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cpu_to_be32(0x0), cpu_to_be32(node)
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};
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uint64_t lsize = nvdimm->label_size;
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uint64_t size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
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NULL);
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drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PMEM, slot);
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g_assert(drc);
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drc_idx = spapr_drc_index(drc);
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buf = g_strdup_printf("ibm,pmemory@%x", drc_idx);
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child_offset = fdt_add_subnode(fdt, parent_offset, buf);
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g_free(buf);
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_FDT(child_offset);
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_FDT((fdt_setprop_cell(fdt, child_offset, "reg", drc_idx)));
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_FDT((fdt_setprop_string(fdt, child_offset, "compatible", "ibm,pmemory")));
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_FDT((fdt_setprop_string(fdt, child_offset, "device_type", "ibm,pmemory")));
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_FDT((fdt_setprop(fdt, child_offset, "ibm,associativity", associativity,
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sizeof(associativity))));
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buf = qemu_uuid_unparse_strdup(&nvdimm->uuid);
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_FDT((fdt_setprop_string(fdt, child_offset, "ibm,unit-guid", buf)));
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g_free(buf);
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_FDT((fdt_setprop_cell(fdt, child_offset, "ibm,my-drc-index", drc_idx)));
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_FDT((fdt_setprop_u64(fdt, child_offset, "ibm,block-size",
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SPAPR_MINIMUM_SCM_BLOCK_SIZE)));
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_FDT((fdt_setprop_u64(fdt, child_offset, "ibm,number-of-blocks",
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size / SPAPR_MINIMUM_SCM_BLOCK_SIZE)));
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_FDT((fdt_setprop_cell(fdt, child_offset, "ibm,metadata-size", lsize)));
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_FDT((fdt_setprop_string(fdt, child_offset, "ibm,pmem-application",
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"operating-system")));
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_FDT(fdt_setprop(fdt, child_offset, "ibm,cache-flush-required", NULL, 0));
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return child_offset;
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}
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void spapr_dt_persistent_memory(void *fdt)
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{
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int offset = fdt_subnode_offset(fdt, 0, "persistent-memory");
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GSList *iter, *nvdimms = nvdimm_get_device_list();
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if (offset < 0) {
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offset = fdt_add_subnode(fdt, 0, "persistent-memory");
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_FDT(offset);
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_FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0x1)));
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_FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 0x0)));
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_FDT((fdt_setprop_string(fdt, offset, "device_type",
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"ibm,persistent-memory")));
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}
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/* Create DT entries for cold plugged NVDIMM devices */
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for (iter = nvdimms; iter; iter = iter->next) {
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NVDIMMDevice *nvdimm = iter->data;
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spapr_dt_nvdimm(fdt, offset, nvdimm);
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}
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g_slist_free(nvdimms);
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return;
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}
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static target_ulong h_scm_read_metadata(PowerPCCPU *cpu,
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SpaprMachineState *spapr,
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target_ulong opcode,
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target_ulong *args)
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{
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uint32_t drc_index = args[0];
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uint64_t offset = args[1];
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uint64_t len = args[2];
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SpaprDrc *drc = spapr_drc_by_index(drc_index);
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NVDIMMDevice *nvdimm;
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NVDIMMClass *ddc;
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uint64_t data = 0;
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uint8_t buf[8] = { 0 };
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if (!drc || !drc->dev ||
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spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
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return H_PARAMETER;
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}
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if (len != 1 && len != 2 &&
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len != 4 && len != 8) {
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return H_P3;
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}
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nvdimm = NVDIMM(drc->dev);
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if ((offset + len < offset) ||
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(nvdimm->label_size < len + offset)) {
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return H_P2;
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}
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ddc = NVDIMM_GET_CLASS(nvdimm);
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ddc->read_label_data(nvdimm, buf, len, offset);
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switch (len) {
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case 1:
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data = ldub_p(buf);
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break;
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case 2:
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data = lduw_be_p(buf);
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break;
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case 4:
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data = ldl_be_p(buf);
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break;
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case 8:
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data = ldq_be_p(buf);
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break;
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default:
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g_assert_not_reached();
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}
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args[0] = data;
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return H_SUCCESS;
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}
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static target_ulong h_scm_write_metadata(PowerPCCPU *cpu,
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SpaprMachineState *spapr,
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target_ulong opcode,
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target_ulong *args)
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{
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uint32_t drc_index = args[0];
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uint64_t offset = args[1];
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uint64_t data = args[2];
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uint64_t len = args[3];
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SpaprDrc *drc = spapr_drc_by_index(drc_index);
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NVDIMMDevice *nvdimm;
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NVDIMMClass *ddc;
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uint8_t buf[8] = { 0 };
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if (!drc || !drc->dev ||
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spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
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return H_PARAMETER;
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}
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if (len != 1 && len != 2 &&
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len != 4 && len != 8) {
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return H_P4;
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}
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nvdimm = NVDIMM(drc->dev);
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if ((offset + len < offset) ||
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(nvdimm->label_size < len + offset)) {
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return H_P2;
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}
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switch (len) {
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case 1:
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if (data & 0xffffffffffffff00) {
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return H_P2;
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}
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stb_p(buf, data);
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break;
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case 2:
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if (data & 0xffffffffffff0000) {
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return H_P2;
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}
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stw_be_p(buf, data);
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break;
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case 4:
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if (data & 0xffffffff00000000) {
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return H_P2;
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}
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stl_be_p(buf, data);
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break;
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case 8:
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stq_be_p(buf, data);
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break;
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default:
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g_assert_not_reached();
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}
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ddc = NVDIMM_GET_CLASS(nvdimm);
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ddc->write_label_data(nvdimm, buf, len, offset);
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return H_SUCCESS;
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}
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static target_ulong h_scm_bind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr,
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target_ulong opcode, target_ulong *args)
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{
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uint32_t drc_index = args[0];
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uint64_t starting_idx = args[1];
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uint64_t no_of_scm_blocks_to_bind = args[2];
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uint64_t target_logical_mem_addr = args[3];
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uint64_t continue_token = args[4];
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uint64_t size;
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uint64_t total_no_of_scm_blocks;
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SpaprDrc *drc = spapr_drc_by_index(drc_index);
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hwaddr addr;
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NVDIMMDevice *nvdimm;
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if (!drc || !drc->dev ||
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spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
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return H_PARAMETER;
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}
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/*
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* Currently continue token should be zero qemu has already bound
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* everything and this hcall doesnt return H_BUSY.
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*/
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if (continue_token > 0) {
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return H_P5;
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}
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/* Currently qemu assigns the address. */
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if (target_logical_mem_addr != 0xffffffffffffffff) {
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return H_OVERLAP;
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}
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nvdimm = NVDIMM(drc->dev);
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size = object_property_get_uint(OBJECT(nvdimm),
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PC_DIMM_SIZE_PROP, &error_abort);
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total_no_of_scm_blocks = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE;
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if (starting_idx > total_no_of_scm_blocks) {
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return H_P2;
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}
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if (((starting_idx + no_of_scm_blocks_to_bind) < starting_idx) ||
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((starting_idx + no_of_scm_blocks_to_bind) > total_no_of_scm_blocks)) {
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return H_P3;
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}
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addr = object_property_get_uint(OBJECT(nvdimm),
|
||
|
|
PC_DIMM_ADDR_PROP, &error_abort);
|
||
|
|
|
||
|
|
addr += starting_idx * SPAPR_MINIMUM_SCM_BLOCK_SIZE;
|
||
|
|
|
||
|
|
/* Already bound, Return target logical address in R5 */
|
||
|
|
args[1] = addr;
|
||
|
|
args[2] = no_of_scm_blocks_to_bind;
|
||
|
|
|
||
|
|
return H_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
static target_ulong h_scm_unbind_mem(PowerPCCPU *cpu, SpaprMachineState *spapr,
|
||
|
|
target_ulong opcode, target_ulong *args)
|
||
|
|
{
|
||
|
|
uint32_t drc_index = args[0];
|
||
|
|
uint64_t starting_scm_logical_addr = args[1];
|
||
|
|
uint64_t no_of_scm_blocks_to_unbind = args[2];
|
||
|
|
uint64_t continue_token = args[3];
|
||
|
|
uint64_t size_to_unbind;
|
||
|
|
Range blockrange = range_empty;
|
||
|
|
Range nvdimmrange = range_empty;
|
||
|
|
SpaprDrc *drc = spapr_drc_by_index(drc_index);
|
||
|
|
NVDIMMDevice *nvdimm;
|
||
|
|
uint64_t size, addr;
|
||
|
|
|
||
|
|
if (!drc || !drc->dev ||
|
||
|
|
spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
|
||
|
|
return H_PARAMETER;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* continue_token should be zero as this hcall doesn't return H_BUSY. */
|
||
|
|
if (continue_token > 0) {
|
||
|
|
return H_P4;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Check if starting_scm_logical_addr is block aligned */
|
||
|
|
if (!QEMU_IS_ALIGNED(starting_scm_logical_addr,
|
||
|
|
SPAPR_MINIMUM_SCM_BLOCK_SIZE)) {
|
||
|
|
return H_P2;
|
||
|
|
}
|
||
|
|
|
||
|
|
size_to_unbind = no_of_scm_blocks_to_unbind * SPAPR_MINIMUM_SCM_BLOCK_SIZE;
|
||
|
|
if (no_of_scm_blocks_to_unbind == 0 || no_of_scm_blocks_to_unbind !=
|
||
|
|
size_to_unbind / SPAPR_MINIMUM_SCM_BLOCK_SIZE) {
|
||
|
|
return H_P3;
|
||
|
|
}
|
||
|
|
|
||
|
|
nvdimm = NVDIMM(drc->dev);
|
||
|
|
size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
|
||
|
|
&error_abort);
|
||
|
|
addr = object_property_get_int(OBJECT(nvdimm), PC_DIMM_ADDR_PROP,
|
||
|
|
&error_abort);
|
||
|
|
|
||
|
|
range_init_nofail(&nvdimmrange, addr, size);
|
||
|
|
range_init_nofail(&blockrange, starting_scm_logical_addr, size_to_unbind);
|
||
|
|
|
||
|
|
if (!range_contains_range(&nvdimmrange, &blockrange)) {
|
||
|
|
return H_P3;
|
||
|
|
}
|
||
|
|
|
||
|
|
args[1] = no_of_scm_blocks_to_unbind;
|
||
|
|
|
||
|
|
/* let unplug take care of actual unbind */
|
||
|
|
return H_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
#define H_UNBIND_SCOPE_ALL 0x1
|
||
|
|
#define H_UNBIND_SCOPE_DRC 0x2
|
||
|
|
|
||
|
|
static target_ulong h_scm_unbind_all(PowerPCCPU *cpu, SpaprMachineState *spapr,
|
||
|
|
target_ulong opcode, target_ulong *args)
|
||
|
|
{
|
||
|
|
uint64_t target_scope = args[0];
|
||
|
|
uint32_t drc_index = args[1];
|
||
|
|
uint64_t continue_token = args[2];
|
||
|
|
NVDIMMDevice *nvdimm;
|
||
|
|
uint64_t size;
|
||
|
|
uint64_t no_of_scm_blocks_unbound = 0;
|
||
|
|
|
||
|
|
/* continue_token should be zero as this hcall doesn't return H_BUSY. */
|
||
|
|
if (continue_token > 0) {
|
||
|
|
return H_P4;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (target_scope == H_UNBIND_SCOPE_DRC) {
|
||
|
|
SpaprDrc *drc = spapr_drc_by_index(drc_index);
|
||
|
|
|
||
|
|
if (!drc || !drc->dev ||
|
||
|
|
spapr_drc_type(drc) != SPAPR_DR_CONNECTOR_TYPE_PMEM) {
|
||
|
|
return H_P2;
|
||
|
|
}
|
||
|
|
|
||
|
|
nvdimm = NVDIMM(drc->dev);
|
||
|
|
size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
|
||
|
|
&error_abort);
|
||
|
|
|
||
|
|
no_of_scm_blocks_unbound = size / SPAPR_MINIMUM_SCM_BLOCK_SIZE;
|
||
|
|
} else if (target_scope == H_UNBIND_SCOPE_ALL) {
|
||
|
|
GSList *list, *nvdimms;
|
||
|
|
|
||
|
|
nvdimms = nvdimm_get_device_list();
|
||
|
|
for (list = nvdimms; list; list = list->next) {
|
||
|
|
nvdimm = list->data;
|
||
|
|
size = object_property_get_int(OBJECT(nvdimm), PC_DIMM_SIZE_PROP,
|
||
|
|
&error_abort);
|
||
|
|
|
||
|
|
no_of_scm_blocks_unbound += size / SPAPR_MINIMUM_SCM_BLOCK_SIZE;
|
||
|
|
}
|
||
|
|
g_slist_free(nvdimms);
|
||
|
|
} else {
|
||
|
|
return H_PARAMETER;
|
||
|
|
}
|
||
|
|
|
||
|
|
args[1] = no_of_scm_blocks_unbound;
|
||
|
|
|
||
|
|
/* let unplug take care of actual unbind */
|
||
|
|
return H_SUCCESS;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void spapr_scm_register_types(void)
|
||
|
|
{
|
||
|
|
/* qemu/scm specific hcalls */
|
||
|
|
spapr_register_hypercall(H_SCM_READ_METADATA, h_scm_read_metadata);
|
||
|
|
spapr_register_hypercall(H_SCM_WRITE_METADATA, h_scm_write_metadata);
|
||
|
|
spapr_register_hypercall(H_SCM_BIND_MEM, h_scm_bind_mem);
|
||
|
|
spapr_register_hypercall(H_SCM_UNBIND_MEM, h_scm_unbind_mem);
|
||
|
|
spapr_register_hypercall(H_SCM_UNBIND_ALL, h_scm_unbind_all);
|
||
|
|
}
|
||
|
|
|
||
|
|
type_init(spapr_scm_register_types)
|