108 lines
3.1 KiB
C
108 lines
3.1 KiB
C
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/*
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* QEMU lowRISC Ibex UART device
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*
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* Copyright (c) 2020 Western Digital
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HW_IBEX_UART_H
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#define HW_IBEX_UART_H
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#include "hw/sysbus.h"
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#include "hw/registerfields.h"
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#include "chardev/char-fe.h"
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#include "qemu/timer.h"
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REG32(INTR_STATE, 0x00)
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FIELD(INTR_STATE, TX_WATERMARK, 0, 1)
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FIELD(INTR_STATE, RX_WATERMARK, 1, 1)
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FIELD(INTR_STATE, TX_EMPTY, 2, 1)
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FIELD(INTR_STATE, RX_OVERFLOW, 3, 1)
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REG32(INTR_ENABLE, 0x04)
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REG32(INTR_TEST, 0x08)
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REG32(CTRL, 0x0C)
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FIELD(CTRL, TX_ENABLE, 0, 1)
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FIELD(CTRL, RX_ENABLE, 1, 1)
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FIELD(CTRL, NF, 2, 1)
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FIELD(CTRL, SLPBK, 4, 1)
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FIELD(CTRL, LLPBK, 5, 1)
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FIELD(CTRL, PARITY_EN, 6, 1)
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FIELD(CTRL, PARITY_ODD, 7, 1)
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FIELD(CTRL, RXBLVL, 8, 2)
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FIELD(CTRL, NCO, 16, 16)
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REG32(STATUS, 0x10)
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FIELD(STATUS, TXFULL, 0, 1)
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FIELD(STATUS, RXFULL, 1, 1)
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FIELD(STATUS, TXEMPTY, 2, 1)
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FIELD(STATUS, RXIDLE, 4, 1)
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FIELD(STATUS, RXEMPTY, 5, 1)
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REG32(RDATA, 0x14)
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REG32(WDATA, 0x18)
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REG32(FIFO_CTRL, 0x1c)
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FIELD(FIFO_CTRL, RXRST, 0, 1)
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FIELD(FIFO_CTRL, TXRST, 1, 1)
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FIELD(FIFO_CTRL, RXILVL, 2, 3)
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FIELD(FIFO_CTRL, TXILVL, 5, 2)
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REG32(FIFO_STATUS, 0x20)
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REG32(OVRD, 0x24)
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REG32(VAL, 0x28)
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REG32(TIMEOUT_CTRL, 0x2c)
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#define IBEX_UART_TX_FIFO_SIZE 16
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#define IBEX_UART_CLOCK 50000000 /* 50MHz clock */
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#define TYPE_IBEX_UART "ibex-uart"
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#define IBEX_UART(obj) \
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OBJECT_CHECK(IbexUartState, (obj), TYPE_IBEX_UART)
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typedef struct {
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/* <private> */
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SysBusDevice parent_obj;
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/* <public> */
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MemoryRegion mmio;
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uint8_t tx_fifo[IBEX_UART_TX_FIFO_SIZE];
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uint32_t tx_level;
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QEMUTimer *fifo_trigger_handle;
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uint64_t char_tx_time;
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uint32_t uart_intr_state;
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uint32_t uart_intr_enable;
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uint32_t uart_ctrl;
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uint32_t uart_status;
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uint32_t uart_rdata;
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uint32_t uart_fifo_ctrl;
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uint32_t uart_fifo_status;
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uint32_t uart_ovrd;
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uint32_t uart_val;
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uint32_t uart_timeout_ctrl;
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Clock *f_clk;
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CharBackend chr;
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qemu_irq tx_watermark;
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qemu_irq rx_watermark;
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qemu_irq tx_empty;
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qemu_irq rx_overflow;
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} IbexUartState;
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#endif /* HW_IBEX_UART_H */
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