historical/m0-applesillicon.git/xnu-qemu-arm64-5.1.0/include/hw/i386/apic-msidef.h

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2024-01-16 11:20:27 -06:00
#ifndef HW_APIC_MSIDEF_H
#define HW_APIC_MSIDEF_H
/*
* Intel APIC constants: from include/asm/msidef.h
*/
/*
* Shifts for MSI data
*/
#define MSI_DATA_VECTOR_SHIFT 0
#define MSI_DATA_VECTOR_MASK 0x000000ff
#define MSI_DATA_DELIVERY_MODE_SHIFT 8
#define MSI_DATA_LEVEL_SHIFT 14
#define MSI_DATA_TRIGGER_SHIFT 15
/*
* Shift/mask fields for msi address
*/
#define MSI_ADDR_DEST_MODE_SHIFT 2
#define MSI_ADDR_REDIRECTION_SHIFT 3
#define MSI_ADDR_DEST_ID_SHIFT 12
#define MSI_ADDR_DEST_IDX_SHIFT 4
#define MSI_ADDR_DEST_ID_MASK 0x000ff000
#endif /* HW_APIC_MSIDEF_H */