133 lines
4.1 KiB
C
133 lines
4.1 KiB
C
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/*
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* Copyright (c) 2019 Red Hat, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HW_I386_X86_H
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#define HW_I386_X86_H
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#include "qemu-common.h"
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#include "exec/hwaddr.h"
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#include "qemu/notify.h"
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#include "hw/i386/topology.h"
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#include "hw/boards.h"
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#include "hw/nmi.h"
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#include "hw/isa/isa.h"
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#include "hw/i386/ioapic.h"
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typedef struct {
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/*< private >*/
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MachineClass parent;
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/*< public >*/
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/* TSC rate migration: */
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bool save_tsc_khz;
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/* Enables contiguous-apic-ID mode */
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bool compat_apic_id_mode;
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} X86MachineClass;
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typedef struct {
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/*< private >*/
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MachineState parent;
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/*< public >*/
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/* Pointers to devices and objects: */
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ISADevice *rtc;
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FWCfgState *fw_cfg;
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qemu_irq *gsi;
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GMappedFile *initrd_mapped_file;
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/* RAM information (sizes, addresses, configuration): */
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ram_addr_t below_4g_mem_size, above_4g_mem_size;
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/* CPU and apic information: */
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bool apic_xrupt_override;
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unsigned apic_id_limit;
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uint16_t boot_cpus;
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unsigned smp_dies;
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OnOffAuto smm;
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OnOffAuto acpi;
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/* Apic id specific handlers */
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uint32_t (*apicid_from_cpu_idx)(X86CPUTopoInfo *topo_info,
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unsigned cpu_index);
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void (*topo_ids_from_apicid)(apic_id_t apicid, X86CPUTopoInfo *topo_info,
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X86CPUTopoIDs *topo_ids);
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apic_id_t (*apicid_from_topo_ids)(X86CPUTopoInfo *topo_info,
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const X86CPUTopoIDs *topo_ids);
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uint32_t (*apicid_pkg_offset)(X86CPUTopoInfo *topo_info);
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/*
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* Address space used by IOAPIC device. All IOAPIC interrupts
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* will be translated to MSI messages in the address space.
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*/
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AddressSpace *ioapic_as;
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} X86MachineState;
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#define X86_MACHINE_SMM "smm"
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#define X86_MACHINE_ACPI "acpi"
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#define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86")
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#define X86_MACHINE(obj) \
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OBJECT_CHECK(X86MachineState, (obj), TYPE_X86_MACHINE)
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#define X86_MACHINE_GET_CLASS(obj) \
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OBJECT_GET_CLASS(X86MachineClass, obj, TYPE_X86_MACHINE)
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#define X86_MACHINE_CLASS(class) \
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OBJECT_CLASS_CHECK(X86MachineClass, class, TYPE_X86_MACHINE)
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void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms);
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uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms,
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unsigned int cpu_index);
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void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp);
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void x86_cpus_init(X86MachineState *pcms, int default_cpu_version);
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CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms,
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unsigned cpu_index);
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int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx);
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const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms);
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void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw);
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void x86_load_linux(X86MachineState *x86ms,
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FWCfgState *fw_cfg,
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int acpi_data_size,
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bool pvh_enabled,
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bool linuxboot_dma_enabled);
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bool x86_machine_is_smm_enabled(X86MachineState *x86ms);
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bool x86_machine_is_acpi_enabled(X86MachineState *x86ms);
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/* Global System Interrupts */
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#define GSI_NUM_PINS IOAPIC_NUM_PINS
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typedef struct GSIState {
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qemu_irq i8259_irq[ISA_NUM_IRQS];
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qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
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} GSIState;
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qemu_irq x86_allocate_cpu_irq(void);
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void gsi_handler(void *opaque, int n, int level);
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void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
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/* hpet.c */
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extern int no_hpet;
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#endif
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