343 lines
8.1 KiB
C
343 lines
8.1 KiB
C
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/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_locks.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_ecall.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_hartmask.h>
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#include <sbi/sbi_hsm.h>
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#include <sbi/sbi_ipi.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_system.h>
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#include <sbi/sbi_timer.h>
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#include <sbi/sbi_tlb.h>
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#include <sbi/sbi_version.h>
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#define BANNER \
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" ____ _____ ____ _____\n" \
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" / __ \\ / ____| _ \\_ _|\n" \
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" | | | |_ __ ___ _ __ | (___ | |_) || |\n" \
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" | | | | '_ \\ / _ \\ '_ \\ \\___ \\| _ < | |\n" \
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" | |__| | |_) | __/ | | |____) | |_) || |_\n" \
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" \\____/| .__/ \\___|_| |_|_____/|____/_____|\n" \
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" | |\n" \
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" |_|\n\n"
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static void sbi_boot_prints(struct sbi_scratch *scratch, u32 hartid)
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{
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int xlen;
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char str[64];
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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#ifdef OPENSBI_VERSION_GIT
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sbi_printf("\nOpenSBI %s\n", OPENSBI_VERSION_GIT);
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#else
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sbi_printf("\nOpenSBI v%d.%d\n", OPENSBI_VERSION_MAJOR,
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OPENSBI_VERSION_MINOR);
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#endif
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sbi_printf(BANNER);
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/* Determine MISA XLEN and MISA string */
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xlen = misa_xlen();
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if (xlen < 1) {
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sbi_printf("Error %d getting MISA XLEN\n", xlen);
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sbi_hart_hang();
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}
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xlen = 16 * (1 << xlen);
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misa_string(str, sizeof(str));
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/* Platform details */
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sbi_printf("Platform Name : %s\n", sbi_platform_name(plat));
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sbi_printf("Platform HART Features : RV%d%s\n", xlen, str);
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sbi_printf("Current Hart : %u\n", hartid);
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/* Firmware details */
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sbi_printf("Firmware Base : 0x%lx\n", scratch->fw_start);
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sbi_printf("Firmware Size : %d KB\n",
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(u32)(scratch->fw_size / 1024));
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/* Generic details */
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sbi_printf("Runtime SBI Version : %d.%d\n",
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sbi_ecall_version_major(), sbi_ecall_version_minor());
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sbi_printf("\n");
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sbi_hart_delegation_dump(scratch);
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sbi_hart_pmp_dump(scratch);
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}
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static spinlock_t coldboot_lock = SPIN_LOCK_INITIALIZER;
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static unsigned long coldboot_done = 0;
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static struct sbi_hartmask coldboot_wait_hmask = { 0 };
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static void wait_for_coldboot(struct sbi_scratch *scratch, u32 hartid)
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{
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unsigned long saved_mie, cmip;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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/* Save MIE CSR */
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saved_mie = csr_read(CSR_MIE);
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/* Set MSIE bit to receive IPI */
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csr_set(CSR_MIE, MIP_MSIP);
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/* Acquire coldboot lock */
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spin_lock(&coldboot_lock);
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/* Mark current HART as waiting */
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sbi_hartmask_set_hart(hartid, &coldboot_wait_hmask);
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/* Wait for coldboot to finish using WFI */
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while (!coldboot_done) {
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spin_unlock(&coldboot_lock);
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do {
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wfi();
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cmip = csr_read(CSR_MIP);
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} while (!(cmip & MIP_MSIP));
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spin_lock(&coldboot_lock);
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};
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/* Unmark current HART as waiting */
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sbi_hartmask_clear_hart(hartid, &coldboot_wait_hmask);
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/* Release coldboot lock */
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spin_unlock(&coldboot_lock);
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/* Restore MIE CSR */
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csr_write(CSR_MIE, saved_mie);
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/* Clear current HART IPI */
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sbi_platform_ipi_clear(plat, hartid);
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}
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static void wake_coldboot_harts(struct sbi_scratch *scratch, u32 hartid)
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{
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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/* Acquire coldboot lock */
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spin_lock(&coldboot_lock);
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/* Mark coldboot done */
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coldboot_done = 1;
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/* Send an IPI to all HARTs waiting for coldboot */
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for (int i = 0; i <= sbi_scratch_last_hartid(); i++) {
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if ((i != hartid) &&
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sbi_hartmask_test_hart(i, &coldboot_wait_hmask))
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sbi_platform_ipi_send(plat, i);
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}
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/* Release coldboot lock */
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spin_unlock(&coldboot_lock);
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}
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static unsigned long init_count_offset;
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static void __noreturn init_coldboot(struct sbi_scratch *scratch, u32 hartid)
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{
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int rc;
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unsigned long *init_count;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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/* Note: This has to be first thing in coldboot init sequence */
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rc = sbi_scratch_init(scratch);
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if (rc)
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sbi_hart_hang();
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init_count_offset = sbi_scratch_alloc_offset(__SIZEOF_POINTER__,
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"INIT_COUNT");
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if (!init_count_offset)
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sbi_hart_hang();
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rc = sbi_hsm_init(scratch, hartid, TRUE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_platform_early_init(plat, TRUE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_hart_init(scratch, hartid, TRUE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_console_init(scratch);
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if (rc)
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sbi_hart_hang();
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rc = sbi_platform_irqchip_init(plat, TRUE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_ipi_init(scratch, TRUE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_tlb_init(scratch, TRUE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_timer_init(scratch, TRUE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_ecall_init();
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if (rc)
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sbi_hart_hang();
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rc = sbi_platform_final_init(plat, TRUE);
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if (rc)
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sbi_hart_hang();
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if (!(scratch->options & SBI_SCRATCH_NO_BOOT_PRINTS))
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sbi_boot_prints(scratch, hartid);
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wake_coldboot_harts(scratch, hartid);
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init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
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(*init_count)++;
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sbi_hsm_prepare_next_jump(scratch, hartid);
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sbi_hart_switch_mode(hartid, scratch->next_arg1, scratch->next_addr,
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scratch->next_mode, FALSE);
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}
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static void __noreturn init_warmboot(struct sbi_scratch *scratch, u32 hartid)
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{
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int rc;
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unsigned long *init_count;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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wait_for_coldboot(scratch, hartid);
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if (!init_count_offset)
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sbi_hart_hang();
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rc = sbi_hsm_init(scratch, hartid, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_platform_early_init(plat, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_hart_init(scratch, hartid, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_platform_irqchip_init(plat, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_ipi_init(scratch, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_tlb_init(scratch, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_timer_init(scratch, FALSE);
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if (rc)
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sbi_hart_hang();
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rc = sbi_platform_final_init(plat, FALSE);
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if (rc)
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sbi_hart_hang();
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init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
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(*init_count)++;
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sbi_hsm_prepare_next_jump(scratch, hartid);
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sbi_hart_switch_mode(hartid, scratch->next_arg1,
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scratch->next_addr,
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scratch->next_mode, FALSE);
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}
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static atomic_t coldboot_lottery = ATOMIC_INITIALIZER(0);
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/**
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* Initialize OpenSBI library for current HART and jump to next
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* booting stage.
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*
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* The function expects following:
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* 1. The 'mscratch' CSR is pointing to sbi_scratch of current HART
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* 2. Stack pointer (SP) is setup for current HART
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* 3. Interrupts are disabled in MSTATUS CSR
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* 4. All interrupts are disabled in MIE CSR
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*
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* @param scratch pointer to sbi_scratch of current HART
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*/
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void __noreturn sbi_init(struct sbi_scratch *scratch)
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{
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bool coldboot = FALSE;
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u32 hartid = current_hartid();
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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if ((SBI_HARTMASK_MAX_BITS <= hartid) ||
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sbi_platform_hart_invalid(plat, hartid))
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sbi_hart_hang();
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if (atomic_xchg(&coldboot_lottery, 1) == 0)
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coldboot = TRUE;
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if (coldboot)
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init_coldboot(scratch, hartid);
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else
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init_warmboot(scratch, hartid);
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}
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unsigned long sbi_init_count(u32 hartid)
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{
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struct sbi_scratch *scratch;
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unsigned long *init_count;
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if (!init_count_offset)
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return 0;
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scratch = sbi_hartid_to_scratch(hartid);
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if (!scratch)
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return 0;
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init_count = sbi_scratch_offset_ptr(scratch, init_count_offset);
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return *init_count;
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}
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/**
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* Exit OpenSBI library for current HART and stop HART
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*
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* The function expects following:
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* 1. The 'mscratch' CSR is pointing to sbi_scratch of current HART
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* 2. Stack pointer (SP) is setup for current HART
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*
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* @param scratch pointer to sbi_scratch of current HART
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*/
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void __noreturn sbi_exit(struct sbi_scratch *scratch)
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{
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u32 hartid = current_hartid();
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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if (sbi_platform_hart_invalid(plat, hartid))
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sbi_hart_hang();
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sbi_platform_early_exit(plat);
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sbi_timer_exit(scratch);
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sbi_ipi_exit(scratch);
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sbi_platform_irqchip_exit(plat);
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sbi_platform_final_exit(plat);
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sbi_hsm_exit(scratch);
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}
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