375 lines
12 KiB
C
375 lines
12 KiB
C
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/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef VMCS_H
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#define VMCS_H
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#include <Hypervisor/hv.h>
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#include <Hypervisor/hv_vmx.h>
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#define VMCS_INITIAL 0xffffffffffffffff
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#define VMCS_IDENT(encoding) ((encoding) | 0x80000000)
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/*
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* VMCS field encodings from Appendix H, Intel Architecture Manual Vol3B.
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*/
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#define VMCS_INVALID_ENCODING 0xffffffff
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/* 16-bit control fields */
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#define VMCS_VPID 0x00000000
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#define VMCS_PIR_VECTOR 0x00000002
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/* 16-bit guest-state fields */
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#define VMCS_GUEST_ES_SELECTOR 0x00000800
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#define VMCS_GUEST_CS_SELECTOR 0x00000802
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#define VMCS_GUEST_SS_SELECTOR 0x00000804
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#define VMCS_GUEST_DS_SELECTOR 0x00000806
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#define VMCS_GUEST_FS_SELECTOR 0x00000808
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#define VMCS_GUEST_GS_SELECTOR 0x0000080A
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#define VMCS_GUEST_LDTR_SELECTOR 0x0000080C
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#define VMCS_GUEST_TR_SELECTOR 0x0000080E
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#define VMCS_GUEST_INTR_STATUS 0x00000810
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/* 16-bit host-state fields */
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#define VMCS_HOST_ES_SELECTOR 0x00000C00
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#define VMCS_HOST_CS_SELECTOR 0x00000C02
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#define VMCS_HOST_SS_SELECTOR 0x00000C04
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#define VMCS_HOST_DS_SELECTOR 0x00000C06
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#define VMCS_HOST_FS_SELECTOR 0x00000C08
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#define VMCS_HOST_GS_SELECTOR 0x00000C0A
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#define VMCS_HOST_TR_SELECTOR 0x00000C0C
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/* 64-bit control fields */
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#define VMCS_IO_BITMAP_A 0x00002000
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#define VMCS_IO_BITMAP_B 0x00002002
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#define VMCS_MSR_BITMAP 0x00002004
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#define VMCS_EXIT_MSR_STORE 0x00002006
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#define VMCS_EXIT_MSR_LOAD 0x00002008
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#define VMCS_ENTRY_MSR_LOAD 0x0000200A
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#define VMCS_EXECUTIVE_VMCS 0x0000200C
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#define VMCS_TSC_OFFSET 0x00002010
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#define VMCS_VIRTUAL_APIC 0x00002012
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#define VMCS_APIC_ACCESS 0x00002014
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#define VMCS_PIR_DESC 0x00002016
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#define VMCS_EPTP 0x0000201A
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#define VMCS_EOI_EXIT0 0x0000201C
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#define VMCS_EOI_EXIT1 0x0000201E
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#define VMCS_EOI_EXIT2 0x00002020
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#define VMCS_EOI_EXIT3 0x00002022
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#define VMCS_EOI_EXIT(vector) (VMCS_EOI_EXIT0 + ((vector) / 64) * 2)
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/* 64-bit read-only fields */
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#define VMCS_GUEST_PHYSICAL_ADDRESS 0x00002400
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/* 64-bit guest-state fields */
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#define VMCS_LINK_POINTER 0x00002800
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#define VMCS_GUEST_IA32_DEBUGCTL 0x00002802
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#define VMCS_GUEST_IA32_PAT 0x00002804
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#define VMCS_GUEST_IA32_EFER 0x00002806
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#define VMCS_GUEST_IA32_PERF_GLOBAL_CTRL 0x00002808
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#define VMCS_GUEST_PDPTE0 0x0000280A
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#define VMCS_GUEST_PDPTE1 0x0000280C
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#define VMCS_GUEST_PDPTE2 0x0000280E
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#define VMCS_GUEST_PDPTE3 0x00002810
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/* 64-bit host-state fields */
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#define VMCS_HOST_IA32_PAT 0x00002C00
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#define VMCS_HOST_IA32_EFER 0x00002C02
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#define VMCS_HOST_IA32_PERF_GLOBAL_CTRL 0x00002C04
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/* 32-bit control fields */
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#define VMCS_PIN_BASED_CTLS 0x00004000
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#define VMCS_PRI_PROC_BASED_CTLS 0x00004002
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#define VMCS_EXCEPTION_BITMAP 0x00004004
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#define VMCS_PF_ERROR_MASK 0x00004006
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#define VMCS_PF_ERROR_MATCH 0x00004008
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#define VMCS_CR3_TARGET_COUNT 0x0000400A
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#define VMCS_EXIT_CTLS 0x0000400C
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#define VMCS_EXIT_MSR_STORE_COUNT 0x0000400E
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#define VMCS_EXIT_MSR_LOAD_COUNT 0x00004010
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#define VMCS_ENTRY_CTLS 0x00004012
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#define VMCS_ENTRY_MSR_LOAD_COUNT 0x00004014
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#define VMCS_ENTRY_INTR_INFO 0x00004016
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#define VMCS_ENTRY_EXCEPTION_ERROR 0x00004018
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#define VMCS_ENTRY_INST_LENGTH 0x0000401A
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#define VMCS_TPR_THRESHOLD 0x0000401C
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#define VMCS_SEC_PROC_BASED_CTLS 0x0000401E
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#define VMCS_PLE_GAP 0x00004020
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#define VMCS_PLE_WINDOW 0x00004022
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/* 32-bit read-only data fields */
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#define VMCS_INSTRUCTION_ERROR 0x00004400
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#define VMCS_EXIT_REASON 0x00004402
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#define VMCS_EXIT_INTR_INFO 0x00004404
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#define VMCS_EXIT_INTR_ERRCODE 0x00004406
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#define VMCS_IDT_VECTORING_INFO 0x00004408
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#define VMCS_IDT_VECTORING_ERROR 0x0000440A
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#define VMCS_EXIT_INSTRUCTION_LENGTH 0x0000440C
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#define VMCS_EXIT_INSTRUCTION_INFO 0x0000440E
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/* 32-bit guest-state fields */
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#define VMCS_GUEST_ES_LIMIT 0x00004800
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#define VMCS_GUEST_CS_LIMIT 0x00004802
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#define VMCS_GUEST_SS_LIMIT 0x00004804
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#define VMCS_GUEST_DS_LIMIT 0x00004806
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#define VMCS_GUEST_FS_LIMIT 0x00004808
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#define VMCS_GUEST_GS_LIMIT 0x0000480A
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#define VMCS_GUEST_LDTR_LIMIT 0x0000480C
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#define VMCS_GUEST_TR_LIMIT 0x0000480E
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#define VMCS_GUEST_GDTR_LIMIT 0x00004810
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#define VMCS_GUEST_IDTR_LIMIT 0x00004812
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#define VMCS_GUEST_ES_ACCESS_RIGHTS 0x00004814
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#define VMCS_GUEST_CS_ACCESS_RIGHTS 0x00004816
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#define VMCS_GUEST_SS_ACCESS_RIGHTS 0x00004818
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#define VMCS_GUEST_DS_ACCESS_RIGHTS 0x0000481A
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#define VMCS_GUEST_FS_ACCESS_RIGHTS 0x0000481C
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#define VMCS_GUEST_GS_ACCESS_RIGHTS 0x0000481E
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#define VMCS_GUEST_LDTR_ACCESS_RIGHTS 0x00004820
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#define VMCS_GUEST_TR_ACCESS_RIGHTS 0x00004822
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#define VMCS_GUEST_INTERRUPTIBILITY 0x00004824
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#define VMCS_GUEST_ACTIVITY 0x00004826
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#define VMCS_GUEST_SMBASE 0x00004828
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#define VMCS_GUEST_IA32_SYSENTER_CS 0x0000482A
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#define VMCS_PREEMPTION_TIMER_VALUE 0x0000482E
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/* 32-bit host state fields */
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#define VMCS_HOST_IA32_SYSENTER_CS 0x00004C00
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/* Natural Width control fields */
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#define VMCS_CR0_MASK 0x00006000
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#define VMCS_CR4_MASK 0x00006002
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#define VMCS_CR0_SHADOW 0x00006004
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#define VMCS_CR4_SHADOW 0x00006006
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#define VMCS_CR3_TARGET0 0x00006008
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#define VMCS_CR3_TARGET1 0x0000600A
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#define VMCS_CR3_TARGET2 0x0000600C
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#define VMCS_CR3_TARGET3 0x0000600E
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/* Natural Width read-only fields */
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#define VMCS_EXIT_QUALIFICATION 0x00006400
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#define VMCS_IO_RCX 0x00006402
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#define VMCS_IO_RSI 0x00006404
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#define VMCS_IO_RDI 0x00006406
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#define VMCS_IO_RIP 0x00006408
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#define VMCS_GUEST_LINEAR_ADDRESS 0x0000640A
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/* Natural Width guest-state fields */
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#define VMCS_GUEST_CR0 0x00006800
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#define VMCS_GUEST_CR3 0x00006802
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#define VMCS_GUEST_CR4 0x00006804
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#define VMCS_GUEST_ES_BASE 0x00006806
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#define VMCS_GUEST_CS_BASE 0x00006808
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#define VMCS_GUEST_SS_BASE 0x0000680A
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#define VMCS_GUEST_DS_BASE 0x0000680C
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#define VMCS_GUEST_FS_BASE 0x0000680E
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#define VMCS_GUEST_GS_BASE 0x00006810
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#define VMCS_GUEST_LDTR_BASE 0x00006812
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#define VMCS_GUEST_TR_BASE 0x00006814
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#define VMCS_GUEST_GDTR_BASE 0x00006816
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#define VMCS_GUEST_IDTR_BASE 0x00006818
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#define VMCS_GUEST_DR7 0x0000681A
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#define VMCS_GUEST_RSP 0x0000681C
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#define VMCS_GUEST_RIP 0x0000681E
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#define VMCS_GUEST_RFLAGS 0x00006820
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#define VMCS_GUEST_PENDING_DBG_EXCEPTIONS 0x00006822
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#define VMCS_GUEST_IA32_SYSENTER_ESP 0x00006824
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#define VMCS_GUEST_IA32_SYSENTER_EIP 0x00006826
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/* Natural Width host-state fields */
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#define VMCS_HOST_CR0 0x00006C00
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#define VMCS_HOST_CR3 0x00006C02
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#define VMCS_HOST_CR4 0x00006C04
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#define VMCS_HOST_FS_BASE 0x00006C06
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#define VMCS_HOST_GS_BASE 0x00006C08
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#define VMCS_HOST_TR_BASE 0x00006C0A
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#define VMCS_HOST_GDTR_BASE 0x00006C0C
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#define VMCS_HOST_IDTR_BASE 0x00006C0E
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#define VMCS_HOST_IA32_SYSENTER_ESP 0x00006C10
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#define VMCS_HOST_IA32_SYSENTER_EIP 0x00006C12
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#define VMCS_HOST_RSP 0x00006C14
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#define VMCS_HOST_RIP 0x00006c16
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/*
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* VM instruction error numbers
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*/
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#define VMRESUME_WITH_NON_LAUNCHED_VMCS 5
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/*
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* VMCS exit reasons
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*/
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#define EXIT_REASON_EXCEPTION 0
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#define EXIT_REASON_EXT_INTR 1
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#define EXIT_REASON_TRIPLE_FAULT 2
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#define EXIT_REASON_INIT 3
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#define EXIT_REASON_SIPI 4
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#define EXIT_REASON_IO_SMI 5
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#define EXIT_REASON_SMI 6
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#define EXIT_REASON_INTR_WINDOW 7
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#define EXIT_REASON_NMI_WINDOW 8
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#define EXIT_REASON_TASK_SWITCH 9
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#define EXIT_REASON_CPUID 10
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#define EXIT_REASON_GETSEC 11
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#define EXIT_REASON_HLT 12
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#define EXIT_REASON_INVD 13
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#define EXIT_REASON_INVLPG 14
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#define EXIT_REASON_RDPMC 15
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#define EXIT_REASON_RDTSC 16
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#define EXIT_REASON_RSM 17
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#define EXIT_REASON_VMCALL 18
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#define EXIT_REASON_VMCLEAR 19
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#define EXIT_REASON_VMLAUNCH 20
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#define EXIT_REASON_VMPTRLD 21
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#define EXIT_REASON_VMPTRST 22
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#define EXIT_REASON_VMREAD 23
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#define EXIT_REASON_VMRESUME 24
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#define EXIT_REASON_VMWRITE 25
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#define EXIT_REASON_VMXOFF 26
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#define EXIT_REASON_VMXON 27
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#define EXIT_REASON_CR_ACCESS 28
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#define EXIT_REASON_DR_ACCESS 29
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#define EXIT_REASON_INOUT 30
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#define EXIT_REASON_RDMSR 31
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#define EXIT_REASON_WRMSR 32
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#define EXIT_REASON_INVAL_VMCS 33
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#define EXIT_REASON_INVAL_MSR 34
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#define EXIT_REASON_MWAIT 36
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#define EXIT_REASON_MTF 37
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#define EXIT_REASON_MONITOR 39
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#define EXIT_REASON_PAUSE 40
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#define EXIT_REASON_MCE_DURING_ENTR 41
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#define EXIT_REASON_TPR 43
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#define EXIT_REASON_APIC_ACCESS 44
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#define EXIT_REASON_VIRTUALIZED_EOI 45
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#define EXIT_REASON_GDTR_IDTR 46
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#define EXIT_REASON_LDTR_TR 47
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#define EXIT_REASON_EPT_FAULT 48
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#define EXIT_REASON_EPT_MISCONFIG 49
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#define EXIT_REASON_INVEPT 50
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#define EXIT_REASON_RDTSCP 51
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#define EXIT_REASON_VMX_PREEMPT 52
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#define EXIT_REASON_INVVPID 53
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#define EXIT_REASON_WBINVD 54
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#define EXIT_REASON_XSETBV 55
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#define EXIT_REASON_APIC_WRITE 56
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/*
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* NMI unblocking due to IRET.
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*
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* Applies to VM-exits due to hardware exception or EPT fault.
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*/
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#define EXIT_QUAL_NMIUDTI (1 << 12)
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/*
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* VMCS interrupt information fields
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*/
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#define VMCS_INTR_VALID (1U << 31)
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#define VMCS_INTR_T_MASK 0x700 /* Interruption-info type */
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#define VMCS_INTR_T_HWINTR (0 << 8)
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#define VMCS_INTR_T_NMI (2 << 8)
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#define VMCS_INTR_T_HWEXCEPTION (3 << 8)
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#define VMCS_INTR_T_SWINTR (4 << 8)
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#define VMCS_INTR_T_PRIV_SWEXCEPTION (5 << 8)
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#define VMCS_INTR_T_SWEXCEPTION (6 << 8)
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#define VMCS_INTR_DEL_ERRCODE (1 << 11)
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/*
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* VMCS IDT-Vectoring information fields
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*/
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#define VMCS_IDT_VEC_VECNUM 0xFF
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#define VMCS_IDT_VEC_VALID (1U << 31)
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|
|
#define VMCS_IDT_VEC_TYPE 0x700
|
||
|
|
#define VMCS_IDT_VEC_ERRCODE_VALID (1U << 11)
|
||
|
|
#define VMCS_IDT_VEC_HWINTR (0 << 8)
|
||
|
|
#define VMCS_IDT_VEC_NMI (2 << 8)
|
||
|
|
#define VMCS_IDT_VEC_HWEXCEPTION (3 << 8)
|
||
|
|
#define VMCS_IDT_VEC_SWINTR (4 << 8)
|
||
|
|
#define VMCS_IDT_VEC_PRIV_SWEXCEPTION (5 << 8)
|
||
|
|
#define VMCS_IDT_VEC_SWEXCEPTION (6 << 8)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* VMCS Guest interruptibility field
|
||
|
|
*/
|
||
|
|
#define VMCS_INTERRUPTIBILITY_STI_BLOCKING (1 << 0)
|
||
|
|
#define VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING (1 << 1)
|
||
|
|
#define VMCS_INTERRUPTIBILITY_SMI_BLOCKING (1 << 2)
|
||
|
|
#define VMCS_INTERRUPTIBILITY_NMI_BLOCKING (1 << 3)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Exit qualification for EXIT_REASON_INVAL_VMCS
|
||
|
|
*/
|
||
|
|
#define EXIT_QUAL_NMI_WHILE_STI_BLOCKING 3
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Exit qualification for EPT violation
|
||
|
|
*/
|
||
|
|
#define EPT_VIOLATION_DATA_READ (1UL << 0)
|
||
|
|
#define EPT_VIOLATION_DATA_WRITE (1UL << 1)
|
||
|
|
#define EPT_VIOLATION_INST_FETCH (1UL << 2)
|
||
|
|
#define EPT_VIOLATION_GPA_READABLE (1UL << 3)
|
||
|
|
#define EPT_VIOLATION_GPA_WRITEABLE (1UL << 4)
|
||
|
|
#define EPT_VIOLATION_GPA_EXECUTABLE (1UL << 5)
|
||
|
|
#define EPT_VIOLATION_GLA_VALID (1UL << 7)
|
||
|
|
#define EPT_VIOLATION_XLAT_VALID (1UL << 8)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Exit qualification for APIC-access VM exit
|
||
|
|
*/
|
||
|
|
#define APIC_ACCESS_OFFSET(qual) ((qual) & 0xFFF)
|
||
|
|
#define APIC_ACCESS_TYPE(qual) (((qual) >> 12) & 0xF)
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Exit qualification for APIC-write VM exit
|
||
|
|
*/
|
||
|
|
#define APIC_WRITE_OFFSET(qual) ((qual) & 0xFFF)
|
||
|
|
|
||
|
|
#define VMCS_PIN_BASED_CTLS_EXTINT (1 << 0)
|
||
|
|
#define VMCS_PIN_BASED_CTLS_NMI (1 << 3)
|
||
|
|
#define VMCS_PIN_BASED_CTLS_VNMI (1 << 5)
|
||
|
|
|
||
|
|
#define VMCS_PRI_PROC_BASED_CTLS_INT_WINDOW_EXITING (1 << 2)
|
||
|
|
#define VMCS_PRI_PROC_BASED_CTLS_TSC_OFFSET (1 << 3)
|
||
|
|
#define VMCS_PRI_PROC_BASED_CTLS_HLT (1 << 7)
|
||
|
|
#define VMCS_PRI_PROC_BASED_CTLS_MWAIT (1 << 10)
|
||
|
|
#define VMCS_PRI_PROC_BASED_CTLS_TSC (1 << 12)
|
||
|
|
#define VMCS_PRI_PROC_BASED_CTLS_CR8_LOAD (1 << 19)
|
||
|
|
#define VMCS_PRI_PROC_BASED_CTLS_CR8_STORE (1 << 20)
|
||
|
|
#define VMCS_PRI_PROC_BASED_CTLS_TPR_SHADOW (1 << 21)
|
||
|
|
#define VMCS_PRI_PROC_BASED_CTLS_NMI_WINDOW_EXITING (1 << 22)
|
||
|
|
#define VMCS_PRI_PROC_BASED_CTLS_SEC_CONTROL (1 << 31)
|
||
|
|
|
||
|
|
#define VMCS_PRI_PROC_BASED2_CTLS_APIC_ACCESSES (1 << 0)
|
||
|
|
#define VMCS_PRI_PROC_BASED2_CTLS_X2APIC (1 << 4)
|
||
|
|
|
||
|
|
enum task_switch_reason {
|
||
|
|
TSR_CALL,
|
||
|
|
TSR_IRET,
|
||
|
|
TSR_JMP,
|
||
|
|
TSR_IDT_GATE, /* task gate in IDT */
|
||
|
|
};
|
||
|
|
|
||
|
|
#endif
|