254 lines
8 KiB
C
254 lines
8 KiB
C
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/*
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* Xilinx ZynqMP ZCU102 board
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*
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* Copyright (C) 2015 Xilinx Inc
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* Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "cpu.h"
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#include "hw/arm/xlnx-zynqmp.h"
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#include "hw/boards.h"
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#include "qemu/error-report.h"
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#include "qemu/log.h"
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#include "sysemu/qtest.h"
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#include "sysemu/device_tree.h"
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typedef struct XlnxZCU102 {
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MachineState parent_obj;
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XlnxZynqMPState soc;
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bool secure;
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bool virt;
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struct arm_boot_info binfo;
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} XlnxZCU102;
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#define TYPE_ZCU102_MACHINE MACHINE_TYPE_NAME("xlnx-zcu102")
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#define ZCU102_MACHINE(obj) \
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OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE)
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static bool zcu102_get_secure(Object *obj, Error **errp)
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{
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XlnxZCU102 *s = ZCU102_MACHINE(obj);
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return s->secure;
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}
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static void zcu102_set_secure(Object *obj, bool value, Error **errp)
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{
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XlnxZCU102 *s = ZCU102_MACHINE(obj);
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s->secure = value;
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}
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static bool zcu102_get_virt(Object *obj, Error **errp)
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{
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XlnxZCU102 *s = ZCU102_MACHINE(obj);
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return s->virt;
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}
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static void zcu102_set_virt(Object *obj, bool value, Error **errp)
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{
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XlnxZCU102 *s = ZCU102_MACHINE(obj);
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s->virt = value;
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}
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static void zcu102_modify_dtb(const struct arm_boot_info *binfo, void *fdt)
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{
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XlnxZCU102 *s = container_of(binfo, XlnxZCU102, binfo);
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bool method_is_hvc;
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char **node_path;
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const char *r;
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int prop_len;
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int i;
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/* If EL3 is enabled, we keep all firmware nodes active. */
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if (!s->secure) {
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node_path = qemu_fdt_node_path(fdt, NULL, "xlnx,zynqmp-firmware",
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&error_fatal);
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for (i = 0; node_path && node_path[i]; i++) {
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r = qemu_fdt_getprop(fdt, node_path[i], "method", &prop_len, NULL);
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method_is_hvc = r && !strcmp("hvc", r);
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/* Allow HVC based firmware if EL2 is enabled. */
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if (method_is_hvc && s->virt) {
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continue;
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}
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qemu_fdt_setprop_string(fdt, node_path[i], "status", "disabled");
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}
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g_strfreev(node_path);
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}
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}
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static void xlnx_zcu102_init(MachineState *machine)
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{
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XlnxZCU102 *s = ZCU102_MACHINE(machine);
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int i;
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uint64_t ram_size = machine->ram_size;
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/* Create the memory region to pass to the SoC */
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if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) {
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error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of "
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"0x%llx", ram_size,
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XLNX_ZYNQMP_MAX_RAM_SIZE);
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exit(1);
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}
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if (ram_size < 0x08000000) {
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qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102",
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ram_size);
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}
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object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_XLNX_ZYNQMP);
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object_property_set_link(OBJECT(&s->soc), "ddr-ram", OBJECT(machine->ram),
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&error_abort);
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object_property_set_bool(OBJECT(&s->soc), "secure", s->secure,
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&error_fatal);
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object_property_set_bool(OBJECT(&s->soc), "virtualization", s->virt,
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&error_fatal);
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qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);
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/* Create and plug in the SD cards */
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for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
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BusState *bus;
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DriveInfo *di = drive_get_next(IF_SD);
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BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
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DeviceState *carddev;
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char *bus_name;
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bus_name = g_strdup_printf("sd-bus%d", i);
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bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
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g_free(bus_name);
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if (!bus) {
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error_report("No SD bus found for SD card %d", i);
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exit(1);
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}
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carddev = qdev_new(TYPE_SD_CARD);
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qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
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qdev_realize_and_unref(carddev, bus, &error_fatal);
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}
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for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
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BusState *spi_bus;
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DeviceState *flash_dev;
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qemu_irq cs_line;
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DriveInfo *dinfo = drive_get_next(IF_MTD);
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gchar *bus_name = g_strdup_printf("spi%d", i);
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spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
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g_free(bus_name);
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flash_dev = qdev_new("sst25wf080");
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if (dinfo) {
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qdev_prop_set_drive_err(flash_dev, "drive",
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blk_by_legacy_dinfo(dinfo), &error_fatal);
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}
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qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal);
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cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
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}
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for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) {
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BusState *spi_bus;
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DeviceState *flash_dev;
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qemu_irq cs_line;
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DriveInfo *dinfo = drive_get_next(IF_MTD);
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int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS;
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gchar *bus_name = g_strdup_printf("qspi%d", bus);
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spi_bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
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g_free(bus_name);
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flash_dev = qdev_new("n25q512a11");
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if (dinfo) {
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qdev_prop_set_drive_err(flash_dev, "drive",
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blk_by_legacy_dinfo(dinfo), &error_fatal);
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}
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qdev_realize_and_unref(flash_dev, spi_bus, &error_fatal);
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cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line);
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}
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/* TODO create and connect IDE devices for ide_drive_get() */
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s->binfo.ram_size = ram_size;
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s->binfo.loader_start = 0;
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s->binfo.modify_dtb = zcu102_modify_dtb;
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arm_load_kernel(s->soc.boot_cpu_ptr, machine, &s->binfo);
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}
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static void xlnx_zcu102_machine_instance_init(Object *obj)
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{
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XlnxZCU102 *s = ZCU102_MACHINE(obj);
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/* Default to secure mode being disabled */
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s->secure = false;
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object_property_add_bool(obj, "secure", zcu102_get_secure,
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zcu102_set_secure);
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object_property_set_description(obj, "secure",
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"Set on/off to enable/disable the ARM "
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"Security Extensions (TrustZone)");
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/* Default to virt (EL2) being disabled */
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s->virt = false;
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object_property_add_bool(obj, "virtualization", zcu102_get_virt,
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zcu102_set_virt);
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object_property_set_description(obj, "virtualization",
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"Set on/off to enable/disable emulating a "
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"guest CPU which implements the ARM "
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"Virtualization Extensions");
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}
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static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \
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"the value of smp";
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mc->init = xlnx_zcu102_init;
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mc->block_default_type = IF_IDE;
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mc->units_per_default_bus = 1;
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mc->ignore_memory_transaction_failures = true;
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mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
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mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS;
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mc->default_ram_id = "ddr-ram";
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}
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static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
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.name = MACHINE_TYPE_NAME("xlnx-zcu102"),
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.parent = TYPE_MACHINE,
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.class_init = xlnx_zcu102_machine_class_init,
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.instance_init = xlnx_zcu102_machine_instance_init,
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.instance_size = sizeof(XlnxZCU102),
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};
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static void xlnx_zcu102_machine_init_register_types(void)
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{
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type_register_static(&xlnx_zcu102_machine_init_typeinfo);
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}
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type_init(xlnx_zcu102_machine_init_register_types)
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