361 lines
12 KiB
C
361 lines
12 KiB
C
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/*
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* QEMU Leon3 System Emulator
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*
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* Copyright (c) 2010-2019 AdaCore
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "qemu/error-report.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "hw/irq.h"
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#include "qemu/timer.h"
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#include "hw/ptimer.h"
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#include "hw/qdev-properties.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/qtest.h"
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#include "sysemu/reset.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "elf.h"
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#include "trace.h"
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#include "exec/address-spaces.h"
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#include "hw/sparc/grlib.h"
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#include "hw/misc/grlib_ahb_apb_pnp.h"
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/* Default system clock. */
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#define CPU_CLK (40 * 1000 * 1000)
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#define LEON3_PROM_FILENAME "u-boot.bin"
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#define LEON3_PROM_OFFSET (0x00000000)
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#define LEON3_RAM_OFFSET (0x40000000)
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#define MAX_PILS 16
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#define LEON3_UART_OFFSET (0x80000100)
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#define LEON3_UART_IRQ (3)
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#define LEON3_IRQMP_OFFSET (0x80000200)
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#define LEON3_TIMER_OFFSET (0x80000300)
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#define LEON3_TIMER_IRQ (6)
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#define LEON3_TIMER_COUNT (2)
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#define LEON3_APB_PNP_OFFSET (0x800FF000)
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#define LEON3_AHB_PNP_OFFSET (0xFFFFF000)
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typedef struct ResetData {
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SPARCCPU *cpu;
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uint32_t entry; /* save kernel entry in case of reset */
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target_ulong sp; /* initial stack pointer */
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} ResetData;
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static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val)
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{
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stl_p(code++, 0x82100000); /* mov %g0, %g1 */
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stl_p(code++, 0x84100000); /* mov %g0, %g2 */
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stl_p(code++, 0x03000000 +
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extract32(addr, 10, 22));
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/* sethi %hi(addr), %g1 */
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stl_p(code++, 0x82106000 +
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extract32(addr, 0, 10));
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/* or %g1, addr, %g1 */
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stl_p(code++, 0x05000000 +
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extract32(val, 10, 22));
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/* sethi %hi(val), %g2 */
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stl_p(code++, 0x8410a000 +
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extract32(val, 0, 10));
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/* or %g2, val, %g2 */
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stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ] */
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return code;
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}
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/*
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* When loading a kernel in RAM the machine is expected to be in a different
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* state (eg: initialized by the bootloader). This little code reproduces
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* this behavior.
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*/
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static void write_bootloader(CPUSPARCState *env, uint8_t *base,
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hwaddr kernel_addr)
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{
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uint32_t *p = (uint32_t *) base;
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/* Initialize the UARTs */
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/* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */
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p = gen_store_u32(p, 0x80000108, 3);
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/* Initialize the TIMER 0 */
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/* *GPTIMER_SCALER_RELOAD = 40 - 1; */
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p = gen_store_u32(p, 0x80000304, 39);
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/* *GPTIMER0_COUNTER_RELOAD = 0xFFFE; */
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p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE);
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/* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART; */
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p = gen_store_u32(p, 0x80000318, 3);
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/* JUMP to the entry point */
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stl_p(p++, 0x82100000); /* mov %g0, %g1 */
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stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22));
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/* sethi %hi(kernel_addr), %g1 */
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stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10));
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/* or kernel_addr, %g1 */
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stl_p(p++, 0x81c04000); /* jmp %g1 */
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stl_p(p++, 0x01000000); /* nop */
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}
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static void main_cpu_reset(void *opaque)
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{
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ResetData *s = (ResetData *)opaque;
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CPUState *cpu = CPU(s->cpu);
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CPUSPARCState *env = &s->cpu->env;
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cpu_reset(cpu);
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cpu->halted = 0;
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env->pc = s->entry;
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env->npc = s->entry + 4;
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env->regbase[6] = s->sp;
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}
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void leon3_irq_ack(void *irq_manager, int intno)
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{
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grlib_irqmp_ack((DeviceState *)irq_manager, intno);
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}
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/*
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* This device assumes that the incoming 'level' value on the
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* qemu_irq is the interrupt number, not just a simple 0/1 level.
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*/
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static void leon3_set_pil_in(void *opaque, int n, int level)
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{
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CPUSPARCState *env = opaque;
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uint32_t pil_in = level;
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CPUState *cs;
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assert(env != NULL);
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env->pil_in = pil_in;
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if (env->pil_in && (env->interrupt_index == 0 ||
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(env->interrupt_index & ~15) == TT_EXTINT)) {
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unsigned int i;
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for (i = 15; i > 0; i--) {
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if (env->pil_in & (1 << i)) {
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int old_interrupt = env->interrupt_index;
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env->interrupt_index = TT_EXTINT | i;
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if (old_interrupt != env->interrupt_index) {
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cs = env_cpu(env);
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trace_leon3_set_irq(i);
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cpu_interrupt(cs, CPU_INTERRUPT_HARD);
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}
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break;
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}
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}
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} else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) {
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cs = env_cpu(env);
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trace_leon3_reset_irq(env->interrupt_index & 15);
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env->interrupt_index = 0;
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cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
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}
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}
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static void leon3_generic_hw_init(MachineState *machine)
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{
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ram_addr_t ram_size = machine->ram_size;
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const char *kernel_filename = machine->kernel_filename;
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SPARCCPU *cpu;
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CPUSPARCState *env;
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *prom = g_new(MemoryRegion, 1);
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int ret;
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char *filename;
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qemu_irq *cpu_irqs = NULL;
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int bios_size;
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int prom_size;
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ResetData *reset_info;
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DeviceState *dev;
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int i;
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AHBPnp *ahb_pnp;
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APBPnp *apb_pnp;
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/* Init CPU */
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cpu = SPARC_CPU(cpu_create(machine->cpu_type));
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env = &cpu->env;
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cpu_sparc_set_id(env, 0);
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/* Reset data */
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reset_info = g_malloc0(sizeof(ResetData));
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reset_info->cpu = cpu;
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reset_info->sp = LEON3_RAM_OFFSET + ram_size;
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qemu_register_reset(main_cpu_reset, reset_info);
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ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP));
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sysbus_realize_and_unref(SYS_BUS_DEVICE(ahb_pnp), &error_fatal);
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sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET);
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grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER,
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GRLIB_LEON3_DEV, GRLIB_AHB_MASTER,
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GRLIB_CPU_AREA);
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apb_pnp = GRLIB_APB_PNP(qdev_new(TYPE_GRLIB_APB_PNP));
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sysbus_realize_and_unref(SYS_BUS_DEVICE(apb_pnp), &error_fatal);
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sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET);
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grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF,
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GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV,
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GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA);
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/* Allocate IRQ manager */
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dev = qdev_new(TYPE_GRLIB_IRQMP);
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qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in,
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env, "pil", 1);
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qdev_connect_gpio_out_named(dev, "grlib-irq", 0,
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qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0));
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET);
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env->irq_manager = dev;
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env->qemu_irq_ack = leon3_irq_manager;
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cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq, dev, MAX_PILS);
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grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF,
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GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV,
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2, 0, GRLIB_APBIO_AREA);
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/* Allocate RAM */
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if (ram_size > 1 * GiB) {
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error_report("Too much memory for this machine: %" PRId64 "MB,"
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" maximum 1G",
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ram_size / MiB);
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exit(1);
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}
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memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET,
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machine->ram);
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/* Allocate BIOS */
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prom_size = 8 * MiB;
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memory_region_init_rom(prom, NULL, "Leon3.bios", prom_size, &error_fatal);
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memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom);
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/* Load boot prom */
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if (bios_name == NULL) {
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bios_name = LEON3_PROM_FILENAME;
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}
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
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if (filename) {
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bios_size = get_image_size(filename);
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} else {
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bios_size = -1;
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}
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if (bios_size > prom_size) {
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error_report("could not load prom '%s': file too big", filename);
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exit(1);
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}
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if (bios_size > 0) {
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ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size);
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if (ret < 0 || ret > prom_size) {
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error_report("could not load prom '%s'", filename);
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exit(1);
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}
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} else if (kernel_filename == NULL && !qtest_enabled()) {
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error_report("Can't read bios image '%s'", filename
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? filename
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: LEON3_PROM_FILENAME);
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exit(1);
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}
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g_free(filename);
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/* Can directly load an application. */
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if (kernel_filename != NULL) {
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long kernel_size;
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uint64_t entry;
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kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
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&entry, NULL, NULL, NULL,
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1 /* big endian */, EM_SPARC, 0, 0);
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if (kernel_size < 0) {
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kernel_size = load_uimage(kernel_filename, NULL, &entry,
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NULL, NULL, NULL);
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}
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if (kernel_size < 0) {
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error_report("could not load kernel '%s'", kernel_filename);
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exit(1);
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}
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if (bios_size <= 0) {
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/*
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* If there is no bios/monitor just start the application but put
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* the machine in an initialized state through a little
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* bootloader.
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*/
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uint8_t *bootloader_entry;
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bootloader_entry = memory_region_get_ram_ptr(prom);
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write_bootloader(env, bootloader_entry, entry);
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env->pc = LEON3_PROM_OFFSET;
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env->npc = LEON3_PROM_OFFSET + 4;
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reset_info->entry = LEON3_PROM_OFFSET;
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}
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}
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/* Allocate timers */
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dev = qdev_new(TYPE_GRLIB_GPTIMER);
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qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT);
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qdev_prop_set_uint32(dev, "frequency", CPU_CLK);
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qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET);
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for (i = 0; i < LEON3_TIMER_COUNT; i++) {
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sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
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cpu_irqs[LEON3_TIMER_IRQ + i]);
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}
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grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF,
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||
|
|
GRLIB_VENDOR_GAISLER, GRLIB_GPTIMER_DEV,
|
||
|
|
0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA);
|
||
|
|
|
||
|
|
/* Allocate uart */
|
||
|
|
dev = qdev_new(TYPE_GRLIB_APB_UART);
|
||
|
|
qdev_prop_set_chr(dev, "chrdev", serial_hd(0));
|
||
|
|
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
|
||
|
|
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET);
|
||
|
|
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]);
|
||
|
|
grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF,
|
||
|
|
GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1,
|
||
|
|
LEON3_UART_IRQ, GRLIB_APBIO_AREA);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void leon3_generic_machine_init(MachineClass *mc)
|
||
|
|
{
|
||
|
|
mc->desc = "Leon-3 generic";
|
||
|
|
mc->init = leon3_generic_hw_init;
|
||
|
|
mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3");
|
||
|
|
mc->default_ram_id = "leon3.ram";
|
||
|
|
}
|
||
|
|
|
||
|
|
DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)
|