497 lines
16 KiB
C
497 lines
16 KiB
C
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#include "asm/io.h"
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#include "drivers/vga.h"
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#include "vga.h"
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/*
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* $Id$
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* $Source$
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*
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* from the Linux kernel code base.
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* orig by Ben Pfaff and Petr Vandrovec.
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*
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* modified by
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* Steve M. Gehlbach <steve@kesa.com>
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*
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* NOTE: to change the horiz and vertical pixels,
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* change the xres,yres,xres_virt,yres_virt setting
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* in the screeninfo structure below. You may also need
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* to change the border settings as well.
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*
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* Convert the screeninfo structure to data for
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* writing to the vga registers
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*
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*/
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// prototypes
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static int vga_decode_var(const struct screeninfo *var, struct vga_par *par);
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static int vga_set_regs(const struct vga_par *par);
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u8 read_seq_b(u16 addr) {
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outb(addr,SEQ_I);
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return inb(SEQ_D);
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}
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u8 read_gra_b(u16 addr) {
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outb(addr,GRA_I);
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return inb(GRA_D);
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}
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u8 read_crtc_b(u16 addr) {
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outb(addr,CRT_IC);
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return inb(CRT_DC);
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}
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u8 read_att_b(u16 addr) {
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inb(IS1_RC);
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inb(0x80);
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outb(addr,ATT_IW);
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return inb(ATT_R);
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}
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/*
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From: The Frame Buffer Device
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by Geert Uytterhoeven <geert@linux-m68k.org>
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in the linux kernel docs.
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The following picture summarizes all timings. The horizontal retrace time is
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the sum of the left margin, the right margin and the hsync length, while the
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vertical retrace time is the sum of the upper margin, the lower margin and the
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vsync length.
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+----------+---------------------------------------------+----------+-------+
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| | ^ | | |
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| | |upper_margin | | |
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| | | | | |
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+----------###############################################----------+-------+
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| # ^ # | |
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| # | # | |
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| # | # | |
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| # | # | |
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| left # | # right | hsync |
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| margin # | xres # margin | len |
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|<-------->#<---------------+--------------------------->#<-------->|<----->|
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| # | # | |
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| # | # | |
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| # | # | |
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| # |yres # | |
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| # | # | |
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| # | # | |
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| # | # | |
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| # | # | |
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| # | # | |
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| # | # | |
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| # | # | |
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| # | # | |
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| # | # | |
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+----------###############################################----------+-------+
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| | ^ | | |
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| | |lower_margin | | |
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+----------+---------------------------------------------+----------+-------+
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| | ^ | | |
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| | |vsync_len | | |
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+----------+---------------------------------------------+----------+-------+
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All horizontal timings are in number of dotclocks
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(in picoseconds, 1E-12 s), and vertical timings in number of scanlines.
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The vga uses the following fields:
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- pixclock: pixel clock in ps (pico seconds)
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- xres,yres,xres_v,yres_v
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- left_margin: time from sync to picture
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- right_margin: time from picture to sync
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- upper_margin: time from sync to picture
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- lower_margin: time from picture to sync
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- hsync_len: length of horizontal sync
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- vsync_len: length of vertical sync
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*/
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/* our display parameters per the above */
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static const struct screeninfo vga_settings = {
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640,400,640,400,/* xres,yres,xres_virt,yres_virt */
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0,0, /* xoffset,yoffset */
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4, /* bits_per_pixel NOT USED*/
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0, /* greyscale ? */
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{0,0,0}, /* R */
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{0,0,0}, /* G */
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{0,0,0}, /* B */
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{0,0,0}, /* transparency */
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0, /* standard pixel format */
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0, // activate now
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-1,-1, // height and width in mm
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0, // accel flags
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39721, // pixclock: 79442 -> 12.587 Mhz (NOT USED)
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// 70616 -> 14.161
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// 39721 -> 25.175
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// 35308 -> 28.322
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48, 16, 39, 8, // margins left,right,upper,lower
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96, // hsync length
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2, // vsync length
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0, // sync polarity
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0, // non interlaced, single mode
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{0,0,0,0,0,0} // compatibility
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};
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// ALPHA-MODE
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// Hard coded to BIOS VGA mode 3 (alpha color text)
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// screen size settable in screeninfo structure
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static int vga_decode_var(const struct screeninfo *var,
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struct vga_par *par)
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{
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u8 VgaAttributeTable[16] =
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{ 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x014, 0x007, 0x038, 0x039, 0x03A, 0x03B, 0x03C, 0x03D, 0x03E, 0x03F};
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u32 xres, right, hslen, left, xtotal;
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u32 yres, lower, vslen, upper, ytotal;
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u32 vxres, xoffset, vyres, yoffset;
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u32 pos;
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u8 r7, rMode;
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int i;
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xres = (var->xres + 7) & ~7;
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vxres = (var->xres_virtual + 0xF) & ~0xF;
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xoffset = (var->xoffset + 7) & ~7;
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left = (var->left_margin + 7) & ~7;
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right = (var->right_margin + 7) & ~7;
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hslen = (var->hsync_len + 7) & ~7;
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if (vxres < xres)
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vxres = xres;
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if (xres + xoffset > vxres)
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xoffset = vxres - xres;
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xres >>= 3;
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right >>= 3;
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hslen >>= 3;
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left >>= 3;
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vxres >>= 3;
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xtotal = xres + right + hslen + left;
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if (xtotal >= 256)
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return VERROR; //xtotal too big
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if (hslen > 32)
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return VERROR; //hslen too big
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if (right + hslen + left > 64)
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return VERROR; //hblank too big
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par->crtc[CRTC_H_TOTAL] = xtotal - 5;
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par->crtc[CRTC_H_BLANK_START] = xres - 1;
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par->crtc[CRTC_H_DISP] = xres - 1;
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pos = xres + right;
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par->crtc[CRTC_H_SYNC_START] = pos;
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pos += hslen;
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par->crtc[CRTC_H_SYNC_END] = (pos & 0x1F) | 0x20 ; //<--- stpc text mode p178
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pos += left - 2; /* blank_end + 2 <= total + 5 */
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par->crtc[CRTC_H_BLANK_END] = (pos & 0x1F) | 0x80;
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if (pos & 0x20)
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par->crtc[CRTC_H_SYNC_END] |= 0x80;
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yres = var->yres;
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lower = var->lower_margin;
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vslen = var->vsync_len;
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upper = var->upper_margin;
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vyres = var->yres_virtual;
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yoffset = var->yoffset;
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if (yres > vyres)
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vyres = yres;
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if (vxres * vyres > 65536) {
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vyres = 65536 / vxres;
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if (vyres < yres)
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return VERROR; // out of memory
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}
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if (yoffset + yres > vyres)
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yoffset = vyres - yres;
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if (var->vmode & VMODE_DOUBLE) {
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yres <<= 1;
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lower <<= 1;
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vslen <<= 1;
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upper <<= 1;
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}
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ytotal = yres + lower + vslen + upper;
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if (ytotal > 1024) {
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ytotal >>= 1;
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yres >>= 1;
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lower >>= 1;
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vslen >>= 1;
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upper >>= 1;
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rMode = 0x04;
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} else
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rMode = 0x00;
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if (ytotal > 1024)
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return VERROR; //ytotal too big
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if (vslen > 16)
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return VERROR; //vslen too big
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par->crtc[CRTC_V_TOTAL] = ytotal - 2;
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r7 = 0x10; /* disable linecompare */
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if (ytotal & 0x100) r7 |= 0x01;
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if (ytotal & 0x200) r7 |= 0x20;
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par->crtc[CRTC_PRESET_ROW] = 0;
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// GMODE <--> ALPHA-MODE
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// default using alpha mode so we need to set char rows= CHAR_HEIGHT-1
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par->crtc[CRTC_MAX_SCAN] = 0x40 | (CHAR_HEIGHT-1); /* 16 scanlines, linecmp max*/
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if (var->vmode & VMODE_DOUBLE)
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par->crtc[CRTC_MAX_SCAN] |= 0x80;
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par->crtc[CRTC_CURSOR_START] = 0x00; // curs enabled, start line = 0
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par->crtc[CRTC_CURSOR_END] = CHAR_HEIGHT-1; // end line = 12
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pos = yoffset * vxres + (xoffset >> 3);
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par->crtc[CRTC_START_HI] = pos >> 8;
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par->crtc[CRTC_START_LO] = pos & 0xFF;
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par->crtc[CRTC_CURSOR_HI] = 0x00;
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par->crtc[CRTC_CURSOR_LO] = 0x00;
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pos = yres - 1;
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par->crtc[CRTC_V_DISP_END] = pos & 0xFF;
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par->crtc[CRTC_V_BLANK_START] = pos & 0xFF;
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if (pos & 0x100)
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r7 |= 0x0A; /* 0x02 -> DISP_END, 0x08 -> BLANK_START */
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if (pos & 0x200) {
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r7 |= 0x40; /* 0x40 -> DISP_END */
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par->crtc[CRTC_MAX_SCAN] |= 0x20; /* BLANK_START */
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}
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pos += lower;
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par->crtc[CRTC_V_SYNC_START] = pos & 0xFF;
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if (pos & 0x100)
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r7 |= 0x04;
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if (pos & 0x200)
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r7 |= 0x80;
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pos += vslen;
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par->crtc[CRTC_V_SYNC_END] = (pos & 0x0F) & ~0x10; /* disabled reg write prot, IRQ */
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pos += upper - 1; /* blank_end + 1 <= ytotal + 2 */
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par->crtc[CRTC_V_BLANK_END] = pos & 0xFF; /* 0x7F for original VGA,
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but some SVGA chips requires all 8 bits to set */
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if (vxres >= 512)
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return VERROR; //vxres too long
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par->crtc[CRTC_OFFSET] = vxres >> 1;
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// put the underline off of the character, necessary in alpha color mode
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par->crtc[CRTC_UNDERLINE] = 0x1f;
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par->crtc[CRTC_MODE] = rMode | 0xA3; // word mode
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par->crtc[CRTC_LINE_COMPARE] = 0xFF;
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par->crtc[CRTC_OVERFLOW] = r7;
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// not used ??
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par->vss = 0x00; /* 3DA */
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for (i = 0x00; i < 0x10; i++) {
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par->atc[i] = VgaAttributeTable[i];
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}
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// GMODE <--> ALPHA-MODE
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par->atc[ATC_MODE] = 0x0c; // text mode
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par->atc[ATC_OVERSCAN] = 0x00; // no border
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par->atc[ATC_PLANE_ENABLE] = 0x0F;
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par->atc[ATC_PEL] = xoffset & 7;
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par->atc[ATC_COLOR_PAGE] = 0x00;
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par->misc = 0x67; /* enable CPU, ports 0x3Dx, positive sync*/
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if (var->sync & SYNC_HOR_HIGH_ACT)
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par->misc &= ~0x40;
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if (var->sync & SYNC_VERT_HIGH_ACT)
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par->misc &= ~0x80;
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par->seq[SEQ_CLOCK_MODE] = 0x01; //8-bit char; 0x01=alpha mode
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par->seq[SEQ_PLANE_WRITE] = 0x03; // just char/attr plane
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par->seq[SEQ_CHARACTER_MAP] = 0x00;
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par->seq[SEQ_MEMORY_MODE] = 0x02; // A/G bit not used in stpc; O/E on, C4 off
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par->gdc[GDC_SR_VALUE] = 0x00;
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// bits set in the SR_EN regs will enable set/reset action
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// based on the bit settings in the SR_VAL register
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par->gdc[GDC_SR_ENABLE] = 0x00;
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par->gdc[GDC_COMPARE_VALUE] = 0x00;
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par->gdc[GDC_DATA_ROTATE] = 0x00;
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par->gdc[GDC_PLANE_READ] = 0;
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par->gdc[GDC_MODE] = 0x10; //Okay
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// GMODE <--> ALPHA-MMODE
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par->gdc[GDC_MISC] = 0x0e; // b0=0 ->alpha mode; memory at 0xb8000
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par->gdc[GDC_COMPARE_MASK] = 0x00;
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par->gdc[GDC_BIT_MASK] = 0xFF;
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return 0;
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}
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//
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// originally from the stpc web site
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//
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static const unsigned char VgaLookupTable[3 * 0x3f + 3] = {
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// Red Green Blue
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0x000, 0x000, 0x000, // 00h
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0x000, 0x000, 0x02A, // 01h
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0x000, 0x02A, 0x000, // 02h
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0x000, 0x02A, 0x02A, // 03h
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0x02A, 0x000, 0x000, // 04h
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0x02A, 0x000, 0x02A, // 05h
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0x02A, 0x02A, 0x000, // 06h
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0x02A, 0x02A, 0x02A, // 07h
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0x000, 0x000, 0x015, // 08h
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0x000, 0x000, 0x03F, // 09h
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0x000, 0x02A, 0x015, // 0Ah
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0x000, 0x02A, 0x03F, // 0Bh
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0x02A, 0x000, 0x015, // 0Ch
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0x02A, 0x000, 0x03F, // 0Dh
|
||
|
|
0x02A, 0x02A, 0x015, // 0Eh
|
||
|
|
0x02A, 0x02A, 0x03F, // 0Fh
|
||
|
|
0x000, 0x015, 0x000, // 10h
|
||
|
|
0x000, 0x015, 0x02A, // 11h
|
||
|
|
0x000, 0x03F, 0x000, // 12h
|
||
|
|
0x000, 0x03F, 0x02A, // 13h
|
||
|
|
0x02A, 0x015, 0x000, // 14h
|
||
|
|
0x02A, 0x015, 0x02A, // 15h
|
||
|
|
0x02A, 0x03F, 0x000, // 16h
|
||
|
|
0x02A, 0x03F, 0x02A, // 17h
|
||
|
|
0x000, 0x015, 0x015, // 18h
|
||
|
|
0x000, 0x015, 0x03F, // 19h
|
||
|
|
0x000, 0x03F, 0x015, // 1Ah
|
||
|
|
0x000, 0x03F, 0x03F, // 1Bh
|
||
|
|
0x02A, 0x015, 0x015, // 1Ch
|
||
|
|
0x02A, 0x015, 0x03F, // 1Dh
|
||
|
|
0x02A, 0x03F, 0x015, // 1Eh
|
||
|
|
0x02A, 0x03F, 0x03F, // 1Fh
|
||
|
|
0x015, 0x000, 0x000, // 20h
|
||
|
|
0x015, 0x000, 0x02A, // 21h
|
||
|
|
0x015, 0x02A, 0x000, // 22h
|
||
|
|
0x015, 0x02A, 0x02A, // 23h
|
||
|
|
0x03F, 0x000, 0x000, // 24h
|
||
|
|
0x03F, 0x000, 0x02A, // 25h
|
||
|
|
0x03F, 0x02A, 0x000, // 26h
|
||
|
|
0x03F, 0x02A, 0x02A, // 27h
|
||
|
|
0x015, 0x000, 0x015, // 28h
|
||
|
|
0x015, 0x000, 0x03F, // 29h
|
||
|
|
0x015, 0x02A, 0x015, // 2Ah
|
||
|
|
0x015, 0x02A, 0x03F, // 2Bh
|
||
|
|
0x03F, 0x000, 0x015, // 2Ch
|
||
|
|
0x03F, 0x000, 0x03F, // 2Dh
|
||
|
|
0x03F, 0x02A, 0x015, // 2Eh
|
||
|
|
0x03F, 0x02A, 0x03F, // 2Fh
|
||
|
|
0x015, 0x015, 0x000, // 30h
|
||
|
|
0x015, 0x015, 0x02A, // 31h
|
||
|
|
0x015, 0x03F, 0x000, // 32h
|
||
|
|
0x015, 0x03F, 0x02A, // 33h
|
||
|
|
0x03F, 0x015, 0x000, // 34h
|
||
|
|
0x03F, 0x015, 0x02A, // 35h
|
||
|
|
0x03F, 0x03F, 0x000, // 36h
|
||
|
|
0x03F, 0x03F, 0x02A, // 37h
|
||
|
|
0x015, 0x015, 0x015, // 38h
|
||
|
|
0x015, 0x015, 0x03F, // 39h
|
||
|
|
0x015, 0x03F, 0x015, // 3Ah
|
||
|
|
0x015, 0x03F, 0x03F, // 3Bh
|
||
|
|
0x03F, 0x015, 0x015, // 3Ch
|
||
|
|
0x03F, 0x015, 0x03F, // 3Dh
|
||
|
|
0x03F, 0x03F, 0x015, // 3Eh
|
||
|
|
0x03F, 0x03F, 0x03F, // 3Fh
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* From the Linux kernel.
|
||
|
|
* orig by Ben Pfaff and Petr Vandrovec.
|
||
|
|
* see the note in the vga.h for attribution.
|
||
|
|
*
|
||
|
|
* modified by
|
||
|
|
* Steve M. Gehlbach <steve@kesa.com>
|
||
|
|
* for the linuxbios project
|
||
|
|
*
|
||
|
|
* Write the data in the vga parameter structure
|
||
|
|
* to the vga registers, along with other default
|
||
|
|
* settings.
|
||
|
|
*
|
||
|
|
*/
|
||
|
|
static int vga_set_regs(const struct vga_par *par)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
|
||
|
|
/* update misc output register */
|
||
|
|
outb(par->misc, MIS_W);
|
||
|
|
|
||
|
|
/* synchronous reset on */
|
||
|
|
outb(0x00, SEQ_I);
|
||
|
|
outb(0x00, SEQ_D);
|
||
|
|
|
||
|
|
/* write sequencer registers */
|
||
|
|
outb(1, SEQ_I);
|
||
|
|
outb(par->seq[1] | 0x20, SEQ_D); // blank display
|
||
|
|
for (i = 2; i < SEQ_C; i++) {
|
||
|
|
outb(i, SEQ_I);
|
||
|
|
outb(par->seq[i], SEQ_D);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* synchronous reset off */
|
||
|
|
outb(0x00, SEQ_I);
|
||
|
|
outb(0x03, SEQ_D);
|
||
|
|
|
||
|
|
/* deprotect CRT registers 0-7 */
|
||
|
|
outb(0x11, CRT_IC);
|
||
|
|
outb(par->crtc[0x11], CRT_DC);
|
||
|
|
|
||
|
|
/* write CRT registers */
|
||
|
|
for (i = 0; i < CRTC_C; i++) {
|
||
|
|
outb(i, CRT_IC);
|
||
|
|
outb(par->crtc[i], CRT_DC);
|
||
|
|
}
|
||
|
|
/* write graphics controller registers */
|
||
|
|
for (i = 0; i < GRA_C; i++) {
|
||
|
|
outb(i, GRA_I);
|
||
|
|
outb(par->gdc[i], GRA_D);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* write attribute controller registers */
|
||
|
|
for (i = 0; i < ATT_C; i++) {
|
||
|
|
inb(IS1_RC); /* reset flip-flop */
|
||
|
|
inb(0x80); //delay
|
||
|
|
outb(i, ATT_IW);
|
||
|
|
inb(0x80); //delay
|
||
|
|
|
||
|
|
outb(par->atc[i], ATT_IW);
|
||
|
|
inb(0x80); //delay
|
||
|
|
}
|
||
|
|
|
||
|
|
// initialize the color table
|
||
|
|
outb(0, PEL_IW);
|
||
|
|
i = 0;
|
||
|
|
// length is a magic number right now
|
||
|
|
while ( i < (0x3f*3 + 3) ) {
|
||
|
|
outb(VgaLookupTable[i++], PEL_D);
|
||
|
|
outb(VgaLookupTable[i++], PEL_D);
|
||
|
|
outb(VgaLookupTable[i++], PEL_D);
|
||
|
|
}
|
||
|
|
|
||
|
|
outb(0x0ff, PEL_MSK); // palette mask
|
||
|
|
|
||
|
|
// very important
|
||
|
|
// turn on video, disable palette access
|
||
|
|
inb(IS1_RC); /* reset flip-flop */
|
||
|
|
inb(0x80); //delay
|
||
|
|
outb(0x20, ATT_IW);
|
||
|
|
|
||
|
|
/* Wait for screen to stabilize. */
|
||
|
|
//for(i=0;i<1000;i++) { inb(0x80); }
|
||
|
|
|
||
|
|
outb(0x01, SEQ_I); // unblank display
|
||
|
|
outb(par->seq[1], SEQ_D);
|
||
|
|
|
||
|
|
// turn on display, disable access to attr palette
|
||
|
|
inb(IS1_RC);
|
||
|
|
outb(0x20, ATT_IW);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
void
|
||
|
|
vga_load_regs(void)
|
||
|
|
{
|
||
|
|
struct vga_par par;
|
||
|
|
|
||
|
|
if (vga_decode_var(&vga_settings, &par) == 0) {
|
||
|
|
vga_set_regs(&par);
|
||
|
|
}
|
||
|
|
}
|