357 lines
8.2 KiB
C
357 lines
8.2 KiB
C
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/**
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* Copyright (c) 2018 YADRO
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <skiboot.h>
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#include <device.h>
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#include <console.h>
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#include <chip.h>
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#include <ipmi.h>
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#include <pci.h>
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#include <pci-cfg.h>
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#include "astbmc.h"
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#define CHIP_ID_CPU0 0x00
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#define CHIP_ID_CPU1 0x08
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#define CHIP_ID_CPU2 0x10
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#define CHIP_ID_CPU3 0x18
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/* IPMI message code for PCI inventory (OEM). */
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#define PCIINV_IPMI_CODE IPMI_CODE(0x2e, 0x2a)
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/* IANA number used to identify IPMI OEM command group. */
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#define PCIINV_OEM_IANA 49769 /* YADRO */
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/**
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* struct pciinv_device - PCI device inventory description.
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* @domain_num: Domain number.
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* @bus_num: Bus number.
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* @device_num: Device number.
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* @func_num: Function number.
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* @vendor_id: Vendor Id.
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* @device_id: Device Id.
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* @class_code: Device class code.
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* @revision: Revision number.
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*
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* All fields have Big Endian byte order.
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*/
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struct pciinv_device {
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uint16_t domain_num;
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uint8_t bus_num;
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uint8_t device_num;
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uint8_t func_num;
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uint16_t vendor_id;
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uint16_t device_id;
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uint32_t class_code;
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uint8_t revision;
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} __packed;
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/**
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* struct pciinv_message - IPMI message packet data.
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* @iana: IANA id for OEM message, must be set to PCIINV_OEM_IANA.
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* @reset: Reset flag.
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* @device: PCI device description.
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*/
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struct pciinv_message {
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uint8_t iana[3];
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uint8_t reset;
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struct pciinv_device device;
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} __packed;
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static const struct slot_table_entry vesnin_phb0_0_slot[] = {
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{
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.etype = st_pluggable_slot,
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.location = ST_LOC_DEVFN(0,0),
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.name = "AUX connector00",
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_plx_slots[] = {
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{
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.etype = st_builtin_dev,
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.location = ST_LOC_DEVFN(0x01,0),
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.name = "Backplane SSD0",
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},
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{
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.etype = st_builtin_dev,
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.location = ST_LOC_DEVFN(0x02,0),
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.name = "Backplane SSD1",
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},
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{
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.etype = st_builtin_dev,
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.location = ST_LOC_DEVFN(0x03,0),
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.name = "Backplane LAN",
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},
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{
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.etype = st_builtin_dev,
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.location = ST_LOC_DEVFN(0x04,0),
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.name = "Backplane BMC",
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},
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{
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.etype = st_builtin_dev,
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.location = ST_LOC_DEVFN(0x05,0),
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.name = "Backplane USB",
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_plx_up[] = {
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{
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.etype = st_builtin_dev,
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.location = ST_LOC_DEVFN(0,0),
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.children = vesnin_plx_slots,
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_phb0_1_slot[] = {
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{
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.etype = st_builtin_dev,
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.location = ST_LOC_DEVFN(0,0),
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.name = "Backplane PLX",
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.children = vesnin_plx_up,
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_phb0_2_slot[] = {
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{
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.etype = st_pluggable_slot,
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.location = ST_LOC_DEVFN(0,0),
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.name = "PCIE0_x8_CPU0",
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_phb8_0_slot[] = {
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{
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.etype = st_pluggable_slot,
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.location = ST_LOC_DEVFN(0,0),
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.name = "PCIE1_x16_CPU1",
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_phb8_1_slot[] = {
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{
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.etype = st_pluggable_slot,
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.location = ST_LOC_DEVFN(0,0),
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.name = "AUX connector10",
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_phb9_0_slot[] = {
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{
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.etype = st_pluggable_slot,
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.location = ST_LOC_DEVFN(0,0),
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.name = "AUX connector30",
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_phb9_1_slot[] = {
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{
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.etype = st_pluggable_slot,
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.location = ST_LOC_DEVFN(0,0),
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.name = "PCIE3_x8_CPU2",
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_phb9_2_slot[] = {
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{
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.etype = st_pluggable_slot,
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.location = ST_LOC_DEVFN(0,0),
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.name = "PCIE2_x8_CPU2",
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_phbA_0_slot[] = {
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{
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.etype = st_pluggable_slot,
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.location = ST_LOC_DEVFN(0,0),
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.name = "PCIE4_x16_CPU3",
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_phbA_1_slot[] = {
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{
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.etype = st_pluggable_slot,
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.location = ST_LOC_DEVFN(0,0),
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.name = "AUX connector40",
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},
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{ .etype = st_end }
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};
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static const struct slot_table_entry vesnin_phb_table[] = {
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{
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.etype = st_phb,
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.location = ST_LOC_PHB(CHIP_ID_CPU0,0),
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.children = vesnin_phb0_0_slot,
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},
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{
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.etype = st_phb,
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.location = ST_LOC_PHB(CHIP_ID_CPU0,1),
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.children = vesnin_phb0_1_slot,
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},
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{
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.etype = st_phb,
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.location = ST_LOC_PHB(CHIP_ID_CPU0,2),
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.children = vesnin_phb0_2_slot,
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},
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{
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.etype = st_phb,
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.location = ST_LOC_PHB(CHIP_ID_CPU1,0),
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.children = vesnin_phb8_0_slot,
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},
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{
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.etype = st_phb,
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.location = ST_LOC_PHB(CHIP_ID_CPU1,1),
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.children = vesnin_phb8_1_slot,
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},
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{
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.etype = st_phb,
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.location = ST_LOC_PHB(CHIP_ID_CPU2,0),
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.children = vesnin_phb9_0_slot,
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},
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{
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.etype = st_phb,
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.location = ST_LOC_PHB(CHIP_ID_CPU2,1),
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.children = vesnin_phb9_1_slot,
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},
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{
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.etype = st_phb,
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.location = ST_LOC_PHB(CHIP_ID_CPU2,2),
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.children = vesnin_phb9_2_slot,
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},
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{
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.etype = st_phb,
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.location = ST_LOC_PHB(CHIP_ID_CPU3,0),
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.children = vesnin_phbA_0_slot,
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},
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{
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.etype = st_phb,
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.location = ST_LOC_PHB(CHIP_ID_CPU3,1),
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.children = vesnin_phbA_1_slot,
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},
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{ .etype = st_end }
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};
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/**
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* pciinv_walk() - Callback from PCI enumerator, see :c:func:`pci_walk_dev`.
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* User data parameter is interpreted as a pointer to pciinv_message structure.
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*/
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static int pciinv_walk(struct phb *phb, struct pci_device *pd, void *data)
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{
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struct ipmi_msg *msg;
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struct pciinv_message* pack = (struct pciinv_message*)data;
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/* PCI device filter: Skip non-EP devices */
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if (pci_has_cap(pd, PCI_CFG_CAP_ID_EXP, false)) {
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if (pd->dev_type != PCIE_TYPE_ENDPOINT)
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return OPAL_SUCCESS;
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}
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else if (pd->is_bridge)
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return OPAL_SUCCESS;
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/* Fill the PCI device inventory description */
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pack->device.domain_num = cpu_to_be16(phb->opal_id & 0xffff);
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pack->device.bus_num = (pd->bdfn >> 8) & 0xff;
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pack->device.device_num = (pd->bdfn >> 3) & 0x1f;
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pack->device.func_num = pd->bdfn & 0x7;
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pack->device.vendor_id = cpu_to_be16(PCI_VENDOR_ID(pd->vdid));
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pack->device.device_id = cpu_to_be16(PCI_DEVICE_ID(pd->vdid));
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pack->device.class_code = cpu_to_be32(pd->class & 0xffffff);
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pci_cfg_read8(phb, pd->bdfn, PCI_CFG_REV_ID, &pack->device.revision);
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msg = ipmi_mkmsg_simple(PCIINV_IPMI_CODE, pack, sizeof(*pack));
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if (!msg)
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return OPAL_HARDWARE;
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ipmi_queue_msg(msg);
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/* Disable reset flag for further messages in the current session. */
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pack->reset = 0;
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return OPAL_SUCCESS;
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}
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static void vesnin_pci_probe_complete(void)
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{
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struct phb *phb;
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/* IPMI message packet instance.
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* PCI device description will be filled in the PCI enumerator, see
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* `pciinv_walk()` function.
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* For each first message in a session, the Reset flag is turned on,
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* this indicates that the list of existing PCI devices must be
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* cleaned. */
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struct pciinv_message pack = {
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.iana = {
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PCIINV_OEM_IANA & 0xff,
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(PCIINV_OEM_IANA >> 8) & 0xff,
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(PCIINV_OEM_IANA >> 16) & 0xff
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},
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.reset = 1
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};
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check_all_slot_table();
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/* Send PCI device list to the BMC */
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prlog(PR_INFO, "Send PCI device list\n");
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for_each_phb(phb) {
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pci_walk_dev(phb, NULL, &pciinv_walk, &pack);
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}
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}
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static bool vesnin_probe(void)
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{
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if (!dt_node_is_compatible(dt_root, "YADRO,vesnin"))
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return false;
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/* Lot of common early inits here */
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astbmc_early_init();
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slot_table_init(vesnin_phb_table);
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return true;
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}
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DECLARE_PLATFORM(vesnin) = {
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.name = "vesnin",
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.bmc = &bmc_plat_ast2400_ami,
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.probe = vesnin_probe,
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.init = astbmc_init,
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.pci_get_slot_info = slot_table_get_slot_info,
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.pci_probe_complete = vesnin_pci_probe_complete,
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.external_irq = astbmc_ext_irq_serirq_cpld,
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.cec_power_down = astbmc_ipmi_power_down,
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.cec_reboot = astbmc_ipmi_reboot,
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.elog_commit = ipmi_elog_commit,
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.start_preload_resource = flash_start_preload_resource,
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.resource_loaded = flash_resource_loaded,
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.exit = ipmi_wdt_final_reset,
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.terminate = ipmi_terminate,
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.op_display = op_display_lpc,
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};
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