historical/m0-applesillicon.git/xnu-qemu-arm64-5.1.0/roms/u-boot/arch/arm/dts/rk3288-veyron-chromebook.dtsi

// SPDX-License-Identifier: GPL-2.0
/*
 * Google Veyron (and derivatives) board device tree source
 *
 * Copyright 2014 Google, Inc
 */

#include <dt-bindings/clock/rockchip,rk808.h>
#include <dt-bindings/input/input.h>
#include "rk3288-veyron.dtsi"

/ {
	aliases {
		i2c20 = &i2c_tunnel;
		video0 = &vopl;
		video1 = &vopb;
	};

	gpio_keys: gpio-keys {
		pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
		lid {
			label = "Lid";
			gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
			linux,code = <0>; /* SW_LID */
			linux,input-type = <5>; /* EV_SW */
			debounce-interval = <1>;
			gpio-key,wakeup;
                };
	};

	gpio-charger {
		compatible = "gpio-charger";
		gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&ac_present_ap>;
		charger-type = "mains";
	};

	/* A non-regulated voltage from power supply or battery */
	vccsys: vccsys {
		compatible = "regulator-fixed";
		regulator-name = "vccsys";
		regulator-boot-on;
		regulator-always-on;
	};

	vcc33_sys: vcc33-sys {
		vin-supply = <&vccsys>;
	};

	vcc_5v: vcc-5v {
		vin-supply = <&vccsys>;
	};

	/* This turns on vbus for host1 (dwc2) */
	vcc5_host1: vcc5-host1-regulator {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&host1_pwr_en>;
		regulator-name = "vcc5_host1";
		regulator-always-on;
		regulator-boot-on;
	};

	/* This turns on vbus for otg for host mode (dwc2) */
	vcc5v_otg: vcc5v-otg-regulator {
		compatible = "regulator-fixed";
		enable-active-high;
		gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
		pinctrl-names = "default";
		pinctrl-0 = <&usbotg_pwren_h>;
		regulator-name = "vcc5_host2";
		regulator-always-on;
		regulator-boot-on;
	};
};

&rk808 {
	regulators {
		vcc33_ccd: LDO_REG8 {
			regulator-always-on;
			regulator-boot-on;
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-name = "vcc33_ccd";
			regulator-suspend-mem-disabled;
		};
	};
};

&spi0 {
	status = "okay";
	spi-activate-delay = <100>;
	spi-max-frequency = <3000000>;
	spi-deactivate-delay = <200>;

	cros_ec: ec@0 {
		compatible = "google,cros-ec-spi";
		spi-max-frequency = <3000000>;
		interrupt-parent = <&gpio7>;
		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
		ec-interrupt = <&gpio7 7 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&ec_int>;
		reg = <0>;
		google,cros-ec-spi-pre-delay = <30>;

		i2c_tunnel: i2c-tunnel {
			compatible = "google,cros-ec-i2c-tunnel";
			google,remote-bus = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
		};
	};
};

&i2c4 {
	trackpad@15 {
		compatible = "elan,i2c_touchpad";
		interrupt-parent = <&gpio7>;
		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
		pinctrl-names = "default";
		pinctrl-0 = <&trackpad_int>;
		reg = <0x15>;
		vcc-supply = <&vcc33_io>;
		wakeup-source;
	};
};

&pinctrl {
	pinctrl-0 = <
		/* Common for sleep and wake, but no owners */
		&ddr0_retention
		&ddrio_pwroff
		&global_pwroff

		/* Wake only */
		&suspend_l_wake
		&bt_dev_wake_awake
	>;
	pinctrl-1 = <
		/* Common for sleep and wake, but no owners */
		&ddr0_retention
		&ddrio_pwroff
		&global_pwroff

		/* Sleep only */
		&suspend_l_sleep
		&bt_dev_wake_sleep
	>;

	buttons {
		ap_lid_int_l: ap-lid-int-l {
			rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	charger {
		ac_present_ap: ac-present-ap {
			rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	cros-ec {
		ec_int: ec-int {
			rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	sdmmc {
		sdmmc_wp_gpio: sdmmc-wp-gpio {
			rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	suspend {
		suspend_l_wake: suspend-l-wake {
			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
		};

		suspend_l_sleep: suspend-l-sleep {
			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
		};
	};

	trackpad {
		trackpad_int: trackpad-int {
			rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
		};
	};

	usb-host {
		host1_pwr_en: host1-pwr-en {
			rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		usbotg_pwren_h: usbotg-pwren-h {
			rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

#include "cros-ec-keyboard.dtsi"