113 lines
2.4 KiB
C
113 lines
2.4 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Intel LXT971/LXT972 PHY Driver for TI DaVinci
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* (TMS320DM644x) based boards.
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*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* --------------------------------------------------------
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*/
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#include <common.h>
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#include <net.h>
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#include <miiphy.h>
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#include <lxt971a.h>
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#include <asm/arch/emac_defs.h>
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#include "../../../drivers/net/ti/davinci_emac.h"
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#ifdef CONFIG_DRIVER_TI_EMAC
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#ifdef CONFIG_CMD_NET
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int lxt972_is_phy_connected(int phy_addr)
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{
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u_int16_t id1, id2;
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if (!davinci_eth_phy_read(phy_addr, MII_PHYSID1, &id1))
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return(0);
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if (!davinci_eth_phy_read(phy_addr, MII_PHYSID2, &id2))
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return(0);
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if ((id1 == (0x0013)) && ((id2 & 0xfff0) == 0x78e0))
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return(1);
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return(0);
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}
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int lxt972_get_link_speed(int phy_addr)
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{
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u_int16_t stat1, tmp;
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volatile emac_regs *emac = (emac_regs *)EMAC_BASE_ADDR;
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if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_STAT2, &stat1))
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return(0);
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if (!(stat1 & PHY_LXT971_STAT2_LINK)) /* link up? */
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return(0);
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if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
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return(0);
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tmp |= PHY_LXT971_DIG_CFG_MII_DRIVE;
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davinci_eth_phy_write(phy_addr, PHY_LXT971_DIG_CFG, tmp);
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/* Read back */
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if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
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return(0);
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/* Speed doesn't matter, there is no setting for it in EMAC... */
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if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
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/* set DM644x EMAC for Full Duplex */
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emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE |
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EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
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} else {
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/*set DM644x EMAC for Half Duplex */
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emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
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}
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return(1);
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}
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int lxt972_init_phy(int phy_addr)
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{
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int ret = 1;
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if (!lxt972_get_link_speed(phy_addr)) {
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/* Try another time */
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ret = lxt972_get_link_speed(phy_addr);
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}
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/* Disable PHY Interrupts */
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davinci_eth_phy_write(phy_addr, PHY_LXT971_INT_ENABLE, 0);
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return(ret);
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}
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int lxt972_auto_negotiate(int phy_addr)
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{
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u_int16_t tmp;
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if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp))
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return(0);
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/* Restart Auto_negotiation */
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tmp |= BMCR_ANRESTART;
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davinci_eth_phy_write(phy_addr, MII_BMCR, tmp);
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/*check AutoNegotiate complete */
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udelay (10000);
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if (!davinci_eth_phy_read(phy_addr, MII_BMSR, &tmp))
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return(0);
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if (!(tmp & BMSR_ANEGCOMPLETE))
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return(0);
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return (lxt972_get_link_speed(phy_addr));
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}
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#endif /* CONFIG_CMD_NET */
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#endif /* CONFIG_DRIVER_ETHER */
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