47 lines
1.7 KiB
C
47 lines
1.7 KiB
C
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//===-- SystemZMCTargetDesc.h - SystemZ target descriptions -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */
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#ifndef CS_SYSTEMZMCTARGETDESC_H
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#define CS_SYSTEMZMCTARGETDESC_H
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// Maps of asm register numbers to LLVM register numbers, with 0 indicating
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// an invalid register. In principle we could use 32-bit and 64-bit register
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// classes directly, provided that we relegated the GPR allocation order
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// in SystemZRegisterInfo.td to an AltOrder and left the default order
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// as %r0-%r15. It seems better to provide the same interface for
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// all classes though.
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extern const unsigned SystemZMC_GR32Regs[16];
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extern const unsigned SystemZMC_GRH32Regs[16];
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extern const unsigned SystemZMC_GR64Regs[16];
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extern const unsigned SystemZMC_GR128Regs[16];
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extern const unsigned SystemZMC_FP32Regs[16];
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extern const unsigned SystemZMC_FP64Regs[16];
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extern const unsigned SystemZMC_FP128Regs[16];
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// Return the 0-based number of the first architectural register that
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// contains the given LLVM register. E.g. R1D -> 1.
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unsigned SystemZMC_getFirstReg(unsigned Reg);
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// Defines symbolic names for SystemZ registers.
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// This defines a mapping from register name to register number.
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//#define GET_REGINFO_ENUM
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//#include "SystemZGenRegisterInfo.inc"
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// Defines symbolic names for the SystemZ instructions.
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//#define GET_INSTRINFO_ENUM
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//#include "SystemZGenInstrInfo.inc"
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//#define GET_SUBTARGETINFO_ENUM
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//#include "SystemZGenSubtargetInfo.inc"
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#endif
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