/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |*Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ /* Capstone Disassembly Engine, http://www.capstone-engine.org */ /* By Nguyen Anh Quynh , 2013-2014 */ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM enum { ARM_PHI = 0, ARM_INLINEASM = 1, ARM_CFI_INSTRUCTION = 2, ARM_EH_LABEL = 3, ARM_GC_LABEL = 4, ARM_KILL = 5, ARM_EXTRACT_SUBREG = 6, ARM_INSERT_SUBREG = 7, ARM_IMPLICIT_DEF = 8, ARM_SUBREG_TO_REG = 9, ARM_COPY_TO_REGCLASS = 10, ARM_DBG_VALUE = 11, ARM_REG_SEQUENCE = 12, ARM_COPY = 13, ARM_BUNDLE = 14, ARM_LIFETIME_START = 15, ARM_LIFETIME_END = 16, ARM_STACKMAP = 17, ARM_PATCHPOINT = 18, ARM_LOAD_STACK_GUARD = 19, ARM_ABS = 20, ARM_ADCri = 21, ARM_ADCrr = 22, ARM_ADCrsi = 23, ARM_ADCrsr = 24, ARM_ADDSri = 25, ARM_ADDSrr = 26, ARM_ADDSrsi = 27, ARM_ADDSrsr = 28, ARM_ADDri = 29, ARM_ADDrr = 30, ARM_ADDrsi = 31, ARM_ADDrsr = 32, ARM_ADJCALLSTACKDOWN = 33, ARM_ADJCALLSTACKUP = 34, ARM_ADR = 35, ARM_AESD = 36, ARM_AESE = 37, ARM_AESIMC = 38, ARM_AESMC = 39, ARM_ANDri = 40, ARM_ANDrr = 41, ARM_ANDrsi = 42, ARM_ANDrsr = 43, ARM_ASRi = 44, ARM_ASRr = 45, ARM_B = 46, ARM_BCCZi64 = 47, ARM_BCCi64 = 48, ARM_BFC = 49, ARM_BFI = 50, ARM_BICri = 51, ARM_BICrr = 52, ARM_BICrsi = 53, ARM_BICrsr = 54, ARM_BKPT = 55, ARM_BL = 56, ARM_BLX = 57, ARM_BLX_pred = 58, ARM_BLXi = 59, ARM_BL_pred = 60, ARM_BMOVPCB_CALL = 61, ARM_BMOVPCRX_CALL = 62, ARM_BR_JTadd = 63, ARM_BR_JTm = 64, ARM_BR_JTr = 65, ARM_BX = 66, ARM_BXJ = 67, ARM_BX_CALL = 68, ARM_BX_RET = 69, ARM_BX_pred = 70, ARM_Bcc = 71, ARM_CDP = 72, ARM_CDP2 = 73, ARM_CLREX = 74, ARM_CLZ = 75, ARM_CMNri = 76, ARM_CMNzrr = 77, ARM_CMNzrsi = 78, ARM_CMNzrsr = 79, ARM_CMPri = 80, ARM_CMPrr = 81, ARM_CMPrsi = 82, ARM_CMPrsr = 83, ARM_CONSTPOOL_ENTRY = 84, ARM_COPY_STRUCT_BYVAL_I32 = 85, ARM_CPS1p = 86, ARM_CPS2p = 87, ARM_CPS3p = 88, ARM_CRC32B = 89, ARM_CRC32CB = 90, ARM_CRC32CH = 91, ARM_CRC32CW = 92, ARM_CRC32H = 93, ARM_CRC32W = 94, ARM_DBG = 95, ARM_DMB = 96, ARM_DSB = 97, ARM_EORri = 98, ARM_EORrr = 99, ARM_EORrsi = 100, ARM_EORrsr = 101, ARM_FCONSTD = 102, ARM_FCONSTS = 103, ARM_FLDMXDB_UPD = 104, ARM_FLDMXIA = 105, ARM_FLDMXIA_UPD = 106, ARM_FMSTAT = 107, ARM_FSTMXDB_UPD = 108, ARM_FSTMXIA = 109, ARM_FSTMXIA_UPD = 110, ARM_HINT = 111, ARM_HLT = 112, ARM_ISB = 113, ARM_ITasm = 114, ARM_Int_eh_sjlj_dispatchsetup = 115, ARM_Int_eh_sjlj_longjmp = 116, ARM_Int_eh_sjlj_setjmp = 117, ARM_Int_eh_sjlj_setjmp_nofp = 118, ARM_LDA = 119, ARM_LDAB = 120, ARM_LDAEX = 121, ARM_LDAEXB = 122, ARM_LDAEXD = 123, ARM_LDAEXH = 124, ARM_LDAH = 125, ARM_LDC2L_OFFSET = 126, ARM_LDC2L_OPTION = 127, ARM_LDC2L_POST = 128, ARM_LDC2L_PRE = 129, ARM_LDC2_OFFSET = 130, ARM_LDC2_OPTION = 131, ARM_LDC2_POST = 132, ARM_LDC2_PRE = 133, ARM_LDCL_OFFSET = 134, ARM_LDCL_OPTION = 135, ARM_LDCL_POST = 136, ARM_LDCL_PRE = 137, ARM_LDC_OFFSET = 138, ARM_LDC_OPTION = 139, ARM_LDC_POST = 140, ARM_LDC_PRE = 141, ARM_LDMDA = 142, ARM_LDMDA_UPD = 143, ARM_LDMDB = 144, ARM_LDMDB_UPD = 145, ARM_LDMIA = 146, ARM_LDMIA_RET = 147, ARM_LDMIA_UPD = 148, ARM_LDMIB = 149, ARM_LDMIB_UPD = 150, ARM_LDRBT_POST = 151, ARM_LDRBT_POST_IMM = 152, ARM_LDRBT_POST_REG = 153, ARM_LDRB_POST_IMM = 154, ARM_LDRB_POST_REG = 155, ARM_LDRB_PRE_IMM = 156, ARM_LDRB_PRE_REG = 157, ARM_LDRBi12 = 158, ARM_LDRBrs = 159, ARM_LDRD = 160, ARM_LDRD_POST = 161, ARM_LDRD_PRE = 162, ARM_LDREX = 163, ARM_LDREXB = 164, ARM_LDREXD = 165, ARM_LDREXH = 166, ARM_LDRH = 167, ARM_LDRHTi = 168, ARM_LDRHTr = 169, ARM_LDRH_POST = 170, ARM_LDRH_PRE = 171, ARM_LDRLIT_ga_abs = 172, ARM_LDRLIT_ga_pcrel = 173, ARM_LDRLIT_ga_pcrel_ldr = 174, ARM_LDRSB = 175, ARM_LDRSBTi = 176, ARM_LDRSBTr = 177, ARM_LDRSB_POST = 178, ARM_LDRSB_PRE = 179, ARM_LDRSH = 180, ARM_LDRSHTi = 181, ARM_LDRSHTr = 182, ARM_LDRSH_POST = 183, ARM_LDRSH_PRE = 184, ARM_LDRT_POST = 185, ARM_LDRT_POST_IMM = 186, ARM_LDRT_POST_REG = 187, ARM_LDR_POST_IMM = 188, ARM_LDR_POST_REG = 189, ARM_LDR_PRE_IMM = 190, ARM_LDR_PRE_REG = 191, ARM_LDRcp = 192, ARM_LDRi12 = 193, ARM_LDRrs = 194, ARM_LEApcrel = 195, ARM_LEApcrelJT = 196, ARM_LSLi = 197, ARM_LSLr = 198, ARM_LSRi = 199, ARM_LSRr = 200, ARM_MCR = 201, ARM_MCR2 = 202, ARM_MCRR = 203, ARM_MCRR2 = 204, ARM_MLA = 205, ARM_MLAv5 = 206, ARM_MLS = 207, ARM_MOVCCi = 208, ARM_MOVCCi16 = 209, ARM_MOVCCi32imm = 210, ARM_MOVCCr = 211, ARM_MOVCCsi = 212, ARM_MOVCCsr = 213, ARM_MOVPCLR = 214, ARM_MOVPCRX = 215, ARM_MOVTi16 = 216, ARM_MOVTi16_ga_pcrel = 217, ARM_MOV_ga_pcrel = 218, ARM_MOV_ga_pcrel_ldr = 219, ARM_MOVi = 220, ARM_MOVi16 = 221, ARM_MOVi16_ga_pcrel = 222, ARM_MOVi32imm = 223, ARM_MOVr = 224, ARM_MOVr_TC = 225, ARM_MOVsi = 226, ARM_MOVsr = 227, ARM_MOVsra_flag = 228, ARM_MOVsrl_flag = 229, ARM_MRC = 230, ARM_MRC2 = 231, ARM_MRRC = 232, ARM_MRRC2 = 233, ARM_MRS = 234, ARM_MRSsys = 235, ARM_MSR = 236, ARM_MSRi = 237, ARM_MUL = 238, ARM_MULv5 = 239, ARM_MVNCCi = 240, ARM_MVNi = 241, ARM_MVNr = 242, ARM_MVNsi = 243, ARM_MVNsr = 244, ARM_ORRri = 245, ARM_ORRrr = 246, ARM_ORRrsi = 247, ARM_ORRrsr = 248, ARM_PICADD = 249, ARM_PICLDR = 250, ARM_PICLDRB = 251, ARM_PICLDRH = 252, ARM_PICLDRSB = 253, ARM_PICLDRSH = 254, ARM_PICSTR = 255, ARM_PICSTRB = 256, ARM_PICSTRH = 257, ARM_PKHBT = 258, ARM_PKHTB = 259, ARM_PLDWi12 = 260, ARM_PLDWrs = 261, ARM_PLDi12 = 262, ARM_PLDrs = 263, ARM_PLIi12 = 264, ARM_PLIrs = 265, ARM_QADD = 266, ARM_QADD16 = 267, ARM_QADD8 = 268, ARM_QASX = 269, ARM_QDADD = 270, ARM_QDSUB = 271, ARM_QSAX = 272, ARM_QSUB = 273, ARM_QSUB16 = 274, ARM_QSUB8 = 275, ARM_RBIT = 276, ARM_REV = 277, ARM_REV16 = 278, ARM_REVSH = 279, ARM_RFEDA = 280, ARM_RFEDA_UPD = 281, ARM_RFEDB = 282, ARM_RFEDB_UPD = 283, ARM_RFEIA = 284, ARM_RFEIA_UPD = 285, ARM_RFEIB = 286, ARM_RFEIB_UPD = 287, ARM_RORi = 288, ARM_RORr = 289, ARM_RRX = 290, ARM_RRXi = 291, ARM_RSBSri = 292, ARM_RSBSrsi = 293, ARM_RSBSrsr = 294, ARM_RSBri = 295, ARM_RSBrr = 296, ARM_RSBrsi = 297, ARM_RSBrsr = 298, ARM_RSCri = 299, ARM_RSCrr = 300, ARM_RSCrsi = 301, ARM_RSCrsr = 302, ARM_SADD16 = 303, ARM_SADD8 = 304, ARM_SASX = 305, ARM_SBCri = 306, ARM_SBCrr = 307, ARM_SBCrsi = 308, ARM_SBCrsr = 309, ARM_SBFX = 310, ARM_SDIV = 311, ARM_SEL = 312, ARM_SETEND = 313, ARM_SHA1C = 314, ARM_SHA1H = 315, ARM_SHA1M = 316, ARM_SHA1P = 317, ARM_SHA1SU0 = 318, ARM_SHA1SU1 = 319, ARM_SHA256H = 320, ARM_SHA256H2 = 321, ARM_SHA256SU0 = 322, ARM_SHA256SU1 = 323, ARM_SHADD16 = 324, ARM_SHADD8 = 325, ARM_SHASX = 326, ARM_SHSAX = 327, ARM_SHSUB16 = 328, ARM_SHSUB8 = 329, ARM_SMC = 330, ARM_SMLABB = 331, ARM_SMLABT = 332, ARM_SMLAD = 333, ARM_SMLADX = 334, ARM_SMLAL = 335, ARM_SMLALBB = 336, ARM_SMLALBT = 337, ARM_SMLALD = 338, ARM_SMLALDX = 339, ARM_SMLALTB = 340, ARM_SMLALTT = 341, ARM_SMLALv5 = 342, ARM_SMLATB = 343, ARM_SMLATT = 344, ARM_SMLAWB = 345, ARM_SMLAWT = 346, ARM_SMLSD = 347, ARM_SMLSDX = 348, ARM_SMLSLD = 349, ARM_SMLSLDX = 350, ARM_SMMLA = 351, ARM_SMMLAR = 352, ARM_SMMLS = 353, ARM_SMMLSR = 354, ARM_SMMUL = 355, ARM_SMMULR = 356, ARM_SMUAD = 357, ARM_SMUADX = 358, ARM_SMULBB = 359, ARM_SMULBT = 360, ARM_SMULL = 361, ARM_SMULLv5 = 362, ARM_SMULTB = 363, ARM_SMULTT = 364, ARM_SMULWB = 365, ARM_SMULWT = 366, ARM_SMUSD = 367, ARM_SMUSDX = 368, ARM_SRSDA = 369, ARM_SRSDA_UPD = 370, ARM_SRSDB = 371, ARM_SRSDB_UPD = 372, ARM_SRSIA = 373, ARM_SRSIA_UPD = 374, ARM_SRSIB = 375, ARM_SRSIB_UPD = 376, ARM_SSAT = 377, ARM_SSAT16 = 378, ARM_SSAX = 379, ARM_SSUB16 = 380, ARM_SSUB8 = 381, ARM_STC2L_OFFSET = 382, ARM_STC2L_OPTION = 383, ARM_STC2L_POST = 384, ARM_STC2L_PRE = 385, ARM_STC2_OFFSET = 386, ARM_STC2_OPTION = 387, ARM_STC2_POST = 388, ARM_STC2_PRE = 389, ARM_STCL_OFFSET = 390, ARM_STCL_OPTION = 391, ARM_STCL_POST = 392, ARM_STCL_PRE = 393, ARM_STC_OFFSET = 394, ARM_STC_OPTION = 395, ARM_STC_POST = 396, ARM_STC_PRE = 397, ARM_STL = 398, ARM_STLB = 399, ARM_STLEX = 400, ARM_STLEXB = 401, ARM_STLEXD = 402, ARM_STLEXH = 403, ARM_STLH = 404, ARM_STMDA = 405, ARM_STMDA_UPD = 406, ARM_STMDB = 407, ARM_STMDB_UPD = 408, ARM_STMIA = 409, ARM_STMIA_UPD = 410, ARM_STMIB = 411, ARM_STMIB_UPD = 412, ARM_STRBT_POST = 413, ARM_STRBT_POST_IMM = 414, ARM_STRBT_POST_REG = 415, ARM_STRB_POST_IMM = 416, ARM_STRB_POST_REG = 417, ARM_STRB_PRE_IMM = 418, ARM_STRB_PRE_REG = 419, ARM_STRBi12 = 420, ARM_STRBi_preidx = 421, ARM_STRBr_preidx = 422, ARM_STRBrs = 423, ARM_STRD = 424, ARM_STRD_POST = 425, ARM_STRD_PRE = 426, ARM_STREX = 427, ARM_STREXB = 428, ARM_STREXD = 429, ARM_STREXH = 430, ARM_STRH = 431, ARM_STRHTi = 432, ARM_STRHTr = 433, ARM_STRH_POST = 434, ARM_STRH_PRE = 435, ARM_STRH_preidx = 436, ARM_STRT_POST = 437, ARM_STRT_POST_IMM = 438, ARM_STRT_POST_REG = 439, ARM_STR_POST_IMM = 440, ARM_STR_POST_REG = 441, ARM_STR_PRE_IMM = 442, ARM_STR_PRE_REG = 443, ARM_STRi12 = 444, ARM_STRi_preidx = 445, ARM_STRr_preidx = 446, ARM_STRrs = 447, ARM_SUBS_PC_LR = 448, ARM_SUBSri = 449, ARM_SUBSrr = 450, ARM_SUBSrsi = 451, ARM_SUBSrsr = 452, ARM_SUBri = 453, ARM_SUBrr = 454, ARM_SUBrsi = 455, ARM_SUBrsr = 456, ARM_SVC = 457, ARM_SWP = 458, ARM_SWPB = 459, ARM_SXTAB = 460, ARM_SXTAB16 = 461, ARM_SXTAH = 462, ARM_SXTB = 463, ARM_SXTB16 = 464, ARM_SXTH = 465, ARM_TAILJMPd = 466, ARM_TAILJMPr = 467, ARM_TCRETURNdi = 468, ARM_TCRETURNri = 469, ARM_TEQri = 470, ARM_TEQrr = 471, ARM_TEQrsi = 472, ARM_TEQrsr = 473, ARM_TPsoft = 474, ARM_TRAP = 475, ARM_TRAPNaCl = 476, ARM_TSTri = 477, ARM_TSTrr = 478, ARM_TSTrsi = 479, ARM_TSTrsr = 480, ARM_UADD16 = 481, ARM_UADD8 = 482, ARM_UASX = 483, ARM_UBFX = 484, ARM_UDF = 485, ARM_UDIV = 486, ARM_UHADD16 = 487, ARM_UHADD8 = 488, ARM_UHASX = 489, ARM_UHSAX = 490, ARM_UHSUB16 = 491, ARM_UHSUB8 = 492, ARM_UMAAL = 493, ARM_UMLAL = 494, ARM_UMLALv5 = 495, ARM_UMULL = 496, ARM_UMULLv5 = 497, ARM_UQADD16 = 498, ARM_UQADD8 = 499, ARM_UQASX = 500, ARM_UQSAX = 501, ARM_UQSUB16 = 502, ARM_UQSUB8 = 503, ARM_USAD8 = 504, ARM_USADA8 = 505, ARM_USAT = 506, ARM_USAT16 = 507, ARM_USAX = 508, ARM_USUB16 = 509, ARM_USUB8 = 510, ARM_UXTAB = 511, ARM_UXTAB16 = 512, ARM_UXTAH = 513, ARM_UXTB = 514, ARM_UXTB16 = 515, ARM_UXTH = 516, ARM_VABALsv2i64 = 517, ARM_VABALsv4i32 = 518, ARM_VABALsv8i16 = 519, ARM_VABALuv2i64 = 520, ARM_VABALuv4i32 = 521, ARM_VABALuv8i16 = 522, ARM_VABAsv16i8 = 523, ARM_VABAsv2i32 = 524, ARM_VABAsv4i16 = 525, ARM_VABAsv4i32 = 526, ARM_VABAsv8i16 = 527, ARM_VABAsv8i8 = 528, ARM_VABAuv16i8 = 529, ARM_VABAuv2i32 = 530, ARM_VABAuv4i16 = 531, ARM_VABAuv4i32 = 532, ARM_VABAuv8i16 = 533, ARM_VABAuv8i8 = 534, ARM_VABDLsv2i64 = 535, ARM_VABDLsv4i32 = 536, ARM_VABDLsv8i16 = 537, ARM_VABDLuv2i64 = 538, ARM_VABDLuv4i32 = 539, ARM_VABDLuv8i16 = 540, ARM_VABDfd = 541, ARM_VABDfq = 542, ARM_VABDsv16i8 = 543, ARM_VABDsv2i32 = 544, ARM_VABDsv4i16 = 545, ARM_VABDsv4i32 = 546, ARM_VABDsv8i16 = 547, ARM_VABDsv8i8 = 548, ARM_VABDuv16i8 = 549, ARM_VABDuv2i32 = 550, ARM_VABDuv4i16 = 551, ARM_VABDuv4i32 = 552, ARM_VABDuv8i16 = 553, ARM_VABDuv8i8 = 554, ARM_VABSD = 555, ARM_VABSS = 556, ARM_VABSfd = 557, ARM_VABSfq = 558, ARM_VABSv16i8 = 559, ARM_VABSv2i32 = 560, ARM_VABSv4i16 = 561, ARM_VABSv4i32 = 562, ARM_VABSv8i16 = 563, ARM_VABSv8i8 = 564, ARM_VACGEd = 565, ARM_VACGEq = 566, ARM_VACGTd = 567, ARM_VACGTq = 568, ARM_VADDD = 569, ARM_VADDHNv2i32 = 570, ARM_VADDHNv4i16 = 571, ARM_VADDHNv8i8 = 572, ARM_VADDLsv2i64 = 573, ARM_VADDLsv4i32 = 574, ARM_VADDLsv8i16 = 575, ARM_VADDLuv2i64 = 576, ARM_VADDLuv4i32 = 577, ARM_VADDLuv8i16 = 578, ARM_VADDS = 579, ARM_VADDWsv2i64 = 580, ARM_VADDWsv4i32 = 581, ARM_VADDWsv8i16 = 582, ARM_VADDWuv2i64 = 583, ARM_VADDWuv4i32 = 584, ARM_VADDWuv8i16 = 585, ARM_VADDfd = 586, ARM_VADDfq = 587, ARM_VADDv16i8 = 588, ARM_VADDv1i64 = 589, ARM_VADDv2i32 = 590, ARM_VADDv2i64 = 591, ARM_VADDv4i16 = 592, ARM_VADDv4i32 = 593, ARM_VADDv8i16 = 594, ARM_VADDv8i8 = 595, ARM_VANDd = 596, ARM_VANDq = 597, ARM_VBICd = 598, ARM_VBICiv2i32 = 599, ARM_VBICiv4i16 = 600, ARM_VBICiv4i32 = 601, ARM_VBICiv8i16 = 602, ARM_VBICq = 603, ARM_VBIFd = 604, ARM_VBIFq = 605, ARM_VBITd = 606, ARM_VBITq = 607, ARM_VBSLd = 608, ARM_VBSLq = 609, ARM_VCEQfd = 610, ARM_VCEQfq = 611, ARM_VCEQv16i8 = 612, ARM_VCEQv2i32 = 613, ARM_VCEQv4i16 = 614, ARM_VCEQv4i32 = 615, ARM_VCEQv8i16 = 616, ARM_VCEQv8i8 = 617, ARM_VCEQzv16i8 = 618, ARM_VCEQzv2f32 = 619, ARM_VCEQzv2i32 = 620, ARM_VCEQzv4f32 = 621, ARM_VCEQzv4i16 = 622, ARM_VCEQzv4i32 = 623, ARM_VCEQzv8i16 = 624, ARM_VCEQzv8i8 = 625, ARM_VCGEfd = 626, ARM_VCGEfq = 627, ARM_VCGEsv16i8 = 628, ARM_VCGEsv2i32 = 629, ARM_VCGEsv4i16 = 630, ARM_VCGEsv4i32 = 631, ARM_VCGEsv8i16 = 632, ARM_VCGEsv8i8 = 633, ARM_VCGEuv16i8 = 634, ARM_VCGEuv2i32 = 635, ARM_VCGEuv4i16 = 636, ARM_VCGEuv4i32 = 637, ARM_VCGEuv8i16 = 638, ARM_VCGEuv8i8 = 639, ARM_VCGEzv16i8 = 640, ARM_VCGEzv2f32 = 641, ARM_VCGEzv2i32 = 642, ARM_VCGEzv4f32 = 643, ARM_VCGEzv4i16 = 644, ARM_VCGEzv4i32 = 645, ARM_VCGEzv8i16 = 646, ARM_VCGEzv8i8 = 647, ARM_VCGTfd = 648, ARM_VCGTfq = 649, ARM_VCGTsv16i8 = 650, ARM_VCGTsv2i32 = 651, ARM_VCGTsv4i16 = 652, ARM_VCGTsv4i32 = 653, ARM_VCGTsv8i16 = 654, ARM_VCGTsv8i8 = 655, ARM_VCGTuv16i8 = 656, ARM_VCGTuv2i32 = 657, ARM_VCGTuv4i16 = 658, ARM_VCGTuv4i32 = 659, ARM_VCGTuv8i16 = 660, ARM_VCGTuv8i8 = 661, ARM_VCGTzv16i8 = 662, ARM_VCGTzv2f32 = 663, ARM_VCGTzv2i32 = 664, ARM_VCGTzv4f32 = 665, ARM_VCGTzv4i16 = 666, ARM_VCGTzv4i32 = 667, ARM_VCGTzv8i16 = 668, ARM_VCGTzv8i8 = 669, ARM_VCLEzv16i8 = 670, ARM_VCLEzv2f32 = 671, ARM_VCLEzv2i32 = 672, ARM_VCLEzv4f32 = 673, ARM_VCLEzv4i16 = 674, ARM_VCLEzv4i32 = 675, ARM_VCLEzv8i16 = 676, ARM_VCLEzv8i8 = 677, ARM_VCLSv16i8 = 678, ARM_VCLSv2i32 = 679, ARM_VCLSv4i16 = 680, ARM_VCLSv4i32 = 681, ARM_VCLSv8i16 = 682, ARM_VCLSv8i8 = 683, ARM_VCLTzv16i8 = 684, ARM_VCLTzv2f32 = 685, ARM_VCLTzv2i32 = 686, ARM_VCLTzv4f32 = 687, ARM_VCLTzv4i16 = 688, ARM_VCLTzv4i32 = 689, ARM_VCLTzv8i16 = 690, ARM_VCLTzv8i8 = 691, ARM_VCLZv16i8 = 692, ARM_VCLZv2i32 = 693, ARM_VCLZv4i16 = 694, ARM_VCLZv4i32 = 695, ARM_VCLZv8i16 = 696, ARM_VCLZv8i8 = 697, ARM_VCMPD = 698, ARM_VCMPED = 699, ARM_VCMPES = 700, ARM_VCMPEZD = 701, ARM_VCMPEZS = 702, ARM_VCMPS = 703, ARM_VCMPZD = 704, ARM_VCMPZS = 705, ARM_VCNTd = 706, ARM_VCNTq = 707, ARM_VCVTANSD = 708, ARM_VCVTANSQ = 709, ARM_VCVTANUD = 710, ARM_VCVTANUQ = 711, ARM_VCVTASD = 712, ARM_VCVTASS = 713, ARM_VCVTAUD = 714, ARM_VCVTAUS = 715, ARM_VCVTBDH = 716, ARM_VCVTBHD = 717, ARM_VCVTBHS = 718, ARM_VCVTBSH = 719, ARM_VCVTDS = 720, ARM_VCVTMNSD = 721, ARM_VCVTMNSQ = 722, ARM_VCVTMNUD = 723, ARM_VCVTMNUQ = 724, ARM_VCVTMSD = 725, ARM_VCVTMSS = 726, ARM_VCVTMUD = 727, ARM_VCVTMUS = 728, ARM_VCVTNNSD = 729, ARM_VCVTNNSQ = 730, ARM_VCVTNNUD = 731, ARM_VCVTNNUQ = 732, ARM_VCVTNSD = 733, ARM_VCVTNSS = 734, ARM_VCVTNUD = 735, ARM_VCVTNUS = 736, ARM_VCVTPNSD = 737, ARM_VCVTPNSQ = 738, ARM_VCVTPNUD = 739, ARM_VCVTPNUQ = 740, ARM_VCVTPSD = 741, ARM_VCVTPSS = 742, ARM_VCVTPUD = 743, ARM_VCVTPUS = 744, ARM_VCVTSD = 745, ARM_VCVTTDH = 746, ARM_VCVTTHD = 747, ARM_VCVTTHS = 748, ARM_VCVTTSH = 749, ARM_VCVTf2h = 750, ARM_VCVTf2sd = 751, ARM_VCVTf2sq = 752, ARM_VCVTf2ud = 753, ARM_VCVTf2uq = 754, ARM_VCVTf2xsd = 755, ARM_VCVTf2xsq = 756, ARM_VCVTf2xud = 757, ARM_VCVTf2xuq = 758, ARM_VCVTh2f = 759, ARM_VCVTs2fd = 760, ARM_VCVTs2fq = 761, ARM_VCVTu2fd = 762, ARM_VCVTu2fq = 763, ARM_VCVTxs2fd = 764, ARM_VCVTxs2fq = 765, ARM_VCVTxu2fd = 766, ARM_VCVTxu2fq = 767, ARM_VDIVD = 768, ARM_VDIVS = 769, ARM_VDUP16d = 770, ARM_VDUP16q = 771, ARM_VDUP32d = 772, ARM_VDUP32q = 773, ARM_VDUP8d = 774, ARM_VDUP8q = 775, ARM_VDUPLN16d = 776, ARM_VDUPLN16q = 777, ARM_VDUPLN32d = 778, ARM_VDUPLN32q = 779, ARM_VDUPLN8d = 780, ARM_VDUPLN8q = 781, ARM_VEORd = 782, ARM_VEORq = 783, ARM_VEXTd16 = 784, ARM_VEXTd32 = 785, ARM_VEXTd8 = 786, ARM_VEXTq16 = 787, ARM_VEXTq32 = 788, ARM_VEXTq64 = 789, ARM_VEXTq8 = 790, ARM_VFMAD = 791, ARM_VFMAS = 792, ARM_VFMAfd = 793, ARM_VFMAfq = 794, ARM_VFMSD = 795, ARM_VFMSS = 796, ARM_VFMSfd = 797, ARM_VFMSfq = 798, ARM_VFNMAD = 799, ARM_VFNMAS = 800, ARM_VFNMSD = 801, ARM_VFNMSS = 802, ARM_VGETLNi32 = 803, ARM_VGETLNs16 = 804, ARM_VGETLNs8 = 805, ARM_VGETLNu16 = 806, ARM_VGETLNu8 = 807, ARM_VHADDsv16i8 = 808, ARM_VHADDsv2i32 = 809, ARM_VHADDsv4i16 = 810, ARM_VHADDsv4i32 = 811, ARM_VHADDsv8i16 = 812, ARM_VHADDsv8i8 = 813, ARM_VHADDuv16i8 = 814, ARM_VHADDuv2i32 = 815, ARM_VHADDuv4i16 = 816, ARM_VHADDuv4i32 = 817, ARM_VHADDuv8i16 = 818, ARM_VHADDuv8i8 = 819, ARM_VHSUBsv16i8 = 820, ARM_VHSUBsv2i32 = 821, ARM_VHSUBsv4i16 = 822, ARM_VHSUBsv4i32 = 823, ARM_VHSUBsv8i16 = 824, ARM_VHSUBsv8i8 = 825, ARM_VHSUBuv16i8 = 826, ARM_VHSUBuv2i32 = 827, ARM_VHSUBuv4i16 = 828, ARM_VHSUBuv4i32 = 829, ARM_VHSUBuv8i16 = 830, ARM_VHSUBuv8i8 = 831, ARM_VLD1DUPd16 = 832, ARM_VLD1DUPd16wb_fixed = 833, ARM_VLD1DUPd16wb_register = 834, ARM_VLD1DUPd32 = 835, ARM_VLD1DUPd32wb_fixed = 836, ARM_VLD1DUPd32wb_register = 837, ARM_VLD1DUPd8 = 838, ARM_VLD1DUPd8wb_fixed = 839, ARM_VLD1DUPd8wb_register = 840, ARM_VLD1DUPq16 = 841, ARM_VLD1DUPq16wb_fixed = 842, ARM_VLD1DUPq16wb_register = 843, ARM_VLD1DUPq32 = 844, ARM_VLD1DUPq32wb_fixed = 845, ARM_VLD1DUPq32wb_register = 846, ARM_VLD1DUPq8 = 847, ARM_VLD1DUPq8wb_fixed = 848, ARM_VLD1DUPq8wb_register = 849, ARM_VLD1LNd16 = 850, ARM_VLD1LNd16_UPD = 851, ARM_VLD1LNd32 = 852, ARM_VLD1LNd32_UPD = 853, ARM_VLD1LNd8 = 854, ARM_VLD1LNd8_UPD = 855, ARM_VLD1LNdAsm_16 = 856, ARM_VLD1LNdAsm_32 = 857, ARM_VLD1LNdAsm_8 = 858, ARM_VLD1LNdWB_fixed_Asm_16 = 859, ARM_VLD1LNdWB_fixed_Asm_32 = 860, ARM_VLD1LNdWB_fixed_Asm_8 = 861, ARM_VLD1LNdWB_register_Asm_16 = 862, ARM_VLD1LNdWB_register_Asm_32 = 863, ARM_VLD1LNdWB_register_Asm_8 = 864, ARM_VLD1LNq16Pseudo = 865, ARM_VLD1LNq16Pseudo_UPD = 866, ARM_VLD1LNq32Pseudo = 867, ARM_VLD1LNq32Pseudo_UPD = 868, ARM_VLD1LNq8Pseudo = 869, ARM_VLD1LNq8Pseudo_UPD = 870, ARM_VLD1d16 = 871, ARM_VLD1d16Q = 872, ARM_VLD1d16Qwb_fixed = 873, ARM_VLD1d16Qwb_register = 874, ARM_VLD1d16T = 875, ARM_VLD1d16Twb_fixed = 876, ARM_VLD1d16Twb_register = 877, ARM_VLD1d16wb_fixed = 878, ARM_VLD1d16wb_register = 879, ARM_VLD1d32 = 880, ARM_VLD1d32Q = 881, ARM_VLD1d32Qwb_fixed = 882, ARM_VLD1d32Qwb_register = 883, ARM_VLD1d32T = 884, ARM_VLD1d32Twb_fixed = 885, ARM_VLD1d32Twb_register = 886, ARM_VLD1d32wb_fixed = 887, ARM_VLD1d32wb_register = 888, ARM_VLD1d64 = 889, ARM_VLD1d64Q = 890, ARM_VLD1d64QPseudo = 891, ARM_VLD1d64QPseudoWB_fixed = 892, ARM_VLD1d64QPseudoWB_register = 893, ARM_VLD1d64Qwb_fixed = 894, ARM_VLD1d64Qwb_register = 895, ARM_VLD1d64T = 896, ARM_VLD1d64TPseudo = 897, ARM_VLD1d64TPseudoWB_fixed = 898, ARM_VLD1d64TPseudoWB_register = 899, ARM_VLD1d64Twb_fixed = 900, ARM_VLD1d64Twb_register = 901, ARM_VLD1d64wb_fixed = 902, ARM_VLD1d64wb_register = 903, ARM_VLD1d8 = 904, ARM_VLD1d8Q = 905, ARM_VLD1d8Qwb_fixed = 906, ARM_VLD1d8Qwb_register = 907, ARM_VLD1d8T = 908, ARM_VLD1d8Twb_fixed = 909, ARM_VLD1d8Twb_register = 910, ARM_VLD1d8wb_fixed = 911, ARM_VLD1d8wb_register = 912, ARM_VLD1q16 = 913, ARM_VLD1q16wb_fixed = 914, ARM_VLD1q16wb_register = 915, ARM_VLD1q32 = 916, ARM_VLD1q32wb_fixed = 917, ARM_VLD1q32wb_register = 918, ARM_VLD1q64 = 919, ARM_VLD1q64wb_fixed = 920, ARM_VLD1q64wb_register = 921, ARM_VLD1q8 = 922, ARM_VLD1q8wb_fixed = 923, ARM_VLD1q8wb_register = 924, ARM_VLD2DUPd16 = 925, ARM_VLD2DUPd16wb_fixed = 926, ARM_VLD2DUPd16wb_register = 927, ARM_VLD2DUPd16x2 = 928, ARM_VLD2DUPd16x2wb_fixed = 929, ARM_VLD2DUPd16x2wb_register = 930, ARM_VLD2DUPd32 = 931, ARM_VLD2DUPd32wb_fixed = 932, ARM_VLD2DUPd32wb_register = 933, ARM_VLD2DUPd32x2 = 934, ARM_VLD2DUPd32x2wb_fixed = 935, ARM_VLD2DUPd32x2wb_register = 936, ARM_VLD2DUPd8 = 937, ARM_VLD2DUPd8wb_fixed = 938, ARM_VLD2DUPd8wb_register = 939, ARM_VLD2DUPd8x2 = 940, ARM_VLD2DUPd8x2wb_fixed = 941, ARM_VLD2DUPd8x2wb_register = 942, ARM_VLD2LNd16 = 943, ARM_VLD2LNd16Pseudo = 944, ARM_VLD2LNd16Pseudo_UPD = 945, ARM_VLD2LNd16_UPD = 946, ARM_VLD2LNd32 = 947, ARM_VLD2LNd32Pseudo = 948, ARM_VLD2LNd32Pseudo_UPD = 949, ARM_VLD2LNd32_UPD = 950, ARM_VLD2LNd8 = 951, ARM_VLD2LNd8Pseudo = 952, ARM_VLD2LNd8Pseudo_UPD = 953, ARM_VLD2LNd8_UPD = 954, ARM_VLD2LNdAsm_16 = 955, ARM_VLD2LNdAsm_32 = 956, ARM_VLD2LNdAsm_8 = 957, ARM_VLD2LNdWB_fixed_Asm_16 = 958, ARM_VLD2LNdWB_fixed_Asm_32 = 959, ARM_VLD2LNdWB_fixed_Asm_8 = 960, ARM_VLD2LNdWB_register_Asm_16 = 961, ARM_VLD2LNdWB_register_Asm_32 = 962, ARM_VLD2LNdWB_register_Asm_8 = 963, ARM_VLD2LNq16 = 964, ARM_VLD2LNq16Pseudo = 965, ARM_VLD2LNq16Pseudo_UPD = 966, ARM_VLD2LNq16_UPD = 967, ARM_VLD2LNq32 = 968, ARM_VLD2LNq32Pseudo = 969, ARM_VLD2LNq32Pseudo_UPD = 970, ARM_VLD2LNq32_UPD = 971, ARM_VLD2LNqAsm_16 = 972, ARM_VLD2LNqAsm_32 = 973, ARM_VLD2LNqWB_fixed_Asm_16 = 974, ARM_VLD2LNqWB_fixed_Asm_32 = 975, ARM_VLD2LNqWB_register_Asm_16 = 976, ARM_VLD2LNqWB_register_Asm_32 = 977, ARM_VLD2b16 = 978, ARM_VLD2b16wb_fixed = 979, ARM_VLD2b16wb_register = 980, ARM_VLD2b32 = 981, ARM_VLD2b32wb_fixed = 982, ARM_VLD2b32wb_register = 983, ARM_VLD2b8 = 984, ARM_VLD2b8wb_fixed = 985, ARM_VLD2b8wb_register = 986, ARM_VLD2d16 = 987, ARM_VLD2d16wb_fixed = 988, ARM_VLD2d16wb_register = 989, ARM_VLD2d32 = 990, ARM_VLD2d32wb_fixed = 991, ARM_VLD2d32wb_register = 992, ARM_VLD2d8 = 993, ARM_VLD2d8wb_fixed = 994, ARM_VLD2d8wb_register = 995, ARM_VLD2q16 = 996, ARM_VLD2q16Pseudo = 997, ARM_VLD2q16PseudoWB_fixed = 998, ARM_VLD2q16PseudoWB_register = 999, ARM_VLD2q16wb_fixed = 1000, ARM_VLD2q16wb_register = 1001, ARM_VLD2q32 = 1002, ARM_VLD2q32Pseudo = 1003, ARM_VLD2q32PseudoWB_fixed = 1004, ARM_VLD2q32PseudoWB_register = 1005, ARM_VLD2q32wb_fixed = 1006, ARM_VLD2q32wb_register = 1007, ARM_VLD2q8 = 1008, ARM_VLD2q8Pseudo = 1009, ARM_VLD2q8PseudoWB_fixed = 1010, ARM_VLD2q8PseudoWB_register = 1011, ARM_VLD2q8wb_fixed = 1012, ARM_VLD2q8wb_register = 1013, ARM_VLD3DUPd16 = 1014, ARM_VLD3DUPd16Pseudo = 1015, ARM_VLD3DUPd16Pseudo_UPD = 1016, ARM_VLD3DUPd16_UPD = 1017, ARM_VLD3DUPd32 = 1018, ARM_VLD3DUPd32Pseudo = 1019, ARM_VLD3DUPd32Pseudo_UPD = 1020, ARM_VLD3DUPd32_UPD = 1021, ARM_VLD3DUPd8 = 1022, ARM_VLD3DUPd8Pseudo = 1023, ARM_VLD3DUPd8Pseudo_UPD = 1024, ARM_VLD3DUPd8_UPD = 1025, ARM_VLD3DUPdAsm_16 = 1026, ARM_VLD3DUPdAsm_32 = 1027, ARM_VLD3DUPdAsm_8 = 1028, ARM_VLD3DUPdWB_fixed_Asm_16 = 1029, ARM_VLD3DUPdWB_fixed_Asm_32 = 1030, ARM_VLD3DUPdWB_fixed_Asm_8 = 1031, ARM_VLD3DUPdWB_register_Asm_16 = 1032, ARM_VLD3DUPdWB_register_Asm_32 = 1033, ARM_VLD3DUPdWB_register_Asm_8 = 1034, ARM_VLD3DUPq16 = 1035, ARM_VLD3DUPq16_UPD = 1036, ARM_VLD3DUPq32 = 1037, ARM_VLD3DUPq32_UPD = 1038, ARM_VLD3DUPq8 = 1039, ARM_VLD3DUPq8_UPD = 1040, ARM_VLD3DUPqAsm_16 = 1041, ARM_VLD3DUPqAsm_32 = 1042, ARM_VLD3DUPqAsm_8 = 1043, ARM_VLD3DUPqWB_fixed_Asm_16 = 1044, ARM_VLD3DUPqWB_fixed_Asm_32 = 1045, ARM_VLD3DUPqWB_fixed_Asm_8 = 1046, ARM_VLD3DUPqWB_register_Asm_16 = 1047, ARM_VLD3DUPqWB_register_Asm_32 = 1048, ARM_VLD3DUPqWB_register_Asm_8 = 1049, ARM_VLD3LNd16 = 1050, ARM_VLD3LNd16Pseudo = 1051, ARM_VLD3LNd16Pseudo_UPD = 1052, ARM_VLD3LNd16_UPD = 1053, ARM_VLD3LNd32 = 1054, ARM_VLD3LNd32Pseudo = 1055, ARM_VLD3LNd32Pseudo_UPD = 1056, ARM_VLD3LNd32_UPD = 1057, ARM_VLD3LNd8 = 1058, ARM_VLD3LNd8Pseudo = 1059, ARM_VLD3LNd8Pseudo_UPD = 1060, ARM_VLD3LNd8_UPD = 1061, ARM_VLD3LNdAsm_16 = 1062, ARM_VLD3LNdAsm_32 = 1063, ARM_VLD3LNdAsm_8 = 1064, ARM_VLD3LNdWB_fixed_Asm_16 = 1065, ARM_VLD3LNdWB_fixed_Asm_32 = 1066, ARM_VLD3LNdWB_fixed_Asm_8 = 1067, ARM_VLD3LNdWB_register_Asm_16 = 1068, ARM_VLD3LNdWB_register_Asm_32 = 1069, ARM_VLD3LNdWB_register_Asm_8 = 1070, ARM_VLD3LNq16 = 1071, ARM_VLD3LNq16Pseudo = 1072, ARM_VLD3LNq16Pseudo_UPD = 1073, ARM_VLD3LNq16_UPD = 1074, ARM_VLD3LNq32 = 1075, ARM_VLD3LNq32Pseudo = 1076, ARM_VLD3LNq32Pseudo_UPD = 1077, ARM_VLD3LNq32_UPD = 1078, ARM_VLD3LNqAsm_16 = 1079, ARM_VLD3LNqAsm_32 = 1080, ARM_VLD3LNqWB_fixed_Asm_16 = 1081, ARM_VLD3LNqWB_fixed_Asm_32 = 1082, ARM_VLD3LNqWB_register_Asm_16 = 1083, ARM_VLD3LNqWB_register_Asm_32 = 1084, ARM_VLD3d16 = 1085, ARM_VLD3d16Pseudo = 1086, ARM_VLD3d16Pseudo_UPD = 1087, ARM_VLD3d16_UPD = 1088, ARM_VLD3d32 = 1089, ARM_VLD3d32Pseudo = 1090, ARM_VLD3d32Pseudo_UPD = 1091, ARM_VLD3d32_UPD = 1092, ARM_VLD3d8 = 1093, ARM_VLD3d8Pseudo = 1094, ARM_VLD3d8Pseudo_UPD = 1095, ARM_VLD3d8_UPD = 1096, ARM_VLD3dAsm_16 = 1097, ARM_VLD3dAsm_32 = 1098, ARM_VLD3dAsm_8 = 1099, ARM_VLD3dWB_fixed_Asm_16 = 1100, ARM_VLD3dWB_fixed_Asm_32 = 1101, ARM_VLD3dWB_fixed_Asm_8 = 1102, ARM_VLD3dWB_register_Asm_16 = 1103, ARM_VLD3dWB_register_Asm_32 = 1104, ARM_VLD3dWB_register_Asm_8 = 1105, ARM_VLD3q16 = 1106, ARM_VLD3q16Pseudo_UPD = 1107, ARM_VLD3q16_UPD = 1108, ARM_VLD3q16oddPseudo = 1109, ARM_VLD3q16oddPseudo_UPD = 1110, ARM_VLD3q32 = 1111, ARM_VLD3q32Pseudo_UPD = 1112, ARM_VLD3q32_UPD = 1113, ARM_VLD3q32oddPseudo = 1114, ARM_VLD3q32oddPseudo_UPD = 1115, ARM_VLD3q8 = 1116, ARM_VLD3q8Pseudo_UPD = 1117, ARM_VLD3q8_UPD = 1118, ARM_VLD3q8oddPseudo = 1119, ARM_VLD3q8oddPseudo_UPD = 1120, ARM_VLD3qAsm_16 = 1121, ARM_VLD3qAsm_32 = 1122, ARM_VLD3qAsm_8 = 1123, ARM_VLD3qWB_fixed_Asm_16 = 1124, ARM_VLD3qWB_fixed_Asm_32 = 1125, ARM_VLD3qWB_fixed_Asm_8 = 1126, ARM_VLD3qWB_register_Asm_16 = 1127, ARM_VLD3qWB_register_Asm_32 = 1128, ARM_VLD3qWB_register_Asm_8 = 1129, ARM_VLD4DUPd16 = 1130, ARM_VLD4DUPd16Pseudo = 1131, ARM_VLD4DUPd16Pseudo_UPD = 1132, ARM_VLD4DUPd16_UPD = 1133, ARM_VLD4DUPd32 = 1134, ARM_VLD4DUPd32Pseudo = 1135, ARM_VLD4DUPd32Pseudo_UPD = 1136, ARM_VLD4DUPd32_UPD = 1137, ARM_VLD4DUPd8 = 1138, ARM_VLD4DUPd8Pseudo = 1139, ARM_VLD4DUPd8Pseudo_UPD = 1140, ARM_VLD4DUPd8_UPD = 1141, ARM_VLD4DUPdAsm_16 = 1142, ARM_VLD4DUPdAsm_32 = 1143, ARM_VLD4DUPdAsm_8 = 1144, ARM_VLD4DUPdWB_fixed_Asm_16 = 1145, ARM_VLD4DUPdWB_fixed_Asm_32 = 1146, ARM_VLD4DUPdWB_fixed_Asm_8 = 1147, ARM_VLD4DUPdWB_register_Asm_16 = 1148, ARM_VLD4DUPdWB_register_Asm_32 = 1149, ARM_VLD4DUPdWB_register_Asm_8 = 1150, ARM_VLD4DUPq16 = 1151, ARM_VLD4DUPq16_UPD = 1152, ARM_VLD4DUPq32 = 1153, ARM_VLD4DUPq32_UPD = 1154, ARM_VLD4DUPq8 = 1155, ARM_VLD4DUPq8_UPD = 1156, ARM_VLD4DUPqAsm_16 = 1157, ARM_VLD4DUPqAsm_32 = 1158, ARM_VLD4DUPqAsm_8 = 1159, ARM_VLD4DUPqWB_fixed_Asm_16 = 1160, ARM_VLD4DUPqWB_fixed_Asm_32 = 1161, ARM_VLD4DUPqWB_fixed_Asm_8 = 1162, ARM_VLD4DUPqWB_register_Asm_16 = 1163, ARM_VLD4DUPqWB_register_Asm_32 = 1164, ARM_VLD4DUPqWB_register_Asm_8 = 1165, ARM_VLD4LNd16 = 1166, ARM_VLD4LNd16Pseudo = 1167, ARM_VLD4LNd16Pseudo_UPD = 1168, ARM_VLD4LNd16_UPD = 1169, ARM_VLD4LNd32 = 1170, ARM_VLD4LNd32Pseudo = 1171, ARM_VLD4LNd32Pseudo_UPD = 1172, ARM_VLD4LNd32_UPD = 1173, ARM_VLD4LNd8 = 1174, ARM_VLD4LNd8Pseudo = 1175, ARM_VLD4LNd8Pseudo_UPD = 1176, ARM_VLD4LNd8_UPD = 1177, ARM_VLD4LNdAsm_16 = 1178, ARM_VLD4LNdAsm_32 = 1179, ARM_VLD4LNdAsm_8 = 1180, ARM_VLD4LNdWB_fixed_Asm_16 = 1181, ARM_VLD4LNdWB_fixed_Asm_32 = 1182, ARM_VLD4LNdWB_fixed_Asm_8 = 1183, ARM_VLD4LNdWB_register_Asm_16 = 1184, ARM_VLD4LNdWB_register_Asm_32 = 1185, ARM_VLD4LNdWB_register_Asm_8 = 1186, ARM_VLD4LNq16 = 1187, ARM_VLD4LNq16Pseudo = 1188, ARM_VLD4LNq16Pseudo_UPD = 1189, ARM_VLD4LNq16_UPD = 1190, ARM_VLD4LNq32 = 1191, ARM_VLD4LNq32Pseudo = 1192, ARM_VLD4LNq32Pseudo_UPD = 1193, ARM_VLD4LNq32_UPD = 1194, ARM_VLD4LNqAsm_16 = 1195, ARM_VLD4LNqAsm_32 = 1196, ARM_VLD4LNqWB_fixed_Asm_16 = 1197, ARM_VLD4LNqWB_fixed_Asm_32 = 1198, ARM_VLD4LNqWB_register_Asm_16 = 1199, ARM_VLD4LNqWB_register_Asm_32 = 1200, ARM_VLD4d16 = 1201, ARM_VLD4d16Pseudo = 1202, ARM_VLD4d16Pseudo_UPD = 1203, ARM_VLD4d16_UPD = 1204, ARM_VLD4d32 = 1205, ARM_VLD4d32Pseudo = 1206, ARM_VLD4d32Pseudo_UPD = 1207, ARM_VLD4d32_UPD = 1208, ARM_VLD4d8 = 1209, ARM_VLD4d8Pseudo = 1210, ARM_VLD4d8Pseudo_UPD = 1211, ARM_VLD4d8_UPD = 1212, ARM_VLD4dAsm_16 = 1213, ARM_VLD4dAsm_32 = 1214, ARM_VLD4dAsm_8 = 1215, ARM_VLD4dWB_fixed_Asm_16 = 1216, ARM_VLD4dWB_fixed_Asm_32 = 1217, ARM_VLD4dWB_fixed_Asm_8 = 1218, ARM_VLD4dWB_register_Asm_16 = 1219, ARM_VLD4dWB_register_Asm_32 = 1220, ARM_VLD4dWB_register_Asm_8 = 1221, ARM_VLD4q16 = 1222, ARM_VLD4q16Pseudo_UPD = 1223, ARM_VLD4q16_UPD = 1224, ARM_VLD4q16oddPseudo = 1225, ARM_VLD4q16oddPseudo_UPD = 1226, ARM_VLD4q32 = 1227, ARM_VLD4q32Pseudo_UPD = 1228, ARM_VLD4q32_UPD = 1229, ARM_VLD4q32oddPseudo = 1230, ARM_VLD4q32oddPseudo_UPD = 1231, ARM_VLD4q8 = 1232, ARM_VLD4q8Pseudo_UPD = 1233, ARM_VLD4q8_UPD = 1234, ARM_VLD4q8oddPseudo = 1235, ARM_VLD4q8oddPseudo_UPD = 1236, ARM_VLD4qAsm_16 = 1237, ARM_VLD4qAsm_32 = 1238, ARM_VLD4qAsm_8 = 1239, ARM_VLD4qWB_fixed_Asm_16 = 1240, ARM_VLD4qWB_fixed_Asm_32 = 1241, ARM_VLD4qWB_fixed_Asm_8 = 1242, ARM_VLD4qWB_register_Asm_16 = 1243, ARM_VLD4qWB_register_Asm_32 = 1244, ARM_VLD4qWB_register_Asm_8 = 1245, ARM_VLDMDDB_UPD = 1246, ARM_VLDMDIA = 1247, ARM_VLDMDIA_UPD = 1248, ARM_VLDMQIA = 1249, ARM_VLDMSDB_UPD = 1250, ARM_VLDMSIA = 1251, ARM_VLDMSIA_UPD = 1252, ARM_VLDRD = 1253, ARM_VLDRS = 1254, ARM_VMAXNMD = 1255, ARM_VMAXNMND = 1256, ARM_VMAXNMNQ = 1257, ARM_VMAXNMS = 1258, ARM_VMAXfd = 1259, ARM_VMAXfq = 1260, ARM_VMAXsv16i8 = 1261, ARM_VMAXsv2i32 = 1262, ARM_VMAXsv4i16 = 1263, ARM_VMAXsv4i32 = 1264, ARM_VMAXsv8i16 = 1265, ARM_VMAXsv8i8 = 1266, ARM_VMAXuv16i8 = 1267, ARM_VMAXuv2i32 = 1268, ARM_VMAXuv4i16 = 1269, ARM_VMAXuv4i32 = 1270, ARM_VMAXuv8i16 = 1271, ARM_VMAXuv8i8 = 1272, ARM_VMINNMD = 1273, ARM_VMINNMND = 1274, ARM_VMINNMNQ = 1275, ARM_VMINNMS = 1276, ARM_VMINfd = 1277, ARM_VMINfq = 1278, ARM_VMINsv16i8 = 1279, ARM_VMINsv2i32 = 1280, ARM_VMINsv4i16 = 1281, ARM_VMINsv4i32 = 1282, ARM_VMINsv8i16 = 1283, ARM_VMINsv8i8 = 1284, ARM_VMINuv16i8 = 1285, ARM_VMINuv2i32 = 1286, ARM_VMINuv4i16 = 1287, ARM_VMINuv4i32 = 1288, ARM_VMINuv8i16 = 1289, ARM_VMINuv8i8 = 1290, ARM_VMLAD = 1291, ARM_VMLALslsv2i32 = 1292, ARM_VMLALslsv4i16 = 1293, ARM_VMLALsluv2i32 = 1294, ARM_VMLALsluv4i16 = 1295, ARM_VMLALsv2i64 = 1296, ARM_VMLALsv4i32 = 1297, ARM_VMLALsv8i16 = 1298, ARM_VMLALuv2i64 = 1299, ARM_VMLALuv4i32 = 1300, ARM_VMLALuv8i16 = 1301, ARM_VMLAS = 1302, ARM_VMLAfd = 1303, ARM_VMLAfq = 1304, ARM_VMLAslfd = 1305, ARM_VMLAslfq = 1306, ARM_VMLAslv2i32 = 1307, ARM_VMLAslv4i16 = 1308, ARM_VMLAslv4i32 = 1309, ARM_VMLAslv8i16 = 1310, ARM_VMLAv16i8 = 1311, ARM_VMLAv2i32 = 1312, ARM_VMLAv4i16 = 1313, ARM_VMLAv4i32 = 1314, ARM_VMLAv8i16 = 1315, ARM_VMLAv8i8 = 1316, ARM_VMLSD = 1317, ARM_VMLSLslsv2i32 = 1318, ARM_VMLSLslsv4i16 = 1319, ARM_VMLSLsluv2i32 = 1320, ARM_VMLSLsluv4i16 = 1321, ARM_VMLSLsv2i64 = 1322, ARM_VMLSLsv4i32 = 1323, ARM_VMLSLsv8i16 = 1324, ARM_VMLSLuv2i64 = 1325, ARM_VMLSLuv4i32 = 1326, ARM_VMLSLuv8i16 = 1327, ARM_VMLSS = 1328, ARM_VMLSfd = 1329, ARM_VMLSfq = 1330, ARM_VMLSslfd = 1331, ARM_VMLSslfq = 1332, ARM_VMLSslv2i32 = 1333, ARM_VMLSslv4i16 = 1334, ARM_VMLSslv4i32 = 1335, ARM_VMLSslv8i16 = 1336, ARM_VMLSv16i8 = 1337, ARM_VMLSv2i32 = 1338, ARM_VMLSv4i16 = 1339, ARM_VMLSv4i32 = 1340, ARM_VMLSv8i16 = 1341, ARM_VMLSv8i8 = 1342, ARM_VMOVD = 1343, ARM_VMOVD0 = 1344, ARM_VMOVDRR = 1345, ARM_VMOVDcc = 1346, ARM_VMOVLsv2i64 = 1347, ARM_VMOVLsv4i32 = 1348, ARM_VMOVLsv8i16 = 1349, ARM_VMOVLuv2i64 = 1350, ARM_VMOVLuv4i32 = 1351, ARM_VMOVLuv8i16 = 1352, ARM_VMOVNv2i32 = 1353, ARM_VMOVNv4i16 = 1354, ARM_VMOVNv8i8 = 1355, ARM_VMOVQ0 = 1356, ARM_VMOVRRD = 1357, ARM_VMOVRRS = 1358, ARM_VMOVRS = 1359, ARM_VMOVS = 1360, ARM_VMOVSR = 1361, ARM_VMOVSRR = 1362, ARM_VMOVScc = 1363, ARM_VMOVv16i8 = 1364, ARM_VMOVv1i64 = 1365, ARM_VMOVv2f32 = 1366, ARM_VMOVv2i32 = 1367, ARM_VMOVv2i64 = 1368, ARM_VMOVv4f32 = 1369, ARM_VMOVv4i16 = 1370, ARM_VMOVv4i32 = 1371, ARM_VMOVv8i16 = 1372, ARM_VMOVv8i8 = 1373, ARM_VMRS = 1374, ARM_VMRS_FPEXC = 1375, ARM_VMRS_FPINST = 1376, ARM_VMRS_FPINST2 = 1377, ARM_VMRS_FPSID = 1378, ARM_VMRS_MVFR0 = 1379, ARM_VMRS_MVFR1 = 1380, ARM_VMRS_MVFR2 = 1381, ARM_VMSR = 1382, ARM_VMSR_FPEXC = 1383, ARM_VMSR_FPINST = 1384, ARM_VMSR_FPINST2 = 1385, ARM_VMSR_FPSID = 1386, ARM_VMULD = 1387, ARM_VMULLp64 = 1388, ARM_VMULLp8 = 1389, ARM_VMULLslsv2i32 = 1390, ARM_VMULLslsv4i16 = 1391, ARM_VMULLsluv2i32 = 1392, ARM_VMULLsluv4i16 = 1393, ARM_VMULLsv2i64 = 1394, ARM_VMULLsv4i32 = 1395, ARM_VMULLsv8i16 = 1396, ARM_VMULLuv2i64 = 1397, ARM_VMULLuv4i32 = 1398, ARM_VMULLuv8i16 = 1399, ARM_VMULS = 1400, ARM_VMULfd = 1401, ARM_VMULfq = 1402, ARM_VMULpd = 1403, ARM_VMULpq = 1404, ARM_VMULslfd = 1405, ARM_VMULslfq = 1406, ARM_VMULslv2i32 = 1407, ARM_VMULslv4i16 = 1408, ARM_VMULslv4i32 = 1409, ARM_VMULslv8i16 = 1410, ARM_VMULv16i8 = 1411, ARM_VMULv2i32 = 1412, ARM_VMULv4i16 = 1413, ARM_VMULv4i32 = 1414, ARM_VMULv8i16 = 1415, ARM_VMULv8i8 = 1416, ARM_VMVNd = 1417, ARM_VMVNq = 1418, ARM_VMVNv2i32 = 1419, ARM_VMVNv4i16 = 1420, ARM_VMVNv4i32 = 1421, ARM_VMVNv8i16 = 1422, ARM_VNEGD = 1423, ARM_VNEGS = 1424, ARM_VNEGf32q = 1425, ARM_VNEGfd = 1426, ARM_VNEGs16d = 1427, ARM_VNEGs16q = 1428, ARM_VNEGs32d = 1429, ARM_VNEGs32q = 1430, ARM_VNEGs8d = 1431, ARM_VNEGs8q = 1432, ARM_VNMLAD = 1433, ARM_VNMLAS = 1434, ARM_VNMLSD = 1435, ARM_VNMLSS = 1436, ARM_VNMULD = 1437, ARM_VNMULS = 1438, ARM_VORNd = 1439, ARM_VORNq = 1440, ARM_VORRd = 1441, ARM_VORRiv2i32 = 1442, ARM_VORRiv4i16 = 1443, ARM_VORRiv4i32 = 1444, ARM_VORRiv8i16 = 1445, ARM_VORRq = 1446, ARM_VPADALsv16i8 = 1447, ARM_VPADALsv2i32 = 1448, ARM_VPADALsv4i16 = 1449, ARM_VPADALsv4i32 = 1450, ARM_VPADALsv8i16 = 1451, ARM_VPADALsv8i8 = 1452, ARM_VPADALuv16i8 = 1453, ARM_VPADALuv2i32 = 1454, ARM_VPADALuv4i16 = 1455, ARM_VPADALuv4i32 = 1456, ARM_VPADALuv8i16 = 1457, ARM_VPADALuv8i8 = 1458, ARM_VPADDLsv16i8 = 1459, ARM_VPADDLsv2i32 = 1460, ARM_VPADDLsv4i16 = 1461, ARM_VPADDLsv4i32 = 1462, ARM_VPADDLsv8i16 = 1463, ARM_VPADDLsv8i8 = 1464, ARM_VPADDLuv16i8 = 1465, ARM_VPADDLuv2i32 = 1466, ARM_VPADDLuv4i16 = 1467, ARM_VPADDLuv4i32 = 1468, ARM_VPADDLuv8i16 = 1469, ARM_VPADDLuv8i8 = 1470, ARM_VPADDf = 1471, ARM_VPADDi16 = 1472, ARM_VPADDi32 = 1473, ARM_VPADDi8 = 1474, ARM_VPMAXf = 1475, ARM_VPMAXs16 = 1476, ARM_VPMAXs32 = 1477, ARM_VPMAXs8 = 1478, ARM_VPMAXu16 = 1479, ARM_VPMAXu32 = 1480, ARM_VPMAXu8 = 1481, ARM_VPMINf = 1482, ARM_VPMINs16 = 1483, ARM_VPMINs32 = 1484, ARM_VPMINs8 = 1485, ARM_VPMINu16 = 1486, ARM_VPMINu32 = 1487, ARM_VPMINu8 = 1488, ARM_VQABSv16i8 = 1489, ARM_VQABSv2i32 = 1490, ARM_VQABSv4i16 = 1491, ARM_VQABSv4i32 = 1492, ARM_VQABSv8i16 = 1493, ARM_VQABSv8i8 = 1494, ARM_VQADDsv16i8 = 1495, ARM_VQADDsv1i64 = 1496, ARM_VQADDsv2i32 = 1497, ARM_VQADDsv2i64 = 1498, ARM_VQADDsv4i16 = 1499, ARM_VQADDsv4i32 = 1500, ARM_VQADDsv8i16 = 1501, ARM_VQADDsv8i8 = 1502, ARM_VQADDuv16i8 = 1503, ARM_VQADDuv1i64 = 1504, ARM_VQADDuv2i32 = 1505, ARM_VQADDuv2i64 = 1506, ARM_VQADDuv4i16 = 1507, ARM_VQADDuv4i32 = 1508, ARM_VQADDuv8i16 = 1509, ARM_VQADDuv8i8 = 1510, ARM_VQDMLALslv2i32 = 1511, ARM_VQDMLALslv4i16 = 1512, ARM_VQDMLALv2i64 = 1513, ARM_VQDMLALv4i32 = 1514, ARM_VQDMLSLslv2i32 = 1515, ARM_VQDMLSLslv4i16 = 1516, ARM_VQDMLSLv2i64 = 1517, ARM_VQDMLSLv4i32 = 1518, ARM_VQDMULHslv2i32 = 1519, ARM_VQDMULHslv4i16 = 1520, ARM_VQDMULHslv4i32 = 1521, ARM_VQDMULHslv8i16 = 1522, ARM_VQDMULHv2i32 = 1523, ARM_VQDMULHv4i16 = 1524, ARM_VQDMULHv4i32 = 1525, ARM_VQDMULHv8i16 = 1526, ARM_VQDMULLslv2i32 = 1527, ARM_VQDMULLslv4i16 = 1528, ARM_VQDMULLv2i64 = 1529, ARM_VQDMULLv4i32 = 1530, ARM_VQMOVNsuv2i32 = 1531, ARM_VQMOVNsuv4i16 = 1532, ARM_VQMOVNsuv8i8 = 1533, ARM_VQMOVNsv2i32 = 1534, ARM_VQMOVNsv4i16 = 1535, ARM_VQMOVNsv8i8 = 1536, ARM_VQMOVNuv2i32 = 1537, ARM_VQMOVNuv4i16 = 1538, ARM_VQMOVNuv8i8 = 1539, ARM_VQNEGv16i8 = 1540, ARM_VQNEGv2i32 = 1541, ARM_VQNEGv4i16 = 1542, ARM_VQNEGv4i32 = 1543, ARM_VQNEGv8i16 = 1544, ARM_VQNEGv8i8 = 1545, ARM_VQRDMULHslv2i32 = 1546, ARM_VQRDMULHslv4i16 = 1547, ARM_VQRDMULHslv4i32 = 1548, ARM_VQRDMULHslv8i16 = 1549, ARM_VQRDMULHv2i32 = 1550, ARM_VQRDMULHv4i16 = 1551, ARM_VQRDMULHv4i32 = 1552, ARM_VQRDMULHv8i16 = 1553, ARM_VQRSHLsv16i8 = 1554, ARM_VQRSHLsv1i64 = 1555, ARM_VQRSHLsv2i32 = 1556, ARM_VQRSHLsv2i64 = 1557, ARM_VQRSHLsv4i16 = 1558, ARM_VQRSHLsv4i32 = 1559, ARM_VQRSHLsv8i16 = 1560, ARM_VQRSHLsv8i8 = 1561, ARM_VQRSHLuv16i8 = 1562, ARM_VQRSHLuv1i64 = 1563, ARM_VQRSHLuv2i32 = 1564, ARM_VQRSHLuv2i64 = 1565, ARM_VQRSHLuv4i16 = 1566, ARM_VQRSHLuv4i32 = 1567, ARM_VQRSHLuv8i16 = 1568, ARM_VQRSHLuv8i8 = 1569, ARM_VQRSHRNsv2i32 = 1570, ARM_VQRSHRNsv4i16 = 1571, ARM_VQRSHRNsv8i8 = 1572, ARM_VQRSHRNuv2i32 = 1573, ARM_VQRSHRNuv4i16 = 1574, ARM_VQRSHRNuv8i8 = 1575, ARM_VQRSHRUNv2i32 = 1576, ARM_VQRSHRUNv4i16 = 1577, ARM_VQRSHRUNv8i8 = 1578, ARM_VQSHLsiv16i8 = 1579, ARM_VQSHLsiv1i64 = 1580, ARM_VQSHLsiv2i32 = 1581, ARM_VQSHLsiv2i64 = 1582, ARM_VQSHLsiv4i16 = 1583, ARM_VQSHLsiv4i32 = 1584, ARM_VQSHLsiv8i16 = 1585, ARM_VQSHLsiv8i8 = 1586, ARM_VQSHLsuv16i8 = 1587, ARM_VQSHLsuv1i64 = 1588, ARM_VQSHLsuv2i32 = 1589, ARM_VQSHLsuv2i64 = 1590, ARM_VQSHLsuv4i16 = 1591, ARM_VQSHLsuv4i32 = 1592, ARM_VQSHLsuv8i16 = 1593, ARM_VQSHLsuv8i8 = 1594, ARM_VQSHLsv16i8 = 1595, ARM_VQSHLsv1i64 = 1596, ARM_VQSHLsv2i32 = 1597, ARM_VQSHLsv2i64 = 1598, ARM_VQSHLsv4i16 = 1599, ARM_VQSHLsv4i32 = 1600, ARM_VQSHLsv8i16 = 1601, ARM_VQSHLsv8i8 = 1602, ARM_VQSHLuiv16i8 = 1603, ARM_VQSHLuiv1i64 = 1604, ARM_VQSHLuiv2i32 = 1605, ARM_VQSHLuiv2i64 = 1606, ARM_VQSHLuiv4i16 = 1607, ARM_VQSHLuiv4i32 = 1608, ARM_VQSHLuiv8i16 = 1609, ARM_VQSHLuiv8i8 = 1610, ARM_VQSHLuv16i8 = 1611, ARM_VQSHLuv1i64 = 1612, ARM_VQSHLuv2i32 = 1613, ARM_VQSHLuv2i64 = 1614, ARM_VQSHLuv4i16 = 1615, ARM_VQSHLuv4i32 = 1616, ARM_VQSHLuv8i16 = 1617, ARM_VQSHLuv8i8 = 1618, ARM_VQSHRNsv2i32 = 1619, ARM_VQSHRNsv4i16 = 1620, ARM_VQSHRNsv8i8 = 1621, ARM_VQSHRNuv2i32 = 1622, ARM_VQSHRNuv4i16 = 1623, ARM_VQSHRNuv8i8 = 1624, ARM_VQSHRUNv2i32 = 1625, ARM_VQSHRUNv4i16 = 1626, ARM_VQSHRUNv8i8 = 1627, ARM_VQSUBsv16i8 = 1628, ARM_VQSUBsv1i64 = 1629, ARM_VQSUBsv2i32 = 1630, ARM_VQSUBsv2i64 = 1631, ARM_VQSUBsv4i16 = 1632, ARM_VQSUBsv4i32 = 1633, ARM_VQSUBsv8i16 = 1634, ARM_VQSUBsv8i8 = 1635, ARM_VQSUBuv16i8 = 1636, ARM_VQSUBuv1i64 = 1637, ARM_VQSUBuv2i32 = 1638, ARM_VQSUBuv2i64 = 1639, ARM_VQSUBuv4i16 = 1640, ARM_VQSUBuv4i32 = 1641, ARM_VQSUBuv8i16 = 1642, ARM_VQSUBuv8i8 = 1643, ARM_VRADDHNv2i32 = 1644, ARM_VRADDHNv4i16 = 1645, ARM_VRADDHNv8i8 = 1646, ARM_VRECPEd = 1647, ARM_VRECPEfd = 1648, ARM_VRECPEfq = 1649, ARM_VRECPEq = 1650, ARM_VRECPSfd = 1651, ARM_VRECPSfq = 1652, ARM_VREV16d8 = 1653, ARM_VREV16q8 = 1654, ARM_VREV32d16 = 1655, ARM_VREV32d8 = 1656, ARM_VREV32q16 = 1657, ARM_VREV32q8 = 1658, ARM_VREV64d16 = 1659, ARM_VREV64d32 = 1660, ARM_VREV64d8 = 1661, ARM_VREV64q16 = 1662, ARM_VREV64q32 = 1663, ARM_VREV64q8 = 1664, ARM_VRHADDsv16i8 = 1665, ARM_VRHADDsv2i32 = 1666, ARM_VRHADDsv4i16 = 1667, ARM_VRHADDsv4i32 = 1668, ARM_VRHADDsv8i16 = 1669, ARM_VRHADDsv8i8 = 1670, ARM_VRHADDuv16i8 = 1671, ARM_VRHADDuv2i32 = 1672, ARM_VRHADDuv4i16 = 1673, ARM_VRHADDuv4i32 = 1674, ARM_VRHADDuv8i16 = 1675, ARM_VRHADDuv8i8 = 1676, ARM_VRINTAD = 1677, ARM_VRINTAND = 1678, ARM_VRINTANQ = 1679, ARM_VRINTAS = 1680, ARM_VRINTMD = 1681, ARM_VRINTMND = 1682, ARM_VRINTMNQ = 1683, ARM_VRINTMS = 1684, ARM_VRINTND = 1685, ARM_VRINTNND = 1686, ARM_VRINTNNQ = 1687, ARM_VRINTNS = 1688, ARM_VRINTPD = 1689, ARM_VRINTPND = 1690, ARM_VRINTPNQ = 1691, ARM_VRINTPS = 1692, ARM_VRINTRD = 1693, ARM_VRINTRS = 1694, ARM_VRINTXD = 1695, ARM_VRINTXND = 1696, ARM_VRINTXNQ = 1697, ARM_VRINTXS = 1698, ARM_VRINTZD = 1699, ARM_VRINTZND = 1700, ARM_VRINTZNQ = 1701, ARM_VRINTZS = 1702, ARM_VRSHLsv16i8 = 1703, ARM_VRSHLsv1i64 = 1704, ARM_VRSHLsv2i32 = 1705, ARM_VRSHLsv2i64 = 1706, ARM_VRSHLsv4i16 = 1707, ARM_VRSHLsv4i32 = 1708, ARM_VRSHLsv8i16 = 1709, ARM_VRSHLsv8i8 = 1710, ARM_VRSHLuv16i8 = 1711, ARM_VRSHLuv1i64 = 1712, ARM_VRSHLuv2i32 = 1713, ARM_VRSHLuv2i64 = 1714, ARM_VRSHLuv4i16 = 1715, ARM_VRSHLuv4i32 = 1716, ARM_VRSHLuv8i16 = 1717, ARM_VRSHLuv8i8 = 1718, ARM_VRSHRNv2i32 = 1719, ARM_VRSHRNv4i16 = 1720, ARM_VRSHRNv8i8 = 1721, ARM_VRSHRsv16i8 = 1722, ARM_VRSHRsv1i64 = 1723, ARM_VRSHRsv2i32 = 1724, ARM_VRSHRsv2i64 = 1725, ARM_VRSHRsv4i16 = 1726, ARM_VRSHRsv4i32 = 1727, ARM_VRSHRsv8i16 = 1728, ARM_VRSHRsv8i8 = 1729, ARM_VRSHRuv16i8 = 1730, ARM_VRSHRuv1i64 = 1731, ARM_VRSHRuv2i32 = 1732, ARM_VRSHRuv2i64 = 1733, ARM_VRSHRuv4i16 = 1734, ARM_VRSHRuv4i32 = 1735, ARM_VRSHRuv8i16 = 1736, ARM_VRSHRuv8i8 = 1737, ARM_VRSQRTEd = 1738, ARM_VRSQRTEfd = 1739, ARM_VRSQRTEfq = 1740, ARM_VRSQRTEq = 1741, ARM_VRSQRTSfd = 1742, ARM_VRSQRTSfq = 1743, ARM_VRSRAsv16i8 = 1744, ARM_VRSRAsv1i64 = 1745, ARM_VRSRAsv2i32 = 1746, ARM_VRSRAsv2i64 = 1747, ARM_VRSRAsv4i16 = 1748, ARM_VRSRAsv4i32 = 1749, ARM_VRSRAsv8i16 = 1750, ARM_VRSRAsv8i8 = 1751, ARM_VRSRAuv16i8 = 1752, ARM_VRSRAuv1i64 = 1753, ARM_VRSRAuv2i32 = 1754, ARM_VRSRAuv2i64 = 1755, ARM_VRSRAuv4i16 = 1756, ARM_VRSRAuv4i32 = 1757, ARM_VRSRAuv8i16 = 1758, ARM_VRSRAuv8i8 = 1759, ARM_VRSUBHNv2i32 = 1760, ARM_VRSUBHNv4i16 = 1761, ARM_VRSUBHNv8i8 = 1762, ARM_VSELEQD = 1763, ARM_VSELEQS = 1764, ARM_VSELGED = 1765, ARM_VSELGES = 1766, ARM_VSELGTD = 1767, ARM_VSELGTS = 1768, ARM_VSELVSD = 1769, ARM_VSELVSS = 1770, ARM_VSETLNi16 = 1771, ARM_VSETLNi32 = 1772, ARM_VSETLNi8 = 1773, ARM_VSHLLi16 = 1774, ARM_VSHLLi32 = 1775, ARM_VSHLLi8 = 1776, ARM_VSHLLsv2i64 = 1777, ARM_VSHLLsv4i32 = 1778, ARM_VSHLLsv8i16 = 1779, ARM_VSHLLuv2i64 = 1780, ARM_VSHLLuv4i32 = 1781, ARM_VSHLLuv8i16 = 1782, ARM_VSHLiv16i8 = 1783, ARM_VSHLiv1i64 = 1784, ARM_VSHLiv2i32 = 1785, ARM_VSHLiv2i64 = 1786, ARM_VSHLiv4i16 = 1787, ARM_VSHLiv4i32 = 1788, ARM_VSHLiv8i16 = 1789, ARM_VSHLiv8i8 = 1790, ARM_VSHLsv16i8 = 1791, ARM_VSHLsv1i64 = 1792, ARM_VSHLsv2i32 = 1793, ARM_VSHLsv2i64 = 1794, ARM_VSHLsv4i16 = 1795, ARM_VSHLsv4i32 = 1796, ARM_VSHLsv8i16 = 1797, ARM_VSHLsv8i8 = 1798, ARM_VSHLuv16i8 = 1799, ARM_VSHLuv1i64 = 1800, ARM_VSHLuv2i32 = 1801, ARM_VSHLuv2i64 = 1802, ARM_VSHLuv4i16 = 1803, ARM_VSHLuv4i32 = 1804, ARM_VSHLuv8i16 = 1805, ARM_VSHLuv8i8 = 1806, ARM_VSHRNv2i32 = 1807, ARM_VSHRNv4i16 = 1808, ARM_VSHRNv8i8 = 1809, ARM_VSHRsv16i8 = 1810, ARM_VSHRsv1i64 = 1811, ARM_VSHRsv2i32 = 1812, ARM_VSHRsv2i64 = 1813, ARM_VSHRsv4i16 = 1814, ARM_VSHRsv4i32 = 1815, ARM_VSHRsv8i16 = 1816, ARM_VSHRsv8i8 = 1817, ARM_VSHRuv16i8 = 1818, ARM_VSHRuv1i64 = 1819, ARM_VSHRuv2i32 = 1820, ARM_VSHRuv2i64 = 1821, ARM_VSHRuv4i16 = 1822, ARM_VSHRuv4i32 = 1823, ARM_VSHRuv8i16 = 1824, ARM_VSHRuv8i8 = 1825, ARM_VSHTOD = 1826, ARM_VSHTOS = 1827, ARM_VSITOD = 1828, ARM_VSITOS = 1829, ARM_VSLIv16i8 = 1830, ARM_VSLIv1i64 = 1831, ARM_VSLIv2i32 = 1832, ARM_VSLIv2i64 = 1833, ARM_VSLIv4i16 = 1834, ARM_VSLIv4i32 = 1835, ARM_VSLIv8i16 = 1836, ARM_VSLIv8i8 = 1837, ARM_VSLTOD = 1838, ARM_VSLTOS = 1839, ARM_VSQRTD = 1840, ARM_VSQRTS = 1841, ARM_VSRAsv16i8 = 1842, ARM_VSRAsv1i64 = 1843, ARM_VSRAsv2i32 = 1844, ARM_VSRAsv2i64 = 1845, ARM_VSRAsv4i16 = 1846, ARM_VSRAsv4i32 = 1847, ARM_VSRAsv8i16 = 1848, ARM_VSRAsv8i8 = 1849, ARM_VSRAuv16i8 = 1850, ARM_VSRAuv1i64 = 1851, ARM_VSRAuv2i32 = 1852, ARM_VSRAuv2i64 = 1853, ARM_VSRAuv4i16 = 1854, ARM_VSRAuv4i32 = 1855, ARM_VSRAuv8i16 = 1856, ARM_VSRAuv8i8 = 1857, ARM_VSRIv16i8 = 1858, ARM_VSRIv1i64 = 1859, ARM_VSRIv2i32 = 1860, ARM_VSRIv2i64 = 1861, ARM_VSRIv4i16 = 1862, ARM_VSRIv4i32 = 1863, ARM_VSRIv8i16 = 1864, ARM_VSRIv8i8 = 1865, ARM_VST1LNd16 = 1866, ARM_VST1LNd16_UPD = 1867, ARM_VST1LNd32 = 1868, ARM_VST1LNd32_UPD = 1869, ARM_VST1LNd8 = 1870, ARM_VST1LNd8_UPD = 1871, ARM_VST1LNdAsm_16 = 1872, ARM_VST1LNdAsm_32 = 1873, ARM_VST1LNdAsm_8 = 1874, ARM_VST1LNdWB_fixed_Asm_16 = 1875, ARM_VST1LNdWB_fixed_Asm_32 = 1876, ARM_VST1LNdWB_fixed_Asm_8 = 1877, ARM_VST1LNdWB_register_Asm_16 = 1878, ARM_VST1LNdWB_register_Asm_32 = 1879, ARM_VST1LNdWB_register_Asm_8 = 1880, ARM_VST1LNq16Pseudo = 1881, ARM_VST1LNq16Pseudo_UPD = 1882, ARM_VST1LNq32Pseudo = 1883, ARM_VST1LNq32Pseudo_UPD = 1884, ARM_VST1LNq8Pseudo = 1885, ARM_VST1LNq8Pseudo_UPD = 1886, ARM_VST1d16 = 1887, ARM_VST1d16Q = 1888, ARM_VST1d16Qwb_fixed = 1889, ARM_VST1d16Qwb_register = 1890, ARM_VST1d16T = 1891, ARM_VST1d16Twb_fixed = 1892, ARM_VST1d16Twb_register = 1893, ARM_VST1d16wb_fixed = 1894, ARM_VST1d16wb_register = 1895, ARM_VST1d32 = 1896, ARM_VST1d32Q = 1897, ARM_VST1d32Qwb_fixed = 1898, ARM_VST1d32Qwb_register = 1899, ARM_VST1d32T = 1900, ARM_VST1d32Twb_fixed = 1901, ARM_VST1d32Twb_register = 1902, ARM_VST1d32wb_fixed = 1903, ARM_VST1d32wb_register = 1904, ARM_VST1d64 = 1905, ARM_VST1d64Q = 1906, ARM_VST1d64QPseudo = 1907, ARM_VST1d64QPseudoWB_fixed = 1908, ARM_VST1d64QPseudoWB_register = 1909, ARM_VST1d64Qwb_fixed = 1910, ARM_VST1d64Qwb_register = 1911, ARM_VST1d64T = 1912, ARM_VST1d64TPseudo = 1913, ARM_VST1d64TPseudoWB_fixed = 1914, ARM_VST1d64TPseudoWB_register = 1915, ARM_VST1d64Twb_fixed = 1916, ARM_VST1d64Twb_register = 1917, ARM_VST1d64wb_fixed = 1918, ARM_VST1d64wb_register = 1919, ARM_VST1d8 = 1920, ARM_VST1d8Q = 1921, ARM_VST1d8Qwb_fixed = 1922, ARM_VST1d8Qwb_register = 1923, ARM_VST1d8T = 1924, ARM_VST1d8Twb_fixed = 1925, ARM_VST1d8Twb_register = 1926, ARM_VST1d8wb_fixed = 1927, ARM_VST1d8wb_register = 1928, ARM_VST1q16 = 1929, ARM_VST1q16wb_fixed = 1930, ARM_VST1q16wb_register = 1931, ARM_VST1q32 = 1932, ARM_VST1q32wb_fixed = 1933, ARM_VST1q32wb_register = 1934, ARM_VST1q64 = 1935, ARM_VST1q64wb_fixed = 1936, ARM_VST1q64wb_register = 1937, ARM_VST1q8 = 1938, ARM_VST1q8wb_fixed = 1939, ARM_VST1q8wb_register = 1940, ARM_VST2LNd16 = 1941, ARM_VST2LNd16Pseudo = 1942, ARM_VST2LNd16Pseudo_UPD = 1943, ARM_VST2LNd16_UPD = 1944, ARM_VST2LNd32 = 1945, ARM_VST2LNd32Pseudo = 1946, ARM_VST2LNd32Pseudo_UPD = 1947, ARM_VST2LNd32_UPD = 1948, ARM_VST2LNd8 = 1949, ARM_VST2LNd8Pseudo = 1950, ARM_VST2LNd8Pseudo_UPD = 1951, ARM_VST2LNd8_UPD = 1952, ARM_VST2LNdAsm_16 = 1953, ARM_VST2LNdAsm_32 = 1954, ARM_VST2LNdAsm_8 = 1955, ARM_VST2LNdWB_fixed_Asm_16 = 1956, ARM_VST2LNdWB_fixed_Asm_32 = 1957, ARM_VST2LNdWB_fixed_Asm_8 = 1958, ARM_VST2LNdWB_register_Asm_16 = 1959, ARM_VST2LNdWB_register_Asm_32 = 1960, ARM_VST2LNdWB_register_Asm_8 = 1961, ARM_VST2LNq16 = 1962, ARM_VST2LNq16Pseudo = 1963, ARM_VST2LNq16Pseudo_UPD = 1964, ARM_VST2LNq16_UPD = 1965, ARM_VST2LNq32 = 1966, ARM_VST2LNq32Pseudo = 1967, ARM_VST2LNq32Pseudo_UPD = 1968, ARM_VST2LNq32_UPD = 1969, ARM_VST2LNqAsm_16 = 1970, ARM_VST2LNqAsm_32 = 1971, ARM_VST2LNqWB_fixed_Asm_16 = 1972, ARM_VST2LNqWB_fixed_Asm_32 = 1973, ARM_VST2LNqWB_register_Asm_16 = 1974, ARM_VST2LNqWB_register_Asm_32 = 1975, ARM_VST2b16 = 1976, ARM_VST2b16wb_fixed = 1977, ARM_VST2b16wb_register = 1978, ARM_VST2b32 = 1979, ARM_VST2b32wb_fixed = 1980, ARM_VST2b32wb_register = 1981, ARM_VST2b8 = 1982, ARM_VST2b8wb_fixed = 1983, ARM_VST2b8wb_register = 1984, ARM_VST2d16 = 1985, ARM_VST2d16wb_fixed = 1986, ARM_VST2d16wb_register = 1987, ARM_VST2d32 = 1988, ARM_VST2d32wb_fixed = 1989, ARM_VST2d32wb_register = 1990, ARM_VST2d8 = 1991, ARM_VST2d8wb_fixed = 1992, ARM_VST2d8wb_register = 1993, ARM_VST2q16 = 1994, ARM_VST2q16Pseudo = 1995, ARM_VST2q16PseudoWB_fixed = 1996, ARM_VST2q16PseudoWB_register = 1997, ARM_VST2q16wb_fixed = 1998, ARM_VST2q16wb_register = 1999, ARM_VST2q32 = 2000, ARM_VST2q32Pseudo = 2001, ARM_VST2q32PseudoWB_fixed = 2002, ARM_VST2q32PseudoWB_register = 2003, ARM_VST2q32wb_fixed = 2004, ARM_VST2q32wb_register = 2005, ARM_VST2q8 = 2006, ARM_VST2q8Pseudo = 2007, ARM_VST2q8PseudoWB_fixed = 2008, ARM_VST2q8PseudoWB_register = 2009, ARM_VST2q8wb_fixed = 2010, ARM_VST2q8wb_register = 2011, ARM_VST3LNd16 = 2012, ARM_VST3LNd16Pseudo = 2013, ARM_VST3LNd16Pseudo_UPD = 2014, ARM_VST3LNd16_UPD = 2015, ARM_VST3LNd32 = 2016, ARM_VST3LNd32Pseudo = 2017, ARM_VST3LNd32Pseudo_UPD = 2018, ARM_VST3LNd32_UPD = 2019, ARM_VST3LNd8 = 2020, ARM_VST3LNd8Pseudo = 2021, ARM_VST3LNd8Pseudo_UPD = 2022, ARM_VST3LNd8_UPD = 2023, ARM_VST3LNdAsm_16 = 2024, ARM_VST3LNdAsm_32 = 2025, ARM_VST3LNdAsm_8 = 2026, ARM_VST3LNdWB_fixed_Asm_16 = 2027, ARM_VST3LNdWB_fixed_Asm_32 = 2028, ARM_VST3LNdWB_fixed_Asm_8 = 2029, ARM_VST3LNdWB_register_Asm_16 = 2030, ARM_VST3LNdWB_register_Asm_32 = 2031, ARM_VST3LNdWB_register_Asm_8 = 2032, ARM_VST3LNq16 = 2033, ARM_VST3LNq16Pseudo = 2034, ARM_VST3LNq16Pseudo_UPD = 2035, ARM_VST3LNq16_UPD = 2036, ARM_VST3LNq32 = 2037, ARM_VST3LNq32Pseudo = 2038, ARM_VST3LNq32Pseudo_UPD = 2039, ARM_VST3LNq32_UPD = 2040, ARM_VST3LNqAsm_16 = 2041, ARM_VST3LNqAsm_32 = 2042, ARM_VST3LNqWB_fixed_Asm_16 = 2043, ARM_VST3LNqWB_fixed_Asm_32 = 2044, ARM_VST3LNqWB_register_Asm_16 = 2045, ARM_VST3LNqWB_register_Asm_32 = 2046, ARM_VST3d16 = 2047, ARM_VST3d16Pseudo = 2048, ARM_VST3d16Pseudo_UPD = 2049, ARM_VST3d16_UPD = 2050, ARM_VST3d32 = 2051, ARM_VST3d32Pseudo = 2052, ARM_VST3d32Pseudo_UPD = 2053, ARM_VST3d32_UPD = 2054, ARM_VST3d8 = 2055, ARM_VST3d8Pseudo = 2056, ARM_VST3d8Pseudo_UPD = 2057, ARM_VST3d8_UPD = 2058, ARM_VST3dAsm_16 = 2059, ARM_VST3dAsm_32 = 2060, ARM_VST3dAsm_8 = 2061, ARM_VST3dWB_fixed_Asm_16 = 2062, ARM_VST3dWB_fixed_Asm_32 = 2063, ARM_VST3dWB_fixed_Asm_8 = 2064, ARM_VST3dWB_register_Asm_16 = 2065, ARM_VST3dWB_register_Asm_32 = 2066, ARM_VST3dWB_register_Asm_8 = 2067, ARM_VST3q16 = 2068, ARM_VST3q16Pseudo_UPD = 2069, ARM_VST3q16_UPD = 2070, ARM_VST3q16oddPseudo = 2071, ARM_VST3q16oddPseudo_UPD = 2072, ARM_VST3q32 = 2073, ARM_VST3q32Pseudo_UPD = 2074, ARM_VST3q32_UPD = 2075, ARM_VST3q32oddPseudo = 2076, ARM_VST3q32oddPseudo_UPD = 2077, ARM_VST3q8 = 2078, ARM_VST3q8Pseudo_UPD = 2079, ARM_VST3q8_UPD = 2080, ARM_VST3q8oddPseudo = 2081, ARM_VST3q8oddPseudo_UPD = 2082, ARM_VST3qAsm_16 = 2083, ARM_VST3qAsm_32 = 2084, ARM_VST3qAsm_8 = 2085, ARM_VST3qWB_fixed_Asm_16 = 2086, ARM_VST3qWB_fixed_Asm_32 = 2087, ARM_VST3qWB_fixed_Asm_8 = 2088, ARM_VST3qWB_register_Asm_16 = 2089, ARM_VST3qWB_register_Asm_32 = 2090, ARM_VST3qWB_register_Asm_8 = 2091, ARM_VST4LNd16 = 2092, ARM_VST4LNd16Pseudo = 2093, ARM_VST4LNd16Pseudo_UPD = 2094, ARM_VST4LNd16_UPD = 2095, ARM_VST4LNd32 = 2096, ARM_VST4LNd32Pseudo = 2097, ARM_VST4LNd32Pseudo_UPD = 2098, ARM_VST4LNd32_UPD = 2099, ARM_VST4LNd8 = 2100, ARM_VST4LNd8Pseudo = 2101, ARM_VST4LNd8Pseudo_UPD = 2102, ARM_VST4LNd8_UPD = 2103, ARM_VST4LNdAsm_16 = 2104, ARM_VST4LNdAsm_32 = 2105, ARM_VST4LNdAsm_8 = 2106, ARM_VST4LNdWB_fixed_Asm_16 = 2107, ARM_VST4LNdWB_fixed_Asm_32 = 2108, ARM_VST4LNdWB_fixed_Asm_8 = 2109, ARM_VST4LNdWB_register_Asm_16 = 2110, ARM_VST4LNdWB_register_Asm_32 = 2111, ARM_VST4LNdWB_register_Asm_8 = 2112, ARM_VST4LNq16 = 2113, ARM_VST4LNq16Pseudo = 2114, ARM_VST4LNq16Pseudo_UPD = 2115, ARM_VST4LNq16_UPD = 2116, ARM_VST4LNq32 = 2117, ARM_VST4LNq32Pseudo = 2118, ARM_VST4LNq32Pseudo_UPD = 2119, ARM_VST4LNq32_UPD = 2120, ARM_VST4LNqAsm_16 = 2121, ARM_VST4LNqAsm_32 = 2122, ARM_VST4LNqWB_fixed_Asm_16 = 2123, ARM_VST4LNqWB_fixed_Asm_32 = 2124, ARM_VST4LNqWB_register_Asm_16 = 2125, ARM_VST4LNqWB_register_Asm_32 = 2126, ARM_VST4d16 = 2127, ARM_VST4d16Pseudo = 2128, ARM_VST4d16Pseudo_UPD = 2129, ARM_VST4d16_UPD = 2130, ARM_VST4d32 = 2131, ARM_VST4d32Pseudo = 2132, ARM_VST4d32Pseudo_UPD = 2133, ARM_VST4d32_UPD = 2134, ARM_VST4d8 = 2135, ARM_VST4d8Pseudo = 2136, ARM_VST4d8Pseudo_UPD = 2137, ARM_VST4d8_UPD = 2138, ARM_VST4dAsm_16 = 2139, ARM_VST4dAsm_32 = 2140, ARM_VST4dAsm_8 = 2141, ARM_VST4dWB_fixed_Asm_16 = 2142, ARM_VST4dWB_fixed_Asm_32 = 2143, ARM_VST4dWB_fixed_Asm_8 = 2144, ARM_VST4dWB_register_Asm_16 = 2145, ARM_VST4dWB_register_Asm_32 = 2146, ARM_VST4dWB_register_Asm_8 = 2147, ARM_VST4q16 = 2148, ARM_VST4q16Pseudo_UPD = 2149, ARM_VST4q16_UPD = 2150, ARM_VST4q16oddPseudo = 2151, ARM_VST4q16oddPseudo_UPD = 2152, ARM_VST4q32 = 2153, ARM_VST4q32Pseudo_UPD = 2154, ARM_VST4q32_UPD = 2155, ARM_VST4q32oddPseudo = 2156, ARM_VST4q32oddPseudo_UPD = 2157, ARM_VST4q8 = 2158, ARM_VST4q8Pseudo_UPD = 2159, ARM_VST4q8_UPD = 2160, ARM_VST4q8oddPseudo = 2161, ARM_VST4q8oddPseudo_UPD = 2162, ARM_VST4qAsm_16 = 2163, ARM_VST4qAsm_32 = 2164, ARM_VST4qAsm_8 = 2165, ARM_VST4qWB_fixed_Asm_16 = 2166, ARM_VST4qWB_fixed_Asm_32 = 2167, ARM_VST4qWB_fixed_Asm_8 = 2168, ARM_VST4qWB_register_Asm_16 = 2169, ARM_VST4qWB_register_Asm_32 = 2170, ARM_VST4qWB_register_Asm_8 = 2171, ARM_VSTMDDB_UPD = 2172, ARM_VSTMDIA = 2173, ARM_VSTMDIA_UPD = 2174, ARM_VSTMQIA = 2175, ARM_VSTMSDB_UPD = 2176, ARM_VSTMSIA = 2177, ARM_VSTMSIA_UPD = 2178, ARM_VSTRD = 2179, ARM_VSTRS = 2180, ARM_VSUBD = 2181, ARM_VSUBHNv2i32 = 2182, ARM_VSUBHNv4i16 = 2183, ARM_VSUBHNv8i8 = 2184, ARM_VSUBLsv2i64 = 2185, ARM_VSUBLsv4i32 = 2186, ARM_VSUBLsv8i16 = 2187, ARM_VSUBLuv2i64 = 2188, ARM_VSUBLuv4i32 = 2189, ARM_VSUBLuv8i16 = 2190, ARM_VSUBS = 2191, ARM_VSUBWsv2i64 = 2192, ARM_VSUBWsv4i32 = 2193, ARM_VSUBWsv8i16 = 2194, ARM_VSUBWuv2i64 = 2195, ARM_VSUBWuv4i32 = 2196, ARM_VSUBWuv8i16 = 2197, ARM_VSUBfd = 2198, ARM_VSUBfq = 2199, ARM_VSUBv16i8 = 2200, ARM_VSUBv1i64 = 2201, ARM_VSUBv2i32 = 2202, ARM_VSUBv2i64 = 2203, ARM_VSUBv4i16 = 2204, ARM_VSUBv4i32 = 2205, ARM_VSUBv8i16 = 2206, ARM_VSUBv8i8 = 2207, ARM_VSWPd = 2208, ARM_VSWPq = 2209, ARM_VTBL1 = 2210, ARM_VTBL2 = 2211, ARM_VTBL3 = 2212, ARM_VTBL3Pseudo = 2213, ARM_VTBL4 = 2214, ARM_VTBL4Pseudo = 2215, ARM_VTBX1 = 2216, ARM_VTBX2 = 2217, ARM_VTBX3 = 2218, ARM_VTBX3Pseudo = 2219, ARM_VTBX4 = 2220, ARM_VTBX4Pseudo = 2221, ARM_VTOSHD = 2222, ARM_VTOSHS = 2223, ARM_VTOSIRD = 2224, ARM_VTOSIRS = 2225, ARM_VTOSIZD = 2226, ARM_VTOSIZS = 2227, ARM_VTOSLD = 2228, ARM_VTOSLS = 2229, ARM_VTOUHD = 2230, ARM_VTOUHS = 2231, ARM_VTOUIRD = 2232, ARM_VTOUIRS = 2233, ARM_VTOUIZD = 2234, ARM_VTOUIZS = 2235, ARM_VTOULD = 2236, ARM_VTOULS = 2237, ARM_VTRNd16 = 2238, ARM_VTRNd32 = 2239, ARM_VTRNd8 = 2240, ARM_VTRNq16 = 2241, ARM_VTRNq32 = 2242, ARM_VTRNq8 = 2243, ARM_VTSTv16i8 = 2244, ARM_VTSTv2i32 = 2245, ARM_VTSTv4i16 = 2246, ARM_VTSTv4i32 = 2247, ARM_VTSTv8i16 = 2248, ARM_VTSTv8i8 = 2249, ARM_VUHTOD = 2250, ARM_VUHTOS = 2251, ARM_VUITOD = 2252, ARM_VUITOS = 2253, ARM_VULTOD = 2254, ARM_VULTOS = 2255, ARM_VUZPd16 = 2256, ARM_VUZPd8 = 2257, ARM_VUZPq16 = 2258, ARM_VUZPq32 = 2259, ARM_VUZPq8 = 2260, ARM_VZIPd16 = 2261, ARM_VZIPd8 = 2262, ARM_VZIPq16 = 2263, ARM_VZIPq32 = 2264, ARM_VZIPq8 = 2265, ARM_WIN__CHKSTK = 2266, ARM_sysLDMDA = 2267, ARM_sysLDMDA_UPD = 2268, ARM_sysLDMDB = 2269, ARM_sysLDMDB_UPD = 2270, ARM_sysLDMIA = 2271, ARM_sysLDMIA_UPD = 2272, ARM_sysLDMIB = 2273, ARM_sysLDMIB_UPD = 2274, ARM_sysSTMDA = 2275, ARM_sysSTMDA_UPD = 2276, ARM_sysSTMDB = 2277, ARM_sysSTMDB_UPD = 2278, ARM_sysSTMIA = 2279, ARM_sysSTMIA_UPD = 2280, ARM_sysSTMIB = 2281, ARM_sysSTMIB_UPD = 2282, ARM_t2ABS = 2283, ARM_t2ADCri = 2284, ARM_t2ADCrr = 2285, ARM_t2ADCrs = 2286, ARM_t2ADDSri = 2287, ARM_t2ADDSrr = 2288, ARM_t2ADDSrs = 2289, ARM_t2ADDri = 2290, ARM_t2ADDri12 = 2291, ARM_t2ADDrr = 2292, ARM_t2ADDrs = 2293, ARM_t2ADR = 2294, ARM_t2ANDri = 2295, ARM_t2ANDrr = 2296, ARM_t2ANDrs = 2297, ARM_t2ASRri = 2298, ARM_t2ASRrr = 2299, ARM_t2B = 2300, ARM_t2BFC = 2301, ARM_t2BFI = 2302, ARM_t2BICri = 2303, ARM_t2BICrr = 2304, ARM_t2BICrs = 2305, ARM_t2BR_JT = 2306, ARM_t2BXJ = 2307, ARM_t2Bcc = 2308, ARM_t2CDP = 2309, ARM_t2CDP2 = 2310, ARM_t2CLREX = 2311, ARM_t2CLZ = 2312, ARM_t2CMNri = 2313, ARM_t2CMNzrr = 2314, ARM_t2CMNzrs = 2315, ARM_t2CMPri = 2316, ARM_t2CMPrr = 2317, ARM_t2CMPrs = 2318, ARM_t2CPS1p = 2319, ARM_t2CPS2p = 2320, ARM_t2CPS3p = 2321, ARM_t2CRC32B = 2322, ARM_t2CRC32CB = 2323, ARM_t2CRC32CH = 2324, ARM_t2CRC32CW = 2325, ARM_t2CRC32H = 2326, ARM_t2CRC32W = 2327, ARM_t2DBG = 2328, ARM_t2DCPS1 = 2329, ARM_t2DCPS2 = 2330, ARM_t2DCPS3 = 2331, ARM_t2DMB = 2332, ARM_t2DSB = 2333, ARM_t2EORri = 2334, ARM_t2EORrr = 2335, ARM_t2EORrs = 2336, ARM_t2HINT = 2337, ARM_t2ISB = 2338, ARM_t2IT = 2339, ARM_t2Int_eh_sjlj_setjmp = 2340, ARM_t2Int_eh_sjlj_setjmp_nofp = 2341, ARM_t2LDA = 2342, ARM_t2LDAB = 2343, ARM_t2LDAEX = 2344, ARM_t2LDAEXB = 2345, ARM_t2LDAEXD = 2346, ARM_t2LDAEXH = 2347, ARM_t2LDAH = 2348, ARM_t2LDC2L_OFFSET = 2349, ARM_t2LDC2L_OPTION = 2350, ARM_t2LDC2L_POST = 2351, ARM_t2LDC2L_PRE = 2352, ARM_t2LDC2_OFFSET = 2353, ARM_t2LDC2_OPTION = 2354, ARM_t2LDC2_POST = 2355, ARM_t2LDC2_PRE = 2356, ARM_t2LDCL_OFFSET = 2357, ARM_t2LDCL_OPTION = 2358, ARM_t2LDCL_POST = 2359, ARM_t2LDCL_PRE = 2360, ARM_t2LDC_OFFSET = 2361, ARM_t2LDC_OPTION = 2362, ARM_t2LDC_POST = 2363, ARM_t2LDC_PRE = 2364, ARM_t2LDMDB = 2365, ARM_t2LDMDB_UPD = 2366, ARM_t2LDMIA = 2367, ARM_t2LDMIA_RET = 2368, ARM_t2LDMIA_UPD = 2369, ARM_t2LDRBT = 2370, ARM_t2LDRB_POST = 2371, ARM_t2LDRB_PRE = 2372, ARM_t2LDRBi12 = 2373, ARM_t2LDRBi8 = 2374, ARM_t2LDRBpci = 2375, ARM_t2LDRBpcrel = 2376, ARM_t2LDRBs = 2377, ARM_t2LDRD_POST = 2378, ARM_t2LDRD_PRE = 2379, ARM_t2LDRDi8 = 2380, ARM_t2LDREX = 2381, ARM_t2LDREXB = 2382, ARM_t2LDREXD = 2383, ARM_t2LDREXH = 2384, ARM_t2LDRHT = 2385, ARM_t2LDRH_POST = 2386, ARM_t2LDRH_PRE = 2387, ARM_t2LDRHi12 = 2388, ARM_t2LDRHi8 = 2389, ARM_t2LDRHpci = 2390, ARM_t2LDRHpcrel = 2391, ARM_t2LDRHs = 2392, ARM_t2LDRSBT = 2393, ARM_t2LDRSB_POST = 2394, ARM_t2LDRSB_PRE = 2395, ARM_t2LDRSBi12 = 2396, ARM_t2LDRSBi8 = 2397, ARM_t2LDRSBpci = 2398, ARM_t2LDRSBpcrel = 2399, ARM_t2LDRSBs = 2400, ARM_t2LDRSHT = 2401, ARM_t2LDRSH_POST = 2402, ARM_t2LDRSH_PRE = 2403, ARM_t2LDRSHi12 = 2404, ARM_t2LDRSHi8 = 2405, ARM_t2LDRSHpci = 2406, ARM_t2LDRSHpcrel = 2407, ARM_t2LDRSHs = 2408, ARM_t2LDRT = 2409, ARM_t2LDR_POST = 2410, ARM_t2LDR_PRE = 2411, ARM_t2LDRi12 = 2412, ARM_t2LDRi8 = 2413, ARM_t2LDRpci = 2414, ARM_t2LDRpci_pic = 2415, ARM_t2LDRpcrel = 2416, ARM_t2LDRs = 2417, ARM_t2LEApcrel = 2418, ARM_t2LEApcrelJT = 2419, ARM_t2LSLri = 2420, ARM_t2LSLrr = 2421, ARM_t2LSRri = 2422, ARM_t2LSRrr = 2423, ARM_t2MCR = 2424, ARM_t2MCR2 = 2425, ARM_t2MCRR = 2426, ARM_t2MCRR2 = 2427, ARM_t2MLA = 2428, ARM_t2MLS = 2429, ARM_t2MOVCCasr = 2430, ARM_t2MOVCCi = 2431, ARM_t2MOVCCi16 = 2432, ARM_t2MOVCCi32imm = 2433, ARM_t2MOVCClsl = 2434, ARM_t2MOVCClsr = 2435, ARM_t2MOVCCr = 2436, ARM_t2MOVCCror = 2437, ARM_t2MOVSsi = 2438, ARM_t2MOVSsr = 2439, ARM_t2MOVTi16 = 2440, ARM_t2MOVTi16_ga_pcrel = 2441, ARM_t2MOV_ga_pcrel = 2442, ARM_t2MOVi = 2443, ARM_t2MOVi16 = 2444, ARM_t2MOVi16_ga_pcrel = 2445, ARM_t2MOVi32imm = 2446, ARM_t2MOVr = 2447, ARM_t2MOVsi = 2448, ARM_t2MOVsr = 2449, ARM_t2MOVsra_flag = 2450, ARM_t2MOVsrl_flag = 2451, ARM_t2MRC = 2452, ARM_t2MRC2 = 2453, ARM_t2MRRC = 2454, ARM_t2MRRC2 = 2455, ARM_t2MRS_AR = 2456, ARM_t2MRS_M = 2457, ARM_t2MRSsys_AR = 2458, ARM_t2MSR_AR = 2459, ARM_t2MSR_M = 2460, ARM_t2MUL = 2461, ARM_t2MVNCCi = 2462, ARM_t2MVNi = 2463, ARM_t2MVNr = 2464, ARM_t2MVNs = 2465, ARM_t2ORNri = 2466, ARM_t2ORNrr = 2467, ARM_t2ORNrs = 2468, ARM_t2ORRri = 2469, ARM_t2ORRrr = 2470, ARM_t2ORRrs = 2471, ARM_t2PKHBT = 2472, ARM_t2PKHTB = 2473, ARM_t2PLDWi12 = 2474, ARM_t2PLDWi8 = 2475, ARM_t2PLDWs = 2476, ARM_t2PLDi12 = 2477, ARM_t2PLDi8 = 2478, ARM_t2PLDpci = 2479, ARM_t2PLDs = 2480, ARM_t2PLIi12 = 2481, ARM_t2PLIi8 = 2482, ARM_t2PLIpci = 2483, ARM_t2PLIs = 2484, ARM_t2QADD = 2485, ARM_t2QADD16 = 2486, ARM_t2QADD8 = 2487, ARM_t2QASX = 2488, ARM_t2QDADD = 2489, ARM_t2QDSUB = 2490, ARM_t2QSAX = 2491, ARM_t2QSUB = 2492, ARM_t2QSUB16 = 2493, ARM_t2QSUB8 = 2494, ARM_t2RBIT = 2495, ARM_t2REV = 2496, ARM_t2REV16 = 2497, ARM_t2REVSH = 2498, ARM_t2RFEDB = 2499, ARM_t2RFEDBW = 2500, ARM_t2RFEIA = 2501, ARM_t2RFEIAW = 2502, ARM_t2RORri = 2503, ARM_t2RORrr = 2504, ARM_t2RRX = 2505, ARM_t2RSBSri = 2506, ARM_t2RSBSrs = 2507, ARM_t2RSBri = 2508, ARM_t2RSBrr = 2509, ARM_t2RSBrs = 2510, ARM_t2SADD16 = 2511, ARM_t2SADD8 = 2512, ARM_t2SASX = 2513, ARM_t2SBCri = 2514, ARM_t2SBCrr = 2515, ARM_t2SBCrs = 2516, ARM_t2SBFX = 2517, ARM_t2SDIV = 2518, ARM_t2SEL = 2519, ARM_t2SHADD16 = 2520, ARM_t2SHADD8 = 2521, ARM_t2SHASX = 2522, ARM_t2SHSAX = 2523, ARM_t2SHSUB16 = 2524, ARM_t2SHSUB8 = 2525, ARM_t2SMC = 2526, ARM_t2SMLABB = 2527, ARM_t2SMLABT = 2528, ARM_t2SMLAD = 2529, ARM_t2SMLADX = 2530, ARM_t2SMLAL = 2531, ARM_t2SMLALBB = 2532, ARM_t2SMLALBT = 2533, ARM_t2SMLALD = 2534, ARM_t2SMLALDX = 2535, ARM_t2SMLALTB = 2536, ARM_t2SMLALTT = 2537, ARM_t2SMLATB = 2538, ARM_t2SMLATT = 2539, ARM_t2SMLAWB = 2540, ARM_t2SMLAWT = 2541, ARM_t2SMLSD = 2542, ARM_t2SMLSDX = 2543, ARM_t2SMLSLD = 2544, ARM_t2SMLSLDX = 2545, ARM_t2SMMLA = 2546, ARM_t2SMMLAR = 2547, ARM_t2SMMLS = 2548, ARM_t2SMMLSR = 2549, ARM_t2SMMUL = 2550, ARM_t2SMMULR = 2551, ARM_t2SMUAD = 2552, ARM_t2SMUADX = 2553, ARM_t2SMULBB = 2554, ARM_t2SMULBT = 2555, ARM_t2SMULL = 2556, ARM_t2SMULTB = 2557, ARM_t2SMULTT = 2558, ARM_t2SMULWB = 2559, ARM_t2SMULWT = 2560, ARM_t2SMUSD = 2561, ARM_t2SMUSDX = 2562, ARM_t2SRSDB = 2563, ARM_t2SRSDB_UPD = 2564, ARM_t2SRSIA = 2565, ARM_t2SRSIA_UPD = 2566, ARM_t2SSAT = 2567, ARM_t2SSAT16 = 2568, ARM_t2SSAX = 2569, ARM_t2SSUB16 = 2570, ARM_t2SSUB8 = 2571, ARM_t2STC2L_OFFSET = 2572, ARM_t2STC2L_OPTION = 2573, ARM_t2STC2L_POST = 2574, ARM_t2STC2L_PRE = 2575, ARM_t2STC2_OFFSET = 2576, ARM_t2STC2_OPTION = 2577, ARM_t2STC2_POST = 2578, ARM_t2STC2_PRE = 2579, ARM_t2STCL_OFFSET = 2580, ARM_t2STCL_OPTION = 2581, ARM_t2STCL_POST = 2582, ARM_t2STCL_PRE = 2583, ARM_t2STC_OFFSET = 2584, ARM_t2STC_OPTION = 2585, ARM_t2STC_POST = 2586, ARM_t2STC_PRE = 2587, ARM_t2STL = 2588, ARM_t2STLB = 2589, ARM_t2STLEX = 2590, ARM_t2STLEXB = 2591, ARM_t2STLEXD = 2592, ARM_t2STLEXH = 2593, ARM_t2STLH = 2594, ARM_t2STMDB = 2595, ARM_t2STMDB_UPD = 2596, ARM_t2STMIA = 2597, ARM_t2STMIA_UPD = 2598, ARM_t2STRBT = 2599, ARM_t2STRB_POST = 2600, ARM_t2STRB_PRE = 2601, ARM_t2STRB_preidx = 2602, ARM_t2STRBi12 = 2603, ARM_t2STRBi8 = 2604, ARM_t2STRBs = 2605, ARM_t2STRD_POST = 2606, ARM_t2STRD_PRE = 2607, ARM_t2STRDi8 = 2608, ARM_t2STREX = 2609, ARM_t2STREXB = 2610, ARM_t2STREXD = 2611, ARM_t2STREXH = 2612, ARM_t2STRHT = 2613, ARM_t2STRH_POST = 2614, ARM_t2STRH_PRE = 2615, ARM_t2STRH_preidx = 2616, ARM_t2STRHi12 = 2617, ARM_t2STRHi8 = 2618, ARM_t2STRHs = 2619, ARM_t2STRT = 2620, ARM_t2STR_POST = 2621, ARM_t2STR_PRE = 2622, ARM_t2STR_preidx = 2623, ARM_t2STRi12 = 2624, ARM_t2STRi8 = 2625, ARM_t2STRs = 2626, ARM_t2SUBS_PC_LR = 2627, ARM_t2SUBSri = 2628, ARM_t2SUBSrr = 2629, ARM_t2SUBSrs = 2630, ARM_t2SUBri = 2631, ARM_t2SUBri12 = 2632, ARM_t2SUBrr = 2633, ARM_t2SUBrs = 2634, ARM_t2SXTAB = 2635, ARM_t2SXTAB16 = 2636, ARM_t2SXTAH = 2637, ARM_t2SXTB = 2638, ARM_t2SXTB16 = 2639, ARM_t2SXTH = 2640, ARM_t2TBB = 2641, ARM_t2TBB_JT = 2642, ARM_t2TBH = 2643, ARM_t2TBH_JT = 2644, ARM_t2TEQri = 2645, ARM_t2TEQrr = 2646, ARM_t2TEQrs = 2647, ARM_t2TSTri = 2648, ARM_t2TSTrr = 2649, ARM_t2TSTrs = 2650, ARM_t2UADD16 = 2651, ARM_t2UADD8 = 2652, ARM_t2UASX = 2653, ARM_t2UBFX = 2654, ARM_t2UDF = 2655, ARM_t2UDIV = 2656, ARM_t2UHADD16 = 2657, ARM_t2UHADD8 = 2658, ARM_t2UHASX = 2659, ARM_t2UHSAX = 2660, ARM_t2UHSUB16 = 2661, ARM_t2UHSUB8 = 2662, ARM_t2UMAAL = 2663, ARM_t2UMLAL = 2664, ARM_t2UMULL = 2665, ARM_t2UQADD16 = 2666, ARM_t2UQADD8 = 2667, ARM_t2UQASX = 2668, ARM_t2UQSAX = 2669, ARM_t2UQSUB16 = 2670, ARM_t2UQSUB8 = 2671, ARM_t2USAD8 = 2672, ARM_t2USADA8 = 2673, ARM_t2USAT = 2674, ARM_t2USAT16 = 2675, ARM_t2USAX = 2676, ARM_t2USUB16 = 2677, ARM_t2USUB8 = 2678, ARM_t2UXTAB = 2679, ARM_t2UXTAB16 = 2680, ARM_t2UXTAH = 2681, ARM_t2UXTB = 2682, ARM_t2UXTB16 = 2683, ARM_t2UXTH = 2684, ARM_tADC = 2685, ARM_tADDhirr = 2686, ARM_tADDi3 = 2687, ARM_tADDi8 = 2688, ARM_tADDrSP = 2689, ARM_tADDrSPi = 2690, ARM_tADDrr = 2691, ARM_tADDspi = 2692, ARM_tADDspr = 2693, ARM_tADJCALLSTACKDOWN = 2694, ARM_tADJCALLSTACKUP = 2695, ARM_tADR = 2696, ARM_tAND = 2697, ARM_tASRri = 2698, ARM_tASRrr = 2699, ARM_tB = 2700, ARM_tBIC = 2701, ARM_tBKPT = 2702, ARM_tBL = 2703, ARM_tBLXi = 2704, ARM_tBLXr = 2705, ARM_tBRIND = 2706, ARM_tBR_JTr = 2707, ARM_tBX = 2708, ARM_tBX_CALL = 2709, ARM_tBX_RET = 2710, ARM_tBX_RET_vararg = 2711, ARM_tBcc = 2712, ARM_tBfar = 2713, ARM_tCBNZ = 2714, ARM_tCBZ = 2715, ARM_tCMNz = 2716, ARM_tCMPhir = 2717, ARM_tCMPi8 = 2718, ARM_tCMPr = 2719, ARM_tCPS = 2720, ARM_tEOR = 2721, ARM_tHINT = 2722, ARM_tHLT = 2723, ARM_tInt_eh_sjlj_longjmp = 2724, ARM_tInt_eh_sjlj_setjmp = 2725, ARM_tLDMIA = 2726, ARM_tLDMIA_UPD = 2727, ARM_tLDRBi = 2728, ARM_tLDRBr = 2729, ARM_tLDRHi = 2730, ARM_tLDRHr = 2731, ARM_tLDRLIT_ga_abs = 2732, ARM_tLDRLIT_ga_pcrel = 2733, ARM_tLDRSB = 2734, ARM_tLDRSH = 2735, ARM_tLDRi = 2736, ARM_tLDRpci = 2737, ARM_tLDRpci_pic = 2738, ARM_tLDRr = 2739, ARM_tLDRspi = 2740, ARM_tLEApcrel = 2741, ARM_tLEApcrelJT = 2742, ARM_tLSLri = 2743, ARM_tLSLrr = 2744, ARM_tLSRri = 2745, ARM_tLSRrr = 2746, ARM_tMOVCCr_pseudo = 2747, ARM_tMOVSr = 2748, ARM_tMOVi8 = 2749, ARM_tMOVr = 2750, ARM_tMUL = 2751, ARM_tMVN = 2752, ARM_tORR = 2753, ARM_tPICADD = 2754, ARM_tPOP = 2755, ARM_tPOP_RET = 2756, ARM_tPUSH = 2757, ARM_tREV = 2758, ARM_tREV16 = 2759, ARM_tREVSH = 2760, ARM_tROR = 2761, ARM_tRSB = 2762, ARM_tSBC = 2763, ARM_tSETEND = 2764, ARM_tSTMIA_UPD = 2765, ARM_tSTRBi = 2766, ARM_tSTRBr = 2767, ARM_tSTRHi = 2768, ARM_tSTRHr = 2769, ARM_tSTRi = 2770, ARM_tSTRr = 2771, ARM_tSTRspi = 2772, ARM_tSUBi3 = 2773, ARM_tSUBi8 = 2774, ARM_tSUBrr = 2775, ARM_tSUBspi = 2776, ARM_tSVC = 2777, ARM_tSXTB = 2778, ARM_tSXTH = 2779, ARM_tTAILJMPd = 2780, ARM_tTAILJMPdND = 2781, ARM_tTAILJMPr = 2782, ARM_tTPsoft = 2783, ARM_tTRAP = 2784, ARM_tTST = 2785, ARM_tUDF = 2786, ARM_tUXTB = 2787, ARM_tUXTH = 2788, ARM_INSTRUCTION_LIST_END = 2789 }; #endif // GET_INSTRINFO_ENUM #ifdef GET_INSTRINFO_MC_DESC #undef GET_INSTRINFO_MC_DESC #define nullptr 0 #define ImplicitList1 0 #define ImplicitList2 0 #define ImplicitList3 0 #define ImplicitList4 0 #define ImplicitList5 0 #define ImplicitList6 0 #define ImplicitList7 0 #define ImplicitList8 0 #define ImplicitList9 0 #define ImplicitList10 0 #define ImplicitList11 0 #define ImplicitList12 0 #define ImplicitList13 0 #define ImplicitList14 0 #define ImplicitList15 0 static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI_TIED_TO)) }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI_OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<