133 lines
3.9 KiB
C++
133 lines
3.9 KiB
C++
//===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declaration of the MCInst and MCOperand classes, which
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// is the basic representation used to represent low-level machine code
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// instructions.
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//
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//===----------------------------------------------------------------------===//
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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */
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#ifndef CS_MCINST_H
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#define CS_MCINST_H
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#if !defined(_MSC_VER) || !defined(_KERNEL_MODE)
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#include <stdint.h>
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#endif
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#include "include/capstone.h"
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typedef struct MCInst MCInst;
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typedef struct cs_struct cs_struct;
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typedef struct MCOperand MCOperand;
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/// MCOperand - Instances of this class represent operands of the MCInst class.
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/// This is a simple discriminated union.
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struct MCOperand {
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enum {
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kInvalid = 0, ///< Uninitialized.
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kRegister, ///< Register operand.
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kImmediate, ///< Immediate operand.
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kFPImmediate, ///< Floating-point immediate operand.
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} MachineOperandType;
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unsigned char Kind;
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union {
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unsigned RegVal;
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int64_t ImmVal;
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double FPImmVal;
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};
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};
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bool MCOperand_isValid(const MCOperand *op);
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bool MCOperand_isReg(const MCOperand *op);
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bool MCOperand_isImm(const MCOperand *op);
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bool MCOperand_isFPImm(const MCOperand *op);
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bool MCOperand_isInst(const MCOperand *op);
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/// getReg - Returns the register number.
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unsigned MCOperand_getReg(const MCOperand *op);
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/// setReg - Set the register number.
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void MCOperand_setReg(MCOperand *op, unsigned Reg);
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int64_t MCOperand_getImm(MCOperand *op);
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void MCOperand_setImm(MCOperand *op, int64_t Val);
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double MCOperand_getFPImm(const MCOperand *op);
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void MCOperand_setFPImm(MCOperand *op, double Val);
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const MCInst *MCOperand_getInst(const MCOperand *op);
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void MCOperand_setInst(MCOperand *op, const MCInst *Val);
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// create Reg operand in the next slot
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void MCOperand_CreateReg0(MCInst *inst, unsigned Reg);
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// create Reg operand use the last-unused slot
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MCOperand *MCOperand_CreateReg1(MCInst *inst, unsigned Reg);
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// create Imm operand in the next slot
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void MCOperand_CreateImm0(MCInst *inst, int64_t Val);
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// create Imm operand in the last-unused slot
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MCOperand *MCOperand_CreateImm1(MCInst *inst, int64_t Val);
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/// MCInst - Instances of this class represent a single low-level machine
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/// instruction.
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struct MCInst {
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unsigned OpcodePub;
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uint8_t size; // number of operands
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bool has_imm; // indicate this instruction has an X86_OP_IMM operand - used for ATT syntax
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uint8_t op1_size; // size of 1st operand - for X86 Intel syntax
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unsigned Opcode;
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MCOperand Operands[48];
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cs_insn *flat_insn; // insn to be exposed to public
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uint64_t address; // address of this insn
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cs_struct *csh; // save the main csh
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uint8_t x86opsize; // opsize for [mem] operand
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// (Optional) instruction prefix, which can be up to 4 bytes.
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// A prefix byte gets value 0 when irrelevant.
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// This is copied from cs_x86 struct
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uint8_t x86_prefix[4];
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uint8_t imm_size; // immediate size for X86_OP_IMM operand
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bool writeback; // writeback for ARM
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};
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void MCInst_Init(MCInst *inst);
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void MCInst_clear(MCInst *inst);
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// do not free operand after inserting
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void MCInst_insert0(MCInst *inst, int index, MCOperand *Op);
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void MCInst_setOpcode(MCInst *inst, unsigned Op);
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unsigned MCInst_getOpcode(const MCInst*);
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void MCInst_setOpcodePub(MCInst *inst, unsigned Op);
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unsigned MCInst_getOpcodePub(const MCInst*);
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MCOperand *MCInst_getOperand(MCInst *inst, unsigned i);
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unsigned MCInst_getNumOperands(const MCInst *inst);
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// This addOperand2 function doesnt free Op
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void MCInst_addOperand2(MCInst *inst, MCOperand *Op);
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#endif
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