166 lines
4 KiB
C
166 lines
4 KiB
C
/* Capstone Disassembler Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013> */
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#include <stdio.h>
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#include <stdlib.h>
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#include <platform.h>
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#include <capstone.h>
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struct platform {
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cs_arch arch;
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cs_mode mode;
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unsigned char *code;
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size_t size;
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char *comment;
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};
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static csh handle;
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static void print_string_hex(char *comment, unsigned char *str, size_t len)
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{
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unsigned char *c;
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printf("%s", comment);
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for (c = str; c < str + len; c++) {
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printf("0x%02x ", *c & 0xff);
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}
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printf("\n");
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}
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static void print_insn_detail(cs_insn *ins)
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{
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int i;
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cs_mips *mips;
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// detail can be NULL on "data" instruction if SKIPDATA option is turned ON
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if (ins->detail == NULL)
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return;
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mips = &(ins->detail->mips);
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if (mips->op_count)
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printf("\top_count: %u\n", mips->op_count);
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for (i = 0; i < mips->op_count; i++) {
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cs_mips_op *op = &(mips->operands[i]);
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switch((int)op->type) {
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default:
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break;
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case MIPS_OP_REG:
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printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
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break;
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case MIPS_OP_IMM:
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printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
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break;
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case MIPS_OP_MEM:
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printf("\t\toperands[%u].type: MEM\n", i);
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if (op->mem.base != X86_REG_INVALID)
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printf("\t\t\toperands[%u].mem.base: REG = %s\n",
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i, cs_reg_name(handle, op->mem.base));
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if (op->mem.disp != 0)
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printf("\t\t\toperands[%u].mem.disp: 0x%" PRIx64 "\n", i, op->mem.disp);
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break;
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}
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}
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printf("\n");
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}
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static void test()
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{
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//#define MIPS_CODE "\x8f\xa2\x00\x00"
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//#define MIPS_CODE "\x00\x00\xa7\xac\x10\x00\xa2\x8f"
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//#define MIPS_CODE "\x21\x30\xe6\x70" // clo $6, $7
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//#define MIPS_CODE "\x00\x00\x00\x00" // nop
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//#define MIPS_CODE "\xc6\x23\xe9\xe4" // swc1 $f9, 0x23c6($7)
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//#define MIPS_CODE "\x21\x38\x00\x01" // move $7, $8
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#define MIPS_CODE "\x0C\x10\x00\x97\x00\x00\x00\x00\x24\x02\x00\x0c\x8f\xa2\x00\x00\x34\x21\x34\x56"
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//#define MIPS_CODE "\x04\x11\x00\x01" // bal 0x8
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#define MIPS_CODE2 "\x56\x34\x21\x34\xc2\x17\x01\x00"
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#define MIPS_32R6M "\x00\x07\x00\x07\x00\x11\x93\x7c\x01\x8c\x8b\x7c\x00\xc7\x48\xd0"
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#define MIPS_32R6 "\xec\x80\x00\x19\x7c\x43\x22\xa0"
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struct platform platforms[] = {
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{
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
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(unsigned char *)MIPS_CODE,
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sizeof(MIPS_CODE) - 1,
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"MIPS-32 (Big-endian)"
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},
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{
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS64 + CS_MODE_LITTLE_ENDIAN),
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(unsigned char *)MIPS_CODE2,
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sizeof(MIPS_CODE2) - 1,
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"MIPS-64-EL (Little-endian)"
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},
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{
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN),
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(unsigned char*)MIPS_32R6M,
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sizeof(MIPS_32R6M) - 1,
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"MIPS-32R6 | Micro (Big-endian)"
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},
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{
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN),
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(unsigned char*)MIPS_32R6,
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sizeof(MIPS_32R6) - 1,
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"MIPS-32R6 (Big-endian)"
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},
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};
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uint64_t address = 0x1000;
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cs_insn *insn;
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int i;
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size_t count;
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for (i = 0; i < sizeof(platforms)/sizeof(platforms[0]); i++) {
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cs_err err = cs_open(platforms[i].arch, platforms[i].mode, &handle);
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if (err) {
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printf("Failed on cs_open() with error returned: %u\n", err);
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continue;
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}
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cs_option(handle, CS_OPT_DETAIL, CS_OPT_ON);
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count = cs_disasm(handle, platforms[i].code, platforms[i].size, address, 0, &insn);
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if (count) {
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size_t j;
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printf("****************\n");
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printf("Platform: %s\n", platforms[i].comment);
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print_string_hex("Code:", platforms[i].code, platforms[i].size);
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printf("Disasm:\n");
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for (j = 0; j < count; j++) {
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printf("0x%" PRIx64 ":\t%s\t%s\n", insn[j].address, insn[j].mnemonic, insn[j].op_str);
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print_insn_detail(&insn[j]);
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}
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printf("0x%" PRIx64 ":\n", insn[j-1].address + insn[j-1].size);
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// free memory allocated by cs_disasm()
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cs_free(insn, count);
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} else {
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printf("****************\n");
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printf("Platform: %s\n", platforms[i].comment);
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print_string_hex("Code:", platforms[i].code, platforms[i].size);
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printf("ERROR: Failed to disasm given code!\n");
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}
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printf("\n");
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cs_close(&handle);
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}
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}
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int main()
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{
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test();
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return 0;
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}
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