84 lines
2.6 KiB
C
84 lines
2.6 KiB
C
/*
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* nRF51 Random Number Generator
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*
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* QEMU interface:
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* + Property "period_unfiltered_us": Time between two biased values in
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* microseconds.
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* + Property "period_filtered_us": Time between two unbiased values in
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* microseconds.
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* + sysbus MMIO regions 0: Memory Region with tasks, events and registers
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* to be mapped to the peripherals instance address by the SOC.
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* + Named GPIO output "irq": Interrupt line of the peripheral. Must be
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* connected to the associated peripheral interrupt line of the NVIC.
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* + Named GPIO output "eep_valrdy": Event set when new random value is ready
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* to be read.
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* + Named GPIO input "tep_start": Task that triggers start of continuous
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* generation of random values.
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* + Named GPIO input "tep_stop": Task that ends continuous generation of
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* random values.
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*
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* Accuracy of the peripheral model:
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* + Stochastic properties of different configurations of the random source
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* are not modeled.
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* + Generation of unfiltered and filtered random values take at least the
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* average generation time stated in the production specification;
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* non-deterministic generation times are not modeled.
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*
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* Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
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*
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* This code is licensed under the GPL version 2 or later. See
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* the COPYING file in the top-level directory.
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*
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*/
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#ifndef NRF51_RNG_H
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#define NRF51_RNG_H
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#include "hw/sysbus.h"
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#include "qemu/timer.h"
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#define TYPE_NRF51_RNG "nrf51_soc.rng"
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#define NRF51_RNG(obj) OBJECT_CHECK(NRF51RNGState, (obj), TYPE_NRF51_RNG)
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#define NRF51_RNG_SIZE 0x1000
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#define NRF51_RNG_TASK_START 0x000
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#define NRF51_RNG_TASK_STOP 0x004
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#define NRF51_RNG_EVENT_VALRDY 0x100
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#define NRF51_RNG_REG_SHORTS 0x200
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#define NRF51_RNG_REG_SHORTS_VALRDY_STOP 0
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#define NRF51_RNG_REG_INTEN 0x300
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#define NRF51_RNG_REG_INTEN_VALRDY 0
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#define NRF51_RNG_REG_INTENSET 0x304
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#define NRF51_RNG_REG_INTENCLR 0x308
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#define NRF51_RNG_REG_CONFIG 0x504
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#define NRF51_RNG_REG_CONFIG_DECEN 0
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#define NRF51_RNG_REG_VALUE 0x508
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typedef struct {
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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qemu_irq irq;
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/* Event End Points */
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qemu_irq eep_valrdy;
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QEMUTimer timer;
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/* Time between generation of successive unfiltered values in us */
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uint16_t period_unfiltered_us;
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/* Time between generation of successive filtered values in us */
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uint16_t period_filtered_us;
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uint8_t value;
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uint32_t active;
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uint32_t event_valrdy;
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uint32_t shortcut_stop_on_valrdy;
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uint32_t interrupt_enabled;
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uint32_t filter_enabled;
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} NRF51RNGState;
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#endif /* NRF51_RNG_H */
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