497 lines
14 KiB
C
497 lines
14 KiB
C
/*
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* Channel IO definitions
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*
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* Copyright (c) 2013 Alexander Graf <agraf@suse.de>
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*
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* Inspired by various s390 headers in Linux 3.9.
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or (at
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* your option) any later version. See the COPYING file in the top-level
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* directory.
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*/
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#ifndef CIO_H
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#define CIO_H
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/*
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* path management control word
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*/
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struct pmcw {
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__u32 intparm; /* interruption parameter */
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__u32 qf:1; /* qdio facility */
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__u32 w:1;
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__u32 isc:3; /* interruption sublass */
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__u32 res5:3; /* reserved zeros */
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__u32 ena:1; /* enabled */
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__u32 lm:2; /* limit mode */
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__u32 mme:2; /* measurement-mode enable */
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__u32 mp:1; /* multipath mode */
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__u32 tf:1; /* timing facility */
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__u32 dnv:1; /* device number valid */
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__u32 dev:16; /* device number */
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__u8 lpm; /* logical path mask */
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__u8 pnom; /* path not operational mask */
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__u8 lpum; /* last path used mask */
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__u8 pim; /* path installed mask */
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__u16 mbi; /* measurement-block index */
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__u8 pom; /* path operational mask */
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__u8 pam; /* path available mask */
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__u8 chpid[8]; /* CHPID 0-7 (if available) */
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__u32 unused1:8; /* reserved zeros */
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__u32 st:3; /* subchannel type */
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__u32 unused2:18; /* reserved zeros */
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__u32 mbfc:1; /* measurement block format control */
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__u32 xmwme:1; /* extended measurement word mode enable */
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__u32 csense:1; /* concurrent sense; can be enabled ...*/
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/* ... per MSCH, however, if facility */
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/* ... is not installed, this results */
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/* ... in an operand exception. */
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} __attribute__ ((packed));
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/* Target SCHIB configuration. */
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struct schib_config {
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__u64 mba;
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__u32 intparm;
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__u16 mbi;
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__u32 isc:3;
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__u32 ena:1;
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__u32 mme:2;
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__u32 mp:1;
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__u32 csense:1;
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__u32 mbfc:1;
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} __attribute__ ((packed));
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struct scsw {
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__u16 flags;
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__u16 ctrl;
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__u32 cpa;
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__u8 dstat;
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__u8 cstat;
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__u16 count;
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} __attribute__ ((packed));
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/* Function Control */
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#define SCSW_FCTL_START_FUNC 0x4000
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#define SCSW_FCTL_HALT_FUNC 0x2000
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#define SCSW_FCTL_CLEAR_FUNC 0x1000
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/* Activity Control */
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#define SCSW_ACTL_RESUME_PEND 0x0800
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#define SCSW_ACTL_START_PEND 0x0400
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#define SCSW_ACTL_HALT_PEND 0x0200
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#define SCSW_ACTL_CLEAR_PEND 0x0100
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#define SCSW_ACTL_CH_ACTIVE 0x0080
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#define SCSW_ACTL_DEV_ACTIVE 0x0040
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#define SCSW_ACTL_SUSPENDED 0x0020
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/* Status Control */
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#define SCSW_SCTL_ALERT 0x0010
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#define SCSW_SCTL_INTERMED 0x0008
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#define SCSW_SCTL_PRIMARY 0x0004
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#define SCSW_SCTL_SECONDARY 0x0002
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#define SCSW_SCTL_STATUS_PEND 0x0001
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/* SCSW Device Status Flags */
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#define SCSW_DSTAT_ATTN 0x80
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#define SCSW_DSTAT_STATMOD 0x40
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#define SCSW_DSTAT_CUEND 0x20
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#define SCSW_DSTAT_BUSY 0x10
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#define SCSW_DSTAT_CHEND 0x08
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#define SCSW_DSTAT_DEVEND 0x04
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#define SCSW_DSTAT_UCHK 0x02
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#define SCSW_DSTAT_UEXCP 0x01
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/* SCSW Subchannel Status Flags */
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#define SCSW_CSTAT_PCINT 0x80
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#define SCSW_CSTAT_BADLEN 0x40
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#define SCSW_CSTAT_PROGCHK 0x20
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#define SCSW_CSTAT_PROTCHK 0x10
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#define SCSW_CSTAT_CHDCHK 0x08
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#define SCSW_CSTAT_CHCCHK 0x04
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#define SCSW_CSTAT_ICCHK 0x02
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#define SCSW_CSTAT_CHAINCHK 0x01
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/*
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* subchannel information block
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*/
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typedef struct schib {
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struct pmcw pmcw; /* path management control word */
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struct scsw scsw; /* subchannel status word */
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__u64 mba; /* measurement block address */
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__u8 mda[4]; /* model dependent area */
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} __attribute__ ((packed, aligned(4))) Schib;
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typedef struct subchannel_id {
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union {
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struct {
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__u16 cssid:8;
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__u16 reserved:4;
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__u16 m:1;
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__u16 ssid:2;
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__u16 one:1;
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};
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__u16 sch_id;
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};
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__u16 sch_no;
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} __attribute__ ((packed, aligned(4))) SubChannelId;
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struct chsc_header {
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__u16 length;
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__u16 code;
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} __attribute__((packed));
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typedef struct chsc_area_sda {
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struct chsc_header request;
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__u8 reserved1:4;
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__u8 format:4;
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__u8 reserved2;
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__u16 operation_code;
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__u32 reserved3;
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__u32 reserved4;
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__u32 operation_data_area[252];
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struct chsc_header response;
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__u32 reserved5:4;
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__u32 format2:4;
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__u32 reserved6:24;
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} __attribute__((packed)) ChscAreaSda;
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/*
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* TPI info structure
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*/
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struct tpi_info {
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struct subchannel_id schid;
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__u32 intparm; /* interruption parameter */
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__u32 adapter_IO:1;
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__u32 reserved2:1;
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__u32 isc:3;
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__u32 reserved3:12;
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__u32 int_type:3;
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__u32 reserved4:12;
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} __attribute__ ((packed, aligned(4)));
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/* channel command word (format 0) */
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typedef struct ccw0 {
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__u8 cmd_code;
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__u32 cda:24;
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__u32 chainData:1;
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__u32 chain:1;
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__u32 sli:1;
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__u32 skip:1;
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__u32 pci:1;
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__u32 ida:1;
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__u32 suspend:1;
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__u32 mida:1;
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__u8 reserved;
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__u16 count;
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} __attribute__ ((packed, aligned(8))) Ccw0;
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/* channel command word (format 1) */
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typedef struct ccw1 {
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__u8 cmd_code;
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__u8 flags;
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__u16 count;
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__u32 cda;
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} __attribute__ ((packed, aligned(8))) Ccw1;
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/* do_cio() CCW formats */
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#define CCW_FMT0 0x00
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#define CCW_FMT1 0x01
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#define CCW_FLAG_DC 0x80
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#define CCW_FLAG_CC 0x40
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#define CCW_FLAG_SLI 0x20
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#define CCW_FLAG_SKIP 0x10
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#define CCW_FLAG_PCI 0x08
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#define CCW_FLAG_IDA 0x04
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#define CCW_FLAG_SUSPEND 0x02
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/* Common CCW commands */
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#define CCW_CMD_READ_IPL 0x02
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#define CCW_CMD_NOOP 0x03
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#define CCW_CMD_BASIC_SENSE 0x04
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#define CCW_CMD_TIC 0x08
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#define CCW_CMD_SENSE_ID 0xe4
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/* Virtio CCW commands */
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#define CCW_CMD_SET_VQ 0x13
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#define CCW_CMD_VDEV_RESET 0x33
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#define CCW_CMD_READ_FEAT 0x12
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#define CCW_CMD_WRITE_FEAT 0x11
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#define CCW_CMD_READ_CONF 0x22
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#define CCW_CMD_WRITE_CONF 0x21
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#define CCW_CMD_WRITE_STATUS 0x31
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#define CCW_CMD_SET_IND 0x43
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#define CCW_CMD_SET_CONF_IND 0x53
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#define CCW_CMD_READ_VQ_CONF 0x32
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/* DASD CCW commands */
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#define CCW_CMD_DASD_READ 0x06
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#define CCW_CMD_DASD_SEEK 0x07
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#define CCW_CMD_DASD_SEARCH_ID_EQ 0x31
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#define CCW_CMD_DASD_READ_MT 0x86
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/*
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* Command-mode operation request block
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*/
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typedef struct cmd_orb {
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__u32 intparm; /* interruption parameter */
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__u32 key:4; /* flags, like key, suspend control, etc. */
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__u32 spnd:1; /* suspend control */
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__u32 res1:1; /* reserved */
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__u32 mod:1; /* modification control */
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__u32 sync:1; /* synchronize control */
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__u32 fmt:1; /* format control */
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__u32 pfch:1; /* prefetch control */
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__u32 isic:1; /* initial-status-interruption control */
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__u32 alcc:1; /* address-limit-checking control */
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__u32 ssic:1; /* suppress-suspended-interr. control */
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__u32 res2:1; /* reserved */
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__u32 c64:1; /* IDAW/QDIO 64 bit control */
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__u32 i2k:1; /* IDAW 2/4kB block size control */
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__u32 lpm:8; /* logical path mask */
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__u32 ils:1; /* incorrect length */
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__u32 zero:6; /* reserved zeros */
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__u32 orbx:1; /* ORB extension control */
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__u32 cpa; /* channel program address */
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} __attribute__ ((packed, aligned(4))) CmdOrb;
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struct ciw {
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__u8 type;
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__u8 command;
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__u16 count;
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};
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#define CU_TYPE_UNKNOWN 0x0000
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#define CU_TYPE_DASD_2107 0x2107
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#define CU_TYPE_VIRTIO 0x3832
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#define CU_TYPE_DASD_3990 0x3990
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/*
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* sense-id response buffer layout
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*/
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typedef struct senseid {
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/* common part */
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__u8 reserved; /* always 0x'FF' */
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__u16 cu_type; /* control unit type */
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__u8 cu_model; /* control unit model */
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__u16 dev_type; /* device type */
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__u8 dev_model; /* device model */
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__u8 unused; /* padding byte */
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/* extended part */
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struct ciw ciw[62];
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} __attribute__ ((packed, aligned(4))) SenseId;
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/*
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* architected values for first sense byte - common_status. Bits 0-5 of this
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* field are common to all device types.
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*/
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#define SNS_STAT0_CMD_REJECT 0x80
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#define SNS_STAT0_INTERVENTION_REQ 0x40
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#define SNS_STAT0_BUS_OUT_CHECK 0x20
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#define SNS_STAT0_EQUIPMENT_CHECK 0x10
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#define SNS_STAT0_DATA_CHECK 0x08
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#define SNS_STAT0_OVERRUN 0x04
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#define SNS_STAT0_INCOMPL_DOMAIN 0x01
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/* ECKD DASD status[0] byte */
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#define SNS_STAT1_PERM_ERR 0x80
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#define SNS_STAT1_INV_TRACK_FORMAT 0x40
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#define SNS_STAT1_EOC 0x20
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#define SNS_STAT1_MESSAGE_TO_OPER 0x10
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#define SNS_STAT1_NO_REC_FOUND 0x08
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#define SNS_STAT1_FILE_PROTECTED 0x04
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#define SNS_STAT1_WRITE_INHIBITED 0x02
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#define SNS_STAT1_IMPRECISE_END 0x01
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/* ECKD DASD status[1] byte */
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#define SNS_STAT2_REQ_INH_WRITE 0x80
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#define SNS_STAT2_CORRECTABLE 0x40
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#define SNS_STAT2_FIRST_LOG_ERR 0x20
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#define SNS_STAT2_ENV_DATA_PRESENT 0x10
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#define SNS_STAT2_IMPRECISE_END 0x04
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/* ECKD DASD 24-byte Sense fmt_msg codes */
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#define SENSE24_FMT_PROG_SYS 0x0
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#define SENSE24_FMT_EQUIPMENT 0x2
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#define SENSE24_FMT_CONTROLLER 0x3
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#define SENSE24_FMT_MISC 0xF
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/* basic sense response buffer layout */
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typedef struct SenseDataEckdDasd {
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uint8_t common_status;
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uint8_t status[2];
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uint8_t res_count;
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uint8_t phys_drive_id;
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uint8_t low_cyl_addr;
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uint8_t head_high_cyl_addr;
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uint8_t fmt_msg;
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uint64_t fmt_dependent_info[2];
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uint8_t reserved;
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uint8_t program_action_code;
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uint16_t config_info;
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uint8_t mcode_hicyl;
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uint8_t cyl_head_addr[3];
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} __attribute__ ((packed, aligned(4))) SenseDataEckdDasd;
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#define ECKD_SENSE24_GET_FMT(sd) (sd->fmt_msg & 0xF0 >> 4)
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#define ECKD_SENSE24_GET_MSG(sd) (sd->fmt_msg & 0x0F)
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#define unit_check(irb) ((irb)->scsw.dstat & SCSW_DSTAT_UCHK)
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#define iface_ctrl_check(irb) ((irb)->scsw.cstat & SCSW_CSTAT_ICCHK)
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/* interruption response block */
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typedef struct irb {
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struct scsw scsw;
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__u32 esw[5];
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__u32 ecw[8];
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__u32 emw[8];
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} __attribute__ ((packed, aligned(4))) Irb;
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/* Used for SEEK ccw commands */
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typedef struct CcwSeekData {
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uint16_t reserved;
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uint16_t cyl;
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uint16_t head;
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} __attribute__((packed)) CcwSeekData;
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/* Used for SEARCH ID ccw commands */
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typedef struct CcwSearchIdData {
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uint16_t cyl;
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uint16_t head;
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uint8_t record;
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} __attribute__((packed)) CcwSearchIdData;
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int enable_mss_facility(void);
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void enable_subchannel(SubChannelId schid);
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uint16_t cu_type(SubChannelId schid);
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int basic_sense(SubChannelId schid, uint16_t cutype, void *sense_data,
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uint16_t data_size);
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int do_cio(SubChannelId schid, uint16_t cutype, uint32_t ccw_addr, int fmt);
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/*
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* Some S390 specific IO instructions as inline
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*/
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static inline int stsch_err(struct subchannel_id schid, struct schib *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" stsch 0(%3)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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: "+d" (ccode), "=m" (*addr)
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: "d" (reg1), "a" (addr)
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: "cc");
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return ccode;
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}
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static inline int msch(struct subchannel_id schid, struct schib *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode;
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asm volatile(
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" msch 0(%2)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc");
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return ccode;
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}
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static inline int msch_err(struct subchannel_id schid, struct schib *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" msch 0(%2)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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: "+d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc");
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return ccode;
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}
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static inline int tsch(struct subchannel_id schid, struct irb *addr)
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{
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register struct subchannel_id reg1 asm ("1") = schid;
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int ccode;
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asm volatile(
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" tsch 0(%3)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode), "=m" (*addr)
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: "d" (reg1), "a" (addr)
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: "cc");
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return ccode;
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}
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static inline int ssch(struct subchannel_id schid, struct cmd_orb *addr)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode = -EIO;
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asm volatile(
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" ssch 0(%2)\n"
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"0: ipm %0\n"
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" srl %0,28\n"
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"1:\n"
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: "+d" (ccode)
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: "d" (reg1), "a" (addr), "m" (*addr)
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: "cc", "memory");
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return ccode;
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}
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static inline int csch(struct subchannel_id schid)
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{
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register struct subchannel_id reg1 asm("1") = schid;
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int ccode;
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asm volatile(
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" csch\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode)
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: "d" (reg1)
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: "cc");
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return ccode;
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}
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static inline int tpi(struct tpi_info *addr)
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{
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int ccode;
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asm volatile(
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" tpi 0(%2)\n"
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" ipm %0\n"
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" srl %0,28"
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: "=d" (ccode), "=m" (*addr)
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: "a" (addr)
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: "cc");
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return ccode;
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}
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static inline int chsc(void *chsc_area)
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{
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typedef struct { char _[4096]; } addr_type;
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int cc;
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asm volatile(
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" .insn rre,0xb25f0000,%2,0\n"
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" ipm %0\n"
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" srl %0,28\n"
|
|
: "=d" (cc), "=m" (*(addr_type *) chsc_area)
|
|
: "d" (chsc_area), "m" (*(addr_type *) chsc_area)
|
|
: "cc");
|
|
return cc;
|
|
}
|
|
|
|
#endif /* CIO_H */
|