80 lines
3.9 KiB
Text
80 lines
3.9 KiB
Text
## @file
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# IntelSilicon Package
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#
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# This package provides common open source Intel silicon modules.
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#
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# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = IntelSiliconPkg
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PACKAGE_GUID = F7A58914-FA0E-4F71-BD6A-220FDF824A49
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PACKAGE_VERSION = 0.1
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[Includes]
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Include
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[LibraryClasses.IA32, LibraryClasses.X64]
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## @libraryclass Provides services to access Microcode region on flash device.
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#
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MicrocodeFlashAccessLib|Include/Library/MicrocodeFlashAccessLib.h
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[Guids]
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## GUID for Package token space
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# {A9F8D54E-1107-4F0A-ADD0-4587E7A4A735}
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gIntelSiliconPkgTokenSpaceGuid = { 0xa9f8d54e, 0x1107, 0x4f0a, { 0xad, 0xd0, 0x45, 0x87, 0xe7, 0xa4, 0xa7, 0x35 } }
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## HOB GUID to publish SMBIOS data records from PEI phase
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# HOB data format is same as SMBIOS records defined in SMBIOS spec or OEM defined types
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# Generic DXE Library / Driver can locate HOB(s) and add SMBIOS records into SMBIOS table
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gIntelSmbiosDataHobGuid = { 0x798e722e, 0x15b2, 0x4e13, { 0x8a, 0xe9, 0x6b, 0xa3, 0x0f, 0xf7, 0xf1, 0x67 }}
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## Include/Guid/MicrocodeFmp.h
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gMicrocodeFmpImageTypeIdGuid = { 0x96d4fdcd, 0x1502, 0x424d, { 0x9d, 0x4c, 0x9b, 0x12, 0xd2, 0xdc, 0xae, 0x5c } }
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[Ppis]
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gEdkiiVTdInfoPpiGuid = { 0x8a59fcb3, 0xf191, 0x400c, { 0x97, 0x67, 0x67, 0xaf, 0x2b, 0x25, 0x68, 0x4a } }
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[Protocols]
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gEdkiiPlatformVTdPolicyProtocolGuid = { 0x3d17e448, 0x466, 0x4e20, { 0x99, 0x9f, 0xb2, 0xe1, 0x34, 0x88, 0xee, 0x22 }}
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[PcdsFixedAtBuild, PcdsPatchableInModule]
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## Error code for VTd error.<BR><BR>
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# EDKII_ERROR_CODE_VTD_ERROR = (EFI_IO_BUS_UNSPECIFIED | (EFI_OEM_SPECIFIC | 0x00000000)) = 0x02008000<BR>
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# @Prompt Error code for VTd error.
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gIntelSiliconPkgTokenSpaceGuid.PcdErrorCodeVTdError|0x02008000|UINT32|0x00000005
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[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
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## This is the GUID of the FFS which contains the Graphics Video BIOS Table (VBT)
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# The VBT content is stored as a RAW section which is consumed by GOP PEI/UEFI driver.
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# The default GUID can be updated by patching or runtime if platform support multiple VBT configurations.
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# @Prompt GUID of the FFS which contains the Graphics Video BIOS Table (VBT)
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# { 0x56752da9, 0xde6b, 0x4895, 0x88, 0x19, 0x19, 0x45, 0xb6, 0xb7, 0x6c, 0x22 }
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gIntelSiliconPkgTokenSpaceGuid.PcdIntelGraphicsVbtFileGuid|{ 0xa9, 0x2d, 0x75, 0x56, 0x6b, 0xde, 0x95, 0x48, 0x88, 0x19, 0x19, 0x45, 0xb6, 0xb7, 0x6c, 0x22 }|VOID*|0x00000001
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## The mask is used to control VTd behavior.<BR><BR>
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# BIT0: Enable IOMMU during boot (If DMAR table is installed in DXE. If VTD_INFO_PPI is installed in PEI.)
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# BIT1: Enable IOMMU when transfer control to OS (ExitBootService in normal boot. EndOfPEI in S3)
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# BIT2: Force no IOMMU access attribute request recording before DMAR table is installed.
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# @Prompt The policy for VTd driver behavior.
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gIntelSiliconPkgTokenSpaceGuid.PcdVTdPolicyPropertyMask|1|UINT8|0x00000002
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## Declares VTd PEI DMA buffer size.<BR><BR>
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# When this PCD value is referred by platform to calculate the required
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# memory size for PEI (InstallPeiMemory), the PMR alignment requirement
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# needs be considered to be added with this PCD value for alignment
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# adjustment need by AllocateAlignedPages.
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# @Prompt The VTd PEI DMA buffer size.
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gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSize|0x00400000|UINT32|0x00000003
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## Declares VTd PEI DMA buffer size for S3.<BR><BR>
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# When this PCD value is referred by platform to calculate the required
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# memory size for PEI S3 (InstallPeiMemory), the PMR alignment requirement
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# needs be considered to be added with this PCD value for alignment
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# adjustment need by AllocateAlignedPages.
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# @Prompt The VTd PEI DMA buffer size for S3.
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gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSizeS3|0x00200000|UINT32|0x00000004
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