708 lines
17 KiB
ArmAsm
708 lines
17 KiB
ArmAsm
/*
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* Creation Date: <2001/06/16 21:30:18 samuel>
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* Time-stamp: <2003/04/04 16:32:06 samuel>
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*
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* <init.S>
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*
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* Asm glue for ELF images
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*
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* Copyright (C) 2001, 2002, 2003 Samuel Rydh (samuel@ibrium.se)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation
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*
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*/
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#include "autoconf.h"
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#include "asm/asmdefs.h"
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#include "asm/processor.h"
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/************************************************************************/
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/* Macros */
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/************************************************************************/
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#define ILLEGAL_VECTOR( v ) .org __vectors + v ; vector__##v: bl trap_error ;
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#define VECTOR( v, dummystr ) .org __vectors + v ; vector__##v
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#ifdef CONFIG_PPC_64BITSUPPORT
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/* We're trying to use the same code for the ppc32 and ppc64 handlers here.
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* On ppc32 we only save/restore the registers, C considers volatile.
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*
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* On ppc64 on the other hand, we have to save/restore all registers, because
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* all OF code is 32 bits, which only saves/restores the low 32 bits of the
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* registers it clobbers.
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*/
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#define EXCEPTION_PREAMBLE_TEMPLATE \
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mtsprg1 r1 ; /* scratch */ \
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mfcr r1 ; \
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mtsprg2 r1 ; /* scratch */ \
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lis r1, 0x8000 ; /* r1=0x80000000 */ \
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add. r1,r1,r1 ; /* r1=r1+r1 (high 32bit !0) */ \
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beq 1f; \
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\
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mfmsr r1 ; /* unset MSR_SF */ \
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clrldi r1,r1,1 ; \
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mtmsrd r1 ; \
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1: \
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mfsprg0 r1 ; /* exception stack in sprg0 */ \
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.ifc ULONG_SIZE, 8 ; \
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addi r1,r1,-(40 * ULONG_SIZE) ; /* push exception frame */ \
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.else ; \
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addi r1,r1,-(20 * ULONG_SIZE) ; /* push exception frame */ \
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.endif ; \
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\
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stl r0,(0 * ULONG_SIZE)(r1) ; /* save r0 */ \
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mfsprg1 r0 ; \
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stl r0,(1 * ULONG_SIZE)(r1) ; /* save r1 */ \
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stl r2,(2 * ULONG_SIZE)(r1) ; /* save r2 */ \
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stl r3,(3 * ULONG_SIZE)(r1) ; /* save r3 */ \
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stl r4,(4 * ULONG_SIZE)(r1) ; \
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stl r5,(5 * ULONG_SIZE)(r1) ; \
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stl r6,(6 * ULONG_SIZE)(r1) ; \
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stl r7,(7 * ULONG_SIZE)(r1) ; \
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stl r8,(8 * ULONG_SIZE)(r1) ; \
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stl r9,(9 * ULONG_SIZE)(r1) ; \
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stl r10,(10 * ULONG_SIZE)(r1) ; \
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stl r11,(11 * ULONG_SIZE)(r1) ; \
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stl r12,(12 * ULONG_SIZE)(r1) ; \
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.ifc ULONG_SIZE, 8 ; \
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stl r13,(17 * ULONG_SIZE)(r1) ; \
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stl r14,(18 * ULONG_SIZE)(r1) ; \
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stl r15,(19 * ULONG_SIZE)(r1) ; \
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stl r16,(20 * ULONG_SIZE)(r1) ; \
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stl r17,(21 * ULONG_SIZE)(r1) ; \
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stl r18,(22 * ULONG_SIZE)(r1) ; \
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stl r19,(23 * ULONG_SIZE)(r1) ; \
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stl r20,(24 * ULONG_SIZE)(r1) ; \
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stl r21,(25 * ULONG_SIZE)(r1) ; \
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stl r22,(26 * ULONG_SIZE)(r1) ; \
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stl r23,(27 * ULONG_SIZE)(r1) ; \
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stl r24,(28 * ULONG_SIZE)(r1) ; \
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stl r25,(29 * ULONG_SIZE)(r1) ; \
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stl r26,(30 * ULONG_SIZE)(r1) ; \
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stl r27,(31 * ULONG_SIZE)(r1) ; \
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stl r28,(32 * ULONG_SIZE)(r1) ; \
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stl r29,(33 * ULONG_SIZE)(r1) ; \
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stl r30,(34 * ULONG_SIZE)(r1) ; \
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stl r31,(35 * ULONG_SIZE)(r1) ; \
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.endif ; \
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\
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mflr r0 ; \
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stl r0,(13 * ULONG_SIZE)(r1) ; \
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mfsprg2 r0 ; \
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stl r0,(14 * ULONG_SIZE)(r1) ; \
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mfctr r0 ; \
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stl r0,(15 * ULONG_SIZE)(r1) ; \
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mfxer r0 ; \
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stl r0,(16 * ULONG_SIZE)(r1) ; \
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\
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/* 76(r1) unused */ \
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addi r1,r1,-16 ; /* C ABI uses 0(r1) and 4(r1)... */
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#define EXCEPTION_EPILOGUE_TEMPLATE \
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addi r1,r1,16 ; /* pop ABI frame */ \
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\
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ll r0,(13 * ULONG_SIZE)(r1) ; \
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mtlr r0 ; \
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ll r0,(14 * ULONG_SIZE)(r1) ; \
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mtcr r0 ; \
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ll r0,(15 * ULONG_SIZE)(r1) ; \
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mtctr r0 ; \
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ll r0,(16 * ULONG_SIZE)(r1) ; \
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mtxer r0 ; \
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\
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ll r0,(0 * ULONG_SIZE)(r1) ; \
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ll r2,(2 * ULONG_SIZE)(r1) ; \
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ll r3,(3 * ULONG_SIZE)(r1) ; \
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ll r4,(4 * ULONG_SIZE)(r1) ; \
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ll r5,(5 * ULONG_SIZE)(r1) ; \
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ll r6,(6 * ULONG_SIZE)(r1) ; \
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ll r7,(7 * ULONG_SIZE)(r1) ; \
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ll r8,(8 * ULONG_SIZE)(r1) ; \
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ll r9,(9 * ULONG_SIZE)(r1) ; \
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ll r10,(10 * ULONG_SIZE)(r1) ; \
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ll r11,(11 * ULONG_SIZE)(r1) ; \
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ll r12,(12 * ULONG_SIZE)(r1) ; \
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.ifc ULONG_SIZE, 8 ; \
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ll r13,(17 * ULONG_SIZE)(r1) ; \
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ll r14,(18 * ULONG_SIZE)(r1) ; \
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ll r15,(19 * ULONG_SIZE)(r1) ; \
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ll r16,(20 * ULONG_SIZE)(r1) ; \
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ll r17,(21 * ULONG_SIZE)(r1) ; \
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ll r18,(22 * ULONG_SIZE)(r1) ; \
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ll r19,(23 * ULONG_SIZE)(r1) ; \
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ll r20,(24 * ULONG_SIZE)(r1) ; \
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ll r21,(25 * ULONG_SIZE)(r1) ; \
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ll r22,(26 * ULONG_SIZE)(r1) ; \
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ll r23,(27 * ULONG_SIZE)(r1) ; \
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ll r24,(28 * ULONG_SIZE)(r1) ; \
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ll r25,(29 * ULONG_SIZE)(r1) ; \
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ll r26,(30 * ULONG_SIZE)(r1) ; \
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ll r27,(31 * ULONG_SIZE)(r1) ; \
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ll r28,(32 * ULONG_SIZE)(r1) ; \
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ll r29,(33 * ULONG_SIZE)(r1) ; \
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ll r30,(34 * ULONG_SIZE)(r1) ; \
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ll r31,(35 * ULONG_SIZE)(r1) ; \
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.endif ; \
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ll r1,(1 * ULONG_SIZE)(r1) ; /* restore stack at last */ \
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rfi
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// PPC32
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#define ULONG_SIZE 4
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#define stl stw
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#define ll lwz
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.macro EXCEPTION_PREAMBLE
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EXCEPTION_PREAMBLE_TEMPLATE
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.endm
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.macro EXCEPTION_EPILOGUE
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EXCEPTION_EPILOGUE_TEMPLATE
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.endm
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#undef ULONG_SIZE
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#undef stl
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#undef ll
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// PPC64
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#define ULONG_SIZE 8
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#define stl std
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#define ll ld
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.macro EXCEPTION_PREAMBLE_64
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EXCEPTION_PREAMBLE_TEMPLATE
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.endm
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.macro EXCEPTION_EPILOGUE_64
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EXCEPTION_EPILOGUE_TEMPLATE
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.endm
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#undef ULONG_SIZE
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#undef stl
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#undef ll
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#define ULONG_SIZE 4
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#define STACKFRAME_MINSIZE 16
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#else /* !CONFIG_PPC_64BITSUPPORT */
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#ifdef __powerpc64__
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#define ULONG_SIZE 8
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#define STACKFRAME_MINSIZE 48
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#define stl std
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#define ll ld
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#else
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#define ULONG_SIZE 4
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#define STACKFRAME_MINSIZE 16
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#define stl stw
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#define ll lwz
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#endif
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.macro EXCEPTION_PREAMBLE
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mtsprg1 r1 /* scratch */
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mfsprg0 r1 /* exception stack in sprg0 */
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addi r1, r1, -(20 * ULONG_SIZE) /* push exception frame */
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stl r0, ( 0 * ULONG_SIZE)(r1) /* save r0 */
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mfsprg1 r0
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stl r0, ( 1 * ULONG_SIZE)(r1) /* save r1 */
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stl r2, ( 2 * ULONG_SIZE)(r1) /* save r2 */
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stl r3, ( 3 * ULONG_SIZE)(r1) /* save r3 */
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stl r4, ( 4 * ULONG_SIZE)(r1)
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stl r5, ( 5 * ULONG_SIZE)(r1)
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stl r6, ( 6 * ULONG_SIZE)(r1)
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stl r7, ( 7 * ULONG_SIZE)(r1)
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stl r8, ( 8 * ULONG_SIZE)(r1)
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stl r9, ( 9 * ULONG_SIZE)(r1)
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stl r10, (10 * ULONG_SIZE)(r1)
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stl r11, (11 * ULONG_SIZE)(r1)
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stl r12, (12 * ULONG_SIZE)(r1)
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mflr r0
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stl r0, (13 * ULONG_SIZE)(r1)
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mfcr r0
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stl r0, (14 * ULONG_SIZE)(r1)
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mfctr r0
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stl r0, (15 * ULONG_SIZE)(r1)
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mfxer r0
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stl r0, (16 * ULONG_SIZE)(r1)
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addi r1, r1, -STACKFRAME_MINSIZE /* C ABI saves LR and SP */
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.endm
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.macro EXCEPTION_EPILOGUE
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addi r1, r1, STACKFRAME_MINSIZE /* pop ABI frame */
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ll r0, (13 * ULONG_SIZE)(r1)
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mtlr r0
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ll r0, (14 * ULONG_SIZE)(r1)
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mtcr r0
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ll r0, (15 * ULONG_SIZE)(r1)
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mtctr r0
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ll r0, (16 * ULONG_SIZE)(r1)
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mtxer r0
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ll r0, ( 0 * ULONG_SIZE)(r1)
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ll r2, ( 2 * ULONG_SIZE)(r1)
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ll r3, ( 3 * ULONG_SIZE)(r1)
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ll r4, ( 4 * ULONG_SIZE)(r1)
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ll r5, ( 5 * ULONG_SIZE)(r1)
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ll r6, ( 6 * ULONG_SIZE)(r1)
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ll r7, ( 7 * ULONG_SIZE)(r1)
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ll r8, ( 8 * ULONG_SIZE)(r1)
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ll r9, ( 9 * ULONG_SIZE)(r1)
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ll r10, (10 * ULONG_SIZE)(r1)
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ll r11, (11 * ULONG_SIZE)(r1)
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ll r12, (12 * ULONG_SIZE)(r1)
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ll r1, ( 1 * ULONG_SIZE)(r1) /* restore stack at last */
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RFI
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.endm
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#endif /* !CONFIG_PPC_64BITSUPPORT */
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/************************************************************************/
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/* vectors */
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/************************************************************************/
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.section .text.vectors, "ax"
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GLOBL(__vectors):
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nop // NULL-jmp trap
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1: nop //
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b 1b
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VECTOR( 0x100, "SRE" ):
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b _entry
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trap_error:
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lis r1, 0x8000 /* r1=0x80000000 */
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add. r1,r1,r1 /* r1=r1+r1 (high 32bit !0) */
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beq 1f
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mfmsr r1 /* unset MSR_SF */
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clrldi r1,r1,1
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mtmsrd r1
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1:
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mflr r3
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LOAD_REG_FUNC(r4, unexpected_excep)
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mtctr r4
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bctr
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ILLEGAL_VECTOR( 0x200 )
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VECTOR( 0x300, "DSI" ):
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b real_dsi
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ILLEGAL_VECTOR( 0x380 )
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VECTOR( 0x400, "ISI" ):
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b real_isi
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ILLEGAL_VECTOR( 0x480 )
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ILLEGAL_VECTOR( 0x500 )
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ILLEGAL_VECTOR( 0x600 )
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ILLEGAL_VECTOR( 0x700 )
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VECTOR( 0x800, "FPU" ):
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mtsprg1 r3
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mfsrr1 r3
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ori r3,r3,0x2000
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mtsrr1 r3
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mfsprg1 r3
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RFI
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ILLEGAL_VECTOR( 0x900 )
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ILLEGAL_VECTOR( 0xa00 )
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ILLEGAL_VECTOR( 0xb00 )
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ILLEGAL_VECTOR( 0xc00 )
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ILLEGAL_VECTOR( 0xd00 )
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ILLEGAL_VECTOR( 0xe00 )
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ILLEGAL_VECTOR( 0xf00 )
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ILLEGAL_VECTOR( 0xf20 )
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ILLEGAL_VECTOR( 0x1000 )
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ILLEGAL_VECTOR( 0x1100 )
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ILLEGAL_VECTOR( 0x1200 )
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ILLEGAL_VECTOR( 0x1300 )
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ILLEGAL_VECTOR( 0x1400 )
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ILLEGAL_VECTOR( 0x1500 )
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ILLEGAL_VECTOR( 0x1600 )
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ILLEGAL_VECTOR( 0x1700 )
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#ifdef CONFIG_PPC_64BITSUPPORT
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VECTOR( 0x2000, "DSI_64" ):
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EXCEPTION_PREAMBLE_64
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LOAD_REG_IMMEDIATE(r3, dsi_exception)
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mtctr r3
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bctrl
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EXCEPTION_EPILOGUE_64
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VECTOR( 0x2200, "ISI_64" ):
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EXCEPTION_PREAMBLE_64
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LOAD_REG_IMMEDIATE(r3, isi_exception)
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mtctr r3
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bctrl
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EXCEPTION_EPILOGUE_64
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#endif
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real_dsi:
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EXCEPTION_PREAMBLE
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LOAD_REG_FUNC(r3, dsi_exception)
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mtctr r3
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bctrl
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b exception_return
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real_isi:
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EXCEPTION_PREAMBLE
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LOAD_REG_FUNC(r3, isi_exception)
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mtctr r3
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bctrl
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b exception_return
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exception_return:
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EXCEPTION_EPILOGUE
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GLOBL(__vectors_end):
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/************************************************************************/
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/* entry */
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/************************************************************************/
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GLOBL(_entry):
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#ifdef CONFIG_PPC_64BITSUPPORT
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li r0,0
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lis r3, 0x8000 /* r1=0x80000000 */
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add. r3,r3,r3 /* r1=r1+r1 (high 32bit !0) */
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beq no_64bit /* only true when !MSR_SF */
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/* clear MSR, disable MMU, SF */
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mtmsrd r0
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b real_entry
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no_64bit:
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/* clear MSR, disable MMU */
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mtmsr r0
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real_entry:
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#endif
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/* copy exception vectors */
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LOAD_REG_IMMEDIATE(r3, __vectors)
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li r4,0
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li r5,__vectors_end - __vectors + 16
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rlwinm r5,r5,0,0,28
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1: lwz r6,0(r3)
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lwz r7,4(r3)
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lwz r8,8(r3)
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lwz r9,12(r3)
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stw r6,0(r4)
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stw r7,4(r4)
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stw r8,8(r4)
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stw r9,12(r4)
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dcbst 0,r4
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sync
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icbi 0,r4
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sync
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addi r5,r5,-16
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addi r3,r3,16
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addi r4,r4,16
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cmpwi r5,0
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bgt 1b
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isync
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bl compute_ramsize
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/* Memory map:
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*
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* Top +-------------------------+
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* | |
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* | ROM into RAM (1 MB) |
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* | |
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* +-------------------------+
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* | |
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* | MMU Hash Table (64 kB) |
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* | |
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* +-------------------------+
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* | |
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* | Exception Stack (32 kB) |
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* | |
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* +-------------------------+
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* | |
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* | Stack (64 kB) |
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* | |
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* +-------------------------+
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* | |
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* | Client Stack (64 kB) |
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* | |
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* +-------------------------+
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* | |
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* | Malloc Zone (2 MiB) |
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* | |
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* +-------------------------+
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* : :
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* Bottom
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*/
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addis r1, r3, -16 /* ramsize - 1MB */
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/* setup hash table */
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addis r1, r1, -1 /* - 64 kB */
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clrrwi r1, r1, 5*4 /* & ~0xfffff */
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/* setup exception stack */
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mtsprg0 r1
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/* setup stack */
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addi r1, r1, -32768 /* - 32 kB */
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/* save memory size in stack */
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#ifdef __powerpc64__
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/* set up TOC pointer */
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LOAD_REG_IMMEDIATE(r2, setup_mmu)
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ld r2, 8(r2)
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#endif
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bl BRANCH_LABEL(setup_mmu)
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/* load stack pointer into context */
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LOAD_REG_IMMEDIATE(r4, __context)
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PPC_LL r4, 0(r4)
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PPC_STL r1, (2 * ULONG_SIZE)(r4)
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bl BRANCH_LABEL(__switch_context_nosave)
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1: nop
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b 1b
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.data
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_GLOBAL(saved_stack):
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DATA_LONG(0)
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.previous
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#ifdef __powerpc64__
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#define STKOFF STACKFRAME_MINSIZE
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#define SAVE_SPACE 320
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#else
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#define STKOFF 8
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#define SAVE_SPACE 144
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#endif
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GLOBL(of_client_callback):
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#ifdef CONFIG_PPC64
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PPC_STLU r1, -(STACKFRAME_MINSIZE + 16)(r1)
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#else
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PPC_STLU r1, -STACKFRAME_MINSIZE(r1) /* fits within alignment */
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#endif
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/* save r4 */
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PPC_STL r4, STKOFF(r1)
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/* save lr */
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mflr r4
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PPC_STL r4, PPC_LR_STKOFF(r1)
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/* restore OF stack */
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LOAD_REG_IMMEDIATE(r4, saved_stack)
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PPC_LL r4, 0(r4)
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PPC_STLU r4, -SAVE_SPACE(r4)
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PPC_STL r1, (STKOFF)(r4) // save caller stack
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mr r1,r4
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PPC_STL r3, (STKOFF + 5 * ULONG_SIZE)(r1)
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PPC_STL r2, (STKOFF + 4 * ULONG_SIZE)(r1)
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PPC_STL r0, (STKOFF + 3 * ULONG_SIZE)(r1)
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/* save ctr, cr and xer */
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mfctr r2
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PPC_STL r2, (STKOFF + 6 * ULONG_SIZE)(r1)
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mfcr r2
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PPC_STL r2, (STKOFF + 7 * ULONG_SIZE)(r1)
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mfxer r2
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PPC_STL r2, (STKOFF + 8 * ULONG_SIZE)(r1)
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/* save r5 - r31 */
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PPC_STL r5, (STKOFF + 10 * ULONG_SIZE)(r1)
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PPC_STL r6, (STKOFF + 11 * ULONG_SIZE)(r1)
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PPC_STL r7, (STKOFF + 12 * ULONG_SIZE)(r1)
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PPC_STL r8, (STKOFF + 13 * ULONG_SIZE)(r1)
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PPC_STL r9, (STKOFF + 14 * ULONG_SIZE)(r1)
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PPC_STL r10, (STKOFF + 15 * ULONG_SIZE)(r1)
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PPC_STL r11, (STKOFF + 16 * ULONG_SIZE)(r1)
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PPC_STL r12, (STKOFF + 17 * ULONG_SIZE)(r1)
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PPC_STL r13, (STKOFF + 18 * ULONG_SIZE)(r1)
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PPC_STL r14, (STKOFF + 19 * ULONG_SIZE)(r1)
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PPC_STL r15, (STKOFF + 20 * ULONG_SIZE)(r1)
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PPC_STL r16, (STKOFF + 21 * ULONG_SIZE)(r1)
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PPC_STL r17, (STKOFF + 22 * ULONG_SIZE)(r1)
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PPC_STL r18, (STKOFF + 23 * ULONG_SIZE)(r1)
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PPC_STL r19, (STKOFF + 24 * ULONG_SIZE)(r1)
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PPC_STL r20, (STKOFF + 25 * ULONG_SIZE)(r1)
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PPC_STL r21, (STKOFF + 26 * ULONG_SIZE)(r1)
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PPC_STL r22, (STKOFF + 27 * ULONG_SIZE)(r1)
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PPC_STL r23, (STKOFF + 28 * ULONG_SIZE)(r1)
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PPC_STL r24, (STKOFF + 29 * ULONG_SIZE)(r1)
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PPC_STL r25, (STKOFF + 30 * ULONG_SIZE)(r1)
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PPC_STL r26, (STKOFF + 31 * ULONG_SIZE)(r1)
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PPC_STL r27, (STKOFF + 32 * ULONG_SIZE)(r1)
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PPC_STL r28, (STKOFF + 33 * ULONG_SIZE)(r1)
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PPC_STL r29, (STKOFF + 34 * ULONG_SIZE)(r1)
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PPC_STL r30, (STKOFF + 35 * ULONG_SIZE)(r1)
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PPC_STL r31, (STKOFF + 36 * ULONG_SIZE)(r1)
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#ifdef CONFIG_PPC64
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LOAD_REG_IMMEDIATE(r2, of_client_interface)
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ld r2, 8(r2)
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#endif
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bl BRANCH_LABEL(of_client_interface)
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/* restore r5 - r31 */
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PPC_LL r5, (STKOFF + 10 * ULONG_SIZE)(r1)
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PPC_LL r6, (STKOFF + 11 * ULONG_SIZE)(r1)
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PPC_LL r7, (STKOFF + 12 * ULONG_SIZE)(r1)
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PPC_LL r8, (STKOFF + 13 * ULONG_SIZE)(r1)
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PPC_LL r9, (STKOFF + 14 * ULONG_SIZE)(r1)
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PPC_LL r10, (STKOFF + 15 * ULONG_SIZE)(r1)
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PPC_LL r11, (STKOFF + 16 * ULONG_SIZE)(r1)
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PPC_LL r12, (STKOFF + 17 * ULONG_SIZE)(r1)
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PPC_LL r13, (STKOFF + 18 * ULONG_SIZE)(r1)
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PPC_LL r14, (STKOFF + 19 * ULONG_SIZE)(r1)
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PPC_LL r15, (STKOFF + 20 * ULONG_SIZE)(r1)
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PPC_LL r16, (STKOFF + 21 * ULONG_SIZE)(r1)
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PPC_LL r17, (STKOFF + 22 * ULONG_SIZE)(r1)
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PPC_LL r18, (STKOFF + 23 * ULONG_SIZE)(r1)
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PPC_LL r19, (STKOFF + 24 * ULONG_SIZE)(r1)
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PPC_LL r20, (STKOFF + 25 * ULONG_SIZE)(r1)
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PPC_LL r21, (STKOFF + 26 * ULONG_SIZE)(r1)
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PPC_LL r22, (STKOFF + 27 * ULONG_SIZE)(r1)
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PPC_LL r23, (STKOFF + 28 * ULONG_SIZE)(r1)
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PPC_LL r24, (STKOFF + 29 * ULONG_SIZE)(r1)
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PPC_LL r25, (STKOFF + 30 * ULONG_SIZE)(r1)
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PPC_LL r26, (STKOFF + 31 * ULONG_SIZE)(r1)
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PPC_LL r27, (STKOFF + 32 * ULONG_SIZE)(r1)
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PPC_LL r28, (STKOFF + 33 * ULONG_SIZE)(r1)
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PPC_LL r29, (STKOFF + 34 * ULONG_SIZE)(r1)
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PPC_LL r30, (STKOFF + 35 * ULONG_SIZE)(r1)
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PPC_LL r31, (STKOFF + 36 * ULONG_SIZE)(r1)
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/* restore ctr, cr and xer */
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PPC_LL r2, (STKOFF + 6 * ULONG_SIZE)(r1)
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mtctr r2
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PPC_LL r2, (STKOFF + 7 * ULONG_SIZE)(r1)
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mtcr r2
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PPC_LL r2, (STKOFF + 8 * ULONG_SIZE)(r1)
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mtxer r2
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/* restore r0 and r2 */
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PPC_LL r2, (STKOFF + 4 * ULONG_SIZE)(r1)
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PPC_LL r0, (STKOFF + 3 * ULONG_SIZE)(r1)
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/* restore caller stack */
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PPC_LL r1, (STKOFF)(r1)
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PPC_LL r4, PPC_LR_STKOFF(r1)
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mtlr r4
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PPC_LL r4, STKOFF(r1)
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PPC_LL r1, 0(r1)
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blr
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/* rtas glue (must be reloctable) */
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GLOBL(of_rtas_start):
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/* r3 = argument buffer, r4 = of_rtas_start */
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/* according to the CHRP standard, cr must be preserved (cr0/cr1 too?) */
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blr
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GLOBL(of_rtas_end):
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#define CACHE_LINE_SIZE 32
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#define LG_CACHE_LINE_SIZE 5
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/* flush_icache_range( unsigned long start, unsigned long stop) */
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_GLOBAL(flush_icache_range):
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li r5,CACHE_LINE_SIZE-1
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andc r3,r3,r5
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subf r4,r3,r4
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add r4,r4,r5
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srwi. r4,r4,LG_CACHE_LINE_SIZE
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beqlr
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mtctr r4
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mr r6,r3
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1: dcbst 0,r3
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addi r3,r3,CACHE_LINE_SIZE
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bdnz 1b
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sync /* wait for dcbst's to get to ram */
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mtctr r4
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2: icbi 0,r6
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addi r6,r6,CACHE_LINE_SIZE
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bdnz 2b
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sync /* additional sync needed on g4 */
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isync
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blr
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/* flush_dcache_range( unsigned long start, unsigned long stop) */
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_GLOBAL(flush_dcache_range):
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li r5,CACHE_LINE_SIZE-1
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andc r3,r3,r5
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subf r4,r3,r4
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add r4,r4,r5
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srwi. r4,r4,LG_CACHE_LINE_SIZE
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beqlr
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mtctr r4
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mr r6,r3
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1: dcbst 0,r3
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addi r3,r3,CACHE_LINE_SIZE
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bdnz 1b
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sync /* wait for dcbst's to get to ram */
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mtctr r4
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2: dcbi 0,r6
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addi r6,r6,CACHE_LINE_SIZE
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bdnz 2b
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sync
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blr
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/* Get RAM size from QEMU configuration device */
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#define CFG_ADDR 0xf0000510
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#define FW_CFG_RAM_SIZE 0x03
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compute_ramsize:
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LOAD_REG_IMMEDIATE(r9, CFG_ADDR)
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li r0,FW_CFG_RAM_SIZE
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sth r0,0(r9)
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LOAD_REG_IMMEDIATE(r9, CFG_ADDR + 2)
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lbz r1,0(r9)
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lbz r0,0(r9)
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slwi r0,r0,8
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or r1,r1,r0
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lbz r0,0(r9)
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slwi r0,r0,16
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or r1,r1,r0
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lbz r0,0(r9)
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slwi r0,r0,24
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or r3,r1,r0
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blr
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/* Hard reset vector */
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.section .romentry,"ax"
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bl _entry
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