254 lines
8.2 KiB
ArmAsm
254 lines
8.2 KiB
ArmAsm
/*
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* <vectors.S>
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*
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* Sparc V9 Trap Table(s) with SpitFire/Cheetah extensions.
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*
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* Copyright (C) 1996, 2001 David S. Miller (davem@caip.rutgers.edu)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License V2
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* as published by the Free Software Foundation
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*/
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#define __ASSEMBLY
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#include "psr.h"
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#include "asm/asi.h"
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#define SER_ADDR5 0x71100004
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#define SER_ADDR10 0xf1100004
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.section ".text.vectors", "ax"
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.align 4 /* Should be 16384, but alignment is handled by the ldscript */
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/* Sparc32 trap table */
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.globl trap_table, t_zero, t_wovf, t_wunf, __divide_error
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trap_table:
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#define WINDOW_SPILL \
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rd %psr, %l0; rd %wim, %l3; b spill_window_entry; nop;
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#define WINDOW_FILL \
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rd %psr, %l0; rd %wim, %l3; b fill_window_entry; nop;
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#define TRAP_DFAULT(lvl) \
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rd %psr, %l0; rd %wim, %l3; b handle_dfault; mov lvl, %l7;
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#define BTRAP(lvl) ba bug; mov lvl, %g1; nop; nop;
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#define BTRAPS(x) BTRAP(x) BTRAP(x+1) BTRAP(x+2) BTRAP(x+3) BTRAP(x+4) BTRAP(x+5) BTRAP(x+6) BTRAP(x+7)
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#define TRAP_ENTRY_INTERRUPT(int_level) \
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sethi %hi(irq_entry ## int_level), %l7; \
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or %l7, %lo(irq_entry ## int_level), %l7; \
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jmp %l7; \
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nop
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t_zero: b entry; nop; nop; nop;
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BTRAP(0x1) BTRAP(0x2) BTRAP(0x3) BTRAP(0x4)
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t_wovf: WINDOW_SPILL /* Window Overflow */
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t_wunf: WINDOW_FILL /* Window Underflow */
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BTRAP(0x7)
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BTRAP(0x8)
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TRAP_DFAULT(0x9)
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BTRAP(0xa) BTRAP(0xb) BTRAP(0xc) BTRAP(0xd) BTRAP(0xe) BTRAP(0xf)
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#if 0
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BAD_TRAP(0x10)
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t_irq1: TRAP_ENTRY_INTERRUPT(1) /* IRQ Software/SBUS Level 1 */
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t_irq2: TRAP_ENTRY_INTERRUPT(2) /* IRQ SBUS Level 2 */
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t_irq3: TRAP_ENTRY_INTERRUPT(3) /* IRQ SCSI/DMA/SBUS Level 3 */
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t_irq4: TRAP_ENTRY_INTERRUPT(4) /* IRQ Software Level 4 */
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t_irq5: TRAP_ENTRY_INTERRUPT(5) /* IRQ SBUS/Ethernet Level 5 */
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t_irq6: TRAP_ENTRY_INTERRUPT(6) /* IRQ Software Level 6 */
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t_irq7: TRAP_ENTRY_INTERRUPT(7) /* IRQ Video/SBUS Level 5 */
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t_irq8: TRAP_ENTRY_INTERRUPT(8) /* IRQ SBUS Level 6 */
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t_irq9: TRAP_ENTRY_INTERRUPT(9) /* IRQ SBUS Level 7 */
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t_irq10: TRAP_ENTRY_INTERRUPT(10) /* IRQ Timer #1 (one we use) */
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t_irq11: TRAP_ENTRY_INTERRUPT(11) /* IRQ Floppy Intr. */
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t_irq12: TRAP_ENTRY_INTERRUPT(12) /* IRQ Zilog serial chip */
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t_irq13: TRAP_ENTRY_INTERRUPT(13) /* IRQ Audio Intr. */
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t_irq14: TRAP_ENTRY_INTERRUPT(14) /* IRQ Timer #2 */
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t_nmi: BAD_TRAP(0x1f) /* Level 15 (NMI) */
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#else
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BTRAPS(0x10)
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BTRAP(0x18) BTRAP(0x19)
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t_irq10: TRAP_ENTRY_INTERRUPT(10) /* IRQ Timer #1 (one we use) */
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BTRAP(0x1b) BTRAP(0x1c) BTRAP(0x1d)
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t_irq14: TRAP_ENTRY_INTERRUPT(14) /* IRQ Timer #2 */
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BTRAP(0x1f)
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#endif
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BTRAPS(0x20)
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BTRAP(0x28)
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TRAP_DFAULT(0x29)
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BTRAP(0x2a) BTRAP(0x2b) BTRAP(0x2c) BTRAP(0x2d) BTRAP(0x2e) BTRAP(0x2f)
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BTRAPS(0x30) BTRAPS(0x38)
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BTRAPS(0x40) BTRAPS(0x48)
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BTRAPS(0x50) BTRAPS(0x58)
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BTRAPS(0x60) BTRAPS(0x68)
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BTRAPS(0x70) BTRAPS(0x78)
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BTRAPS(0x80) BTRAPS(0x88)
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BTRAPS(0x90) BTRAPS(0x98)
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BTRAPS(0xa0) BTRAPS(0xa8)
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BTRAPS(0xb0) BTRAPS(0xb8)
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BTRAPS(0xc0) BTRAPS(0xc8)
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BTRAPS(0xd0) BTRAPS(0xd8)
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BTRAPS(0xe0) BTRAPS(0xe8)
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BTRAPS(0xf0) BTRAPS(0xf8)
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.section ".text", "ax"
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.align 4
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__divide_error:
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bug:
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/* Dump the exception and its context */
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! Set up CPU state
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rd %psr, %g2
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andn %g2, PSR_ET, %g2
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wr %g2, %psr
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! Disable mmu, re-enable boot mode
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set _start, %g3
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set dump_exception, %g2
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sub %g2, %g3, %g3
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set 3 << 13, %g2
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jmp %g3
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sta %g2, [%g0] ASI_M_MMUREGS
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outstr:
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/* void outstr (unsigned long port5, unsigned long port10,
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* const unsigned char *str);
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* Writes a string on an IO port.
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*/
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1: lduba [%o2] ASI_M_KERNELTXT, %o3
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cmp %o3, 0
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be 2f
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nop
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stba %o3, [%o0] ASI_M_BYPASS
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stba %o3, [%o1] ASI_M_CTL
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b 1b
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inc %o2
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2: retl
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nop
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outhex:
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/* void outhex (unsigned long port5, unsigned long port10,
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* uint32_t value);
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* Dumps a 32 bits hex number on serial port
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*/
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mov %o2, %o4
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set 28, %o3
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srl %o4, %o3, %o2
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1: and %o2, 0xf, %o2
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cmp %o2, 9
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bgt 2f
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nop
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b 3f
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add %o2, '0', %o2
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2: add %o2, 'a' - 10, %o2
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3: stba %o2, [%o0] ASI_M_BYPASS
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stba %o2, [%o1] ASI_M_CTL
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subcc %o3, 4, %o3
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bge 1b
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srl %o4, %o3, %o2
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retl
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nop
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/* void dump_exception ();
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*
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* Dump a message when catching an exception
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*/
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dump_exception:
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set SER_ADDR5 + 2, %o0
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set SER_ADDR10 + 2, %o1
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set (_BUG_message_0), %o2
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call outstr
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nop
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call outhex
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mov %g1, %o2
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set (_BUG_message_1), %o2
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call outstr
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nop
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call outhex
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mov %l1, %o2
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set (_BUG_message_2), %o2
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call outstr
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nop
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call outhex
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mov %l2, %o2
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set (_BUG_message_3), %o2
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call outstr
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nop
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_forever:
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/* Loop forever */
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b _forever ;
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nop
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irq_entry10:
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sethi %hi(counter_regs), %l7
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ld [%l7 + %lo(counter_regs)], %l7
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sethi 0x10000, %l6
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ld [%l7 + %l6], %g0
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jmp %l1
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rett %l2
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irq_entry14:
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sethi %hi(counter_regs), %l7
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ld [%l7 + %lo(counter_regs)], %l7
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ld [%l7], %g0
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sethi %hi(obp_ticks), %l7
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ld [%l7 + %lo(obp_ticks)], %l7
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ld [%l7], %l6
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add %l6, 10, %l6
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st %l6, [%l7]
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jmp %l1
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rett %l2
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/* Register window handlers */
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#include "wof.S"
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#include "wuf.S"
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/* Data fault handler */
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.data
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.align 4
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.global ignore_dfault
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ignore_dfault:
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.word 0
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.text
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.align 4
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handle_dfault:
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/* If ignore_dfault is 0, fall through to normal exception handler */
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sethi %hi(ignore_dfault), %l4
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ld [%l4 + %lo(ignore_dfault)], %l4
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tst %l4
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bz,a bug
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mov %l7, %g1
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/* Otherwise skip the faulting instruction and return */
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jmp %l2
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rett %l2 + 4
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.section .rodata
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_BUG_message_0:
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.string "Unhandled Exception 0x"
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_BUG_message_1:
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.string "\r\nPC = 0x"
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_BUG_message_2:
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.string " NPC = 0x"
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_BUG_message_3:
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.string "\r\nStopping execution\r\n"
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