462 lines
13 KiB
C
462 lines
13 KiB
C
// Video Bios Extensions handlers
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//
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// Copyright (C) 2012 Kevin O'Connor <kevin@koconnor.net>
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// Copyright (C) 2011 Julian Pidancet <julian.pidancet@citrix.com>
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// Copyright (C) 2001-2008 the LGPL VGABios developers Team
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//
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// This file may be distributed under the terms of the GNU LGPLv3 license.
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#include "biosvar.h" // GET_GLOBAL
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#include "bregs.h" // struct bregs
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#include "config.h" // CONFIG_*
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#include "output.h" // dprintf
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#include "std/vbe.h" // struct vbe_info
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#include "string.h" // memset_far
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#include "vgabios.h" // get_current_mode
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#include "vgahw.h" // vgahw_set_mode
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#include "vgautil.h" // handle_104f
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#define VBE_OEM_STRING "SeaBIOS VBE(C) 2011"
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#define VBE_VENDOR_STRING "SeaBIOS Developers"
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#define VBE_PRODUCT_STRING "SeaBIOS VBE Adapter"
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#define VBE_REVISION_STRING "Rev. 1"
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u32 VBE_total_memory VAR16 = 256 * 1024;
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u32 VBE_capabilities VAR16;
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u32 VBE_framebuffer VAR16;
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u16 VBE_win_granularity VAR16;
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u8 VBE_edid[256] VAR16;
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static void
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vbe_104f00(struct bregs *regs)
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{
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u16 seg = regs->es;
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struct vbe_info *info = (void*)(regs->di+0);
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if (GET_FARVAR(seg, info->signature) == VBE2_SIGNATURE) {
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dprintf(4, "Get VBE Controller: VBE2 Signature found\n");
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} else if (GET_FARVAR(seg, info->signature) == VESA_SIGNATURE) {
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dprintf(4, "Get VBE Controller: VESA Signature found\n");
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} else {
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dprintf(4, "Get VBE Controller: Invalid Signature\n");
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}
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memset_far(seg, info, 0, sizeof(*info));
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SET_FARVAR(seg, info->signature, VESA_SIGNATURE);
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SET_FARVAR(seg, info->version, 0x0300);
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SET_FARVAR(seg, info->oem_string,
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SEGOFF(get_global_seg(), (u32)VBE_OEM_STRING));
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SET_FARVAR(seg, info->capabilities, GET_GLOBAL(VBE_capabilities));
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/* We generate our mode list in the reserved field of the info block */
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u16 *destmode = (void*)info->reserved;
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SET_FARVAR(seg, info->video_mode, SEGOFF(seg, (u32)destmode));
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/* Total memory (in 64k blocks) */
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SET_FARVAR(seg, info->total_memory
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, GET_GLOBAL(VBE_total_memory) / (64*1024));
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SET_FARVAR(seg, info->oem_vendor_string,
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SEGOFF(get_global_seg(), (u32)VBE_VENDOR_STRING));
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SET_FARVAR(seg, info->oem_product_string,
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SEGOFF(get_global_seg(), (u32)VBE_PRODUCT_STRING));
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SET_FARVAR(seg, info->oem_revision_string,
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SEGOFF(get_global_seg(), (u32)VBE_REVISION_STRING));
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/* Fill list of modes */
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u16 *last = (void*)&info->reserved[sizeof(info->reserved)];
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vgahw_list_modes(seg, destmode, last - 1);
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regs->ax = 0x004f;
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}
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static void
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vbe_104f01(struct bregs *regs)
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{
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u16 seg = regs->es;
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struct vbe_mode_info *info = (void*)(regs->di+0);
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u16 mode = regs->cx;
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dprintf(1, "VBE mode info request: %x\n", mode);
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struct vgamode_s *vmode_g = vgahw_find_mode(mode & ~MF_VBEFLAGS);
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if (! vmode_g) {
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dprintf(1, "VBE mode %x not found\n", mode);
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regs->ax = 0x014f;
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return;
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}
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memset_far(seg, info, 0, sizeof(*info));
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// Basic information about video controller.
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u32 win_granularity = GET_GLOBAL(VBE_win_granularity);
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SET_FARVAR(seg, info->winA_attributes,
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(win_granularity ? VBE_WINDOW_ATTRIBUTE_RELOCATABLE : 0) |
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VBE_WINDOW_ATTRIBUTE_READABLE |
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VBE_WINDOW_ATTRIBUTE_WRITEABLE);
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SET_FARVAR(seg, info->winB_attributes, 0);
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SET_FARVAR(seg, info->win_granularity, win_granularity);
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SET_FARVAR(seg, info->win_size, 64); /* Bank size 64K */
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SET_FARVAR(seg, info->winA_seg, GET_GLOBAL(vmode_g->sstart));
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SET_FARVAR(seg, info->winB_seg, 0x0);
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extern void entry_104f05(void);
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SET_FARVAR(seg, info->win_func_ptr
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, SEGOFF(get_global_seg(), (u32)entry_104f05));
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// Basic information about mode.
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int width = GET_GLOBAL(vmode_g->width);
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int height = GET_GLOBAL(vmode_g->height);
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int linesize = vgahw_get_linesize(vmode_g);
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SET_FARVAR(seg, info->bytes_per_scanline, linesize);
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SET_FARVAR(seg, info->xres, width);
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SET_FARVAR(seg, info->yres, height);
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SET_FARVAR(seg, info->xcharsize, GET_GLOBAL(vmode_g->cwidth));
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SET_FARVAR(seg, info->ycharsize, GET_GLOBAL(vmode_g->cheight));
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int depth = GET_GLOBAL(vmode_g->depth);
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SET_FARVAR(seg, info->bits_per_pixel, depth);
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u8 memmodel = GET_GLOBAL(vmode_g->memmodel);
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SET_FARVAR(seg, info->mem_model, memmodel);
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SET_FARVAR(seg, info->reserved0, 1);
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// Mode specific info.
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u16 mode_attr = VBE_MODE_ATTRIBUTE_SUPPORTED |
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VBE_MODE_ATTRIBUTE_EXTENDED_INFORMATION_AVAILABLE |
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VBE_MODE_ATTRIBUTE_COLOR_MODE |
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VBE_MODE_ATTRIBUTE_GRAPHICS_MODE |
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VBE_MODE_ATTRIBUTE_NOT_VGA_COMPATIBLE;
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u32 framebuffer = 0;
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int planes = 1, banks = 1;
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u32 pages = GET_GLOBAL(VBE_total_memory) / ALIGN(height * linesize, 64*1024);
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switch (memmodel) {
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case MM_TEXT:
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mode_attr &= ~VBE_MODE_ATTRIBUTE_GRAPHICS_MODE;
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mode_attr |= VBE_MODE_ATTRIBUTE_TTY_BIOS_SUPPORT;
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if (GET_GLOBAL(vmode_g->sstart) == SEG_MTEXT)
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mode_attr &= ~VBE_MODE_ATTRIBUTE_COLOR_MODE;
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pages = 1;
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break;
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case MM_CGA:
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pages = 1;
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banks = 2;
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SET_FARVAR(seg, info->bank_size, 8);
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break;
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case MM_PLANAR:
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planes = 4;
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pages /= 4;
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break;
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default:
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framebuffer = GET_GLOBAL(VBE_framebuffer);
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if (framebuffer)
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mode_attr |= VBE_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER_MODE;
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break;
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}
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if (pages > 128)
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pages = 128;
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if (pages < 2)
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pages++;
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SET_FARVAR(seg, info->mode_attributes, mode_attr);
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SET_FARVAR(seg, info->planes, planes);
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SET_FARVAR(seg, info->pages, pages - 1);
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SET_FARVAR(seg, info->banks, banks);
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// Pixel color breakdown
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u8 r_size, r_pos, g_size, g_pos, b_size, b_pos, a_size, a_pos;
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switch (depth) {
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case 15: r_size = 5; r_pos = 10; g_size = 5; g_pos = 5;
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b_size = 5; b_pos = 0; a_size = 1; a_pos = 15; break;
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case 16: r_size = 5; r_pos = 11; g_size = 6; g_pos = 5;
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b_size = 5; b_pos = 0; a_size = 0; a_pos = 0; break;
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case 24: r_size = 8; r_pos = 16; g_size = 8; g_pos = 8;
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b_size = 8; b_pos = 0; a_size = 0; a_pos = 0; break;
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case 32: r_size = 8; r_pos = 16; g_size = 8; g_pos = 8;
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b_size = 8; b_pos = 0; a_size = 8; a_pos = 24;
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SET_FARVAR(seg, info->directcolor_info,
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VBE_DIRECTCOLOR_RESERVED_BITS_AVAILABLE);
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break;
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default: r_size = 0; r_pos = 0; g_size = 0; g_pos = 0;
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b_size = 0; b_pos = 0; a_size = 0; a_pos = 0; break;
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}
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SET_FARVAR(seg, info->red_size, r_size);
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SET_FARVAR(seg, info->red_pos, r_pos);
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SET_FARVAR(seg, info->green_size, g_size);
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SET_FARVAR(seg, info->green_pos, g_pos);
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SET_FARVAR(seg, info->blue_size, b_size);
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SET_FARVAR(seg, info->blue_pos, b_pos);
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SET_FARVAR(seg, info->alpha_size, a_size);
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SET_FARVAR(seg, info->alpha_pos, a_pos);
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// Linear framebuffer info.
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if (framebuffer) {
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SET_FARVAR(seg, info->phys_base, framebuffer);
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SET_FARVAR(seg, info->reserved1, 0);
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SET_FARVAR(seg, info->reserved2, 0);
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SET_FARVAR(seg, info->linear_bytes_per_scanline, linesize);
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SET_FARVAR(seg, info->linear_pages, 0);
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SET_FARVAR(seg, info->linear_red_size, r_size);
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SET_FARVAR(seg, info->linear_red_pos, r_pos);
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SET_FARVAR(seg, info->linear_green_size, g_size);
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SET_FARVAR(seg, info->linear_green_pos, g_pos);
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SET_FARVAR(seg, info->linear_blue_size, b_size);
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SET_FARVAR(seg, info->linear_blue_pos, b_pos);
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SET_FARVAR(seg, info->linear_alpha_size, a_size);
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SET_FARVAR(seg, info->linear_alpha_pos, a_pos);
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}
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regs->ax = 0x004f;
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}
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static void
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vbe_104f02(struct bregs *regs)
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{
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dprintf(1, "VBE mode set: %x\n", regs->bx);
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int mode = regs->bx & ~MF_VBEFLAGS;
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int flags = regs->bx & MF_VBEFLAGS;
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int ret = vga_set_mode(mode, flags);
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regs->ah = ret;
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regs->al = 0x4f;
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}
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static void
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vbe_104f03(struct bregs *regs)
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{
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regs->bx = GET_BDA_EXT(vbe_mode);
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dprintf(1, "VBE current mode=%x\n", regs->bx);
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regs->ax = 0x004f;
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}
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static void
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vbe_104f04(struct bregs *regs)
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{
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u16 seg = regs->es;
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void *data = (void*)(regs->bx+0);
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u16 states = regs->cx;
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u8 cmd = regs->dl;
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if (states & ~0x0f || cmd > 2)
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goto fail;
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int ret = vgahw_save_restore(states | (cmd<<8), seg, data);
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if (ret < 0)
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goto fail;
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if (cmd == 0)
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regs->bx = ret / 64;
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regs->ax = 0x004f;
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return;
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fail:
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regs->ax = 0x014f;
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}
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void VISIBLE16
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vbe_104f05(struct bregs *regs)
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{
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if (regs->bh > 1 || regs->bl > 1)
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goto fail;
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if (GET_BDA_EXT(vbe_mode) & MF_LINEARFB) {
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regs->ah = VBE_RETURN_STATUS_INVALID;
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return;
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}
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struct vgamode_s *vmode_g = get_current_mode();
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if (! vmode_g)
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goto fail;
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if (regs->bh) {
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int ret = vgahw_get_window(vmode_g, regs->bl);
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if (ret < 0)
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goto fail;
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regs->dx = ret;
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regs->ax = 0x004f;
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return;
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}
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int ret = vgahw_set_window(vmode_g, regs->bl, regs->dx);
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if (ret)
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goto fail;
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regs->ax = 0x004f;
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return;
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fail:
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regs->ax = 0x014f;
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}
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static void
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vbe_104f06(struct bregs *regs)
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{
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if (regs->bl > 0x02)
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goto fail;
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struct vgamode_s *vmode_g = get_current_mode();
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if (! vmode_g)
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goto fail;
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int bpp = vga_bpp(vmode_g);
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if (regs->bl == 0x00) {
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int ret = vgahw_set_linelength(vmode_g, DIV_ROUND_UP(regs->cx * bpp, 8));
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if (ret)
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goto fail;
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} else if (regs->bl == 0x02) {
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int ret = vgahw_set_linelength(vmode_g, regs->cx);
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if (ret)
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goto fail;
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}
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int linelength = vgahw_get_linelength(vmode_g);
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if (linelength < 0)
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goto fail;
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regs->bx = linelength;
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regs->cx = (linelength * 8) / bpp;
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regs->dx = GET_GLOBAL(VBE_total_memory) / linelength;
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regs->ax = 0x004f;
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return;
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fail:
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regs->ax = 0x014f;
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}
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static void
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vbe_104f07(struct bregs *regs)
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{
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struct vgamode_s *vmode_g = get_current_mode();
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if (! vmode_g)
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goto fail;
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int bpp = vga_bpp(vmode_g);
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int linelength = vgahw_get_linelength(vmode_g);
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if (linelength < 0)
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goto fail;
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int ret;
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switch (regs->bl) {
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case 0x80:
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case 0x00:
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ret = vgahw_set_displaystart(
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vmode_g, DIV_ROUND_UP(regs->cx * bpp, 8) + linelength * regs->dx);
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if (ret)
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goto fail;
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break;
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case 0x01:
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ret = vgahw_get_displaystart(vmode_g);
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if (ret < 0)
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goto fail;
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regs->dx = ret / linelength;
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regs->cx = (ret % linelength) * 8 / bpp;
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break;
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default:
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goto fail;
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}
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regs->ax = 0x004f;
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return;
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fail:
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regs->ax = 0x014f;
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}
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static void
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vbe_104f08(struct bregs *regs)
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{
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struct vgamode_s *vmode_g = get_current_mode();
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if (! vmode_g)
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goto fail;
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u8 memmodel = GET_GLOBAL(vmode_g->memmodel);
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if (memmodel == MM_DIRECT || memmodel == MM_YUV) {
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regs->ax = 0x034f;
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return;
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}
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if (regs->bl > 1)
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goto fail;
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if (regs->bl == 0) {
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int ret = vgahw_set_dacformat(vmode_g, regs->bh);
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if (ret < 0)
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goto fail;
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}
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int ret = vgahw_get_dacformat(vmode_g);
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if (ret < 0)
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goto fail;
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regs->bh = ret;
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regs->ax = 0x004f;
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return;
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fail:
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regs->ax = 0x014f;
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}
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static void
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vbe_104f0a(struct bregs *regs)
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{
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debug_stub(regs);
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regs->ax = 0x0100;
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}
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static void
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vbe_104f10(struct bregs *regs)
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{
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switch (regs->bl) {
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case 0x00:
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regs->bx = 0x0f30;
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break;
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case 0x01:
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MASK_BDA_EXT(flags, BF_PM_MASK, regs->bh & BF_PM_MASK);
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break;
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case 0x02:
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regs->bh = GET_BDA_EXT(flags) & BF_PM_MASK;
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break;
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default:
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regs->ax = 0x014f;
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return;
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}
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regs->ax = 0x004f;
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}
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static void
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vbe_104f15(struct bregs *regs)
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{
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int offset;
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switch (regs->bl) {
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case 0x00:
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if (GET_GLOBAL(VBE_edid[0]) != 0x00 ||
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GET_GLOBAL(VBE_edid[1]) != 0xff)
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goto err;
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regs->bx = 0x0103;
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break;
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case 0x01:
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offset = regs->dx * 128;
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if (offset >= sizeof(VBE_edid))
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goto err;
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memcpy_far(regs->es, (void*)(regs->di+0),
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get_global_seg(), VBE_edid + offset,
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128);
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break;
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err:
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default:
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regs->ax = 0x014f;
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return;
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}
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regs->ax = 0x004f;
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}
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static void
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vbe_104fXX(struct bregs *regs)
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{
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debug_stub(regs);
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regs->ax = 0x0100;
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}
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void noinline
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handle_104f(struct bregs *regs)
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{
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if (!CONFIG_VGA_VBE) {
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vbe_104fXX(regs);
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return;
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}
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switch (regs->al) {
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case 0x00: vbe_104f00(regs); break;
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case 0x01: vbe_104f01(regs); break;
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case 0x02: vbe_104f02(regs); break;
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case 0x03: vbe_104f03(regs); break;
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case 0x04: vbe_104f04(regs); break;
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case 0x05: vbe_104f05(regs); break;
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case 0x06: vbe_104f06(regs); break;
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case 0x07: vbe_104f07(regs); break;
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case 0x08: vbe_104f08(regs); break;
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case 0x0a: vbe_104f0a(regs); break;
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case 0x10: vbe_104f10(regs); break;
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case 0x15: vbe_104f15(regs); break;
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default: vbe_104fXX(regs); break;
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}
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}
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