68 lines
1.9 KiB
ReStructuredText
68 lines
1.9 KiB
ReStructuredText
.. _OPAL_REINIT_CPUS:
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OPAL_REINIT_CPUS
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================
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.. code-block:: c
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#define OPAL_REINIT_CPUS 70
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static int64_t opal_reinit_cpus(uint64_t flags);
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This OPAL call reinitializes some bit of CPU state across *ALL* CPUs.
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Consequently, all CPUs must be in OPAL for this call to succeed (either
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at boot time or after OPAL_RETURN_CPU is called).
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Arguments
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---------
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Currently, possible flags are:
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.. code-block:: c
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enum {
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OPAL_REINIT_CPUS_HILE_BE = (1 << 0),
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OPAL_REINIT_CPUS_HILE_LE = (1 << 1),
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OPAL_REINIT_CPUS_MMU_HASH = (1 << 2),
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OPAL_REINIT_CPUS_MMU_RADIX = (1 << 3),
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OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED = (1 << 4),
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};
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Extra flags may be added in the future, so other bits *must* be 0.
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On POWER7 CPUs, only OPAL_REINIT_CPUS_HILE_BE is supported. All other
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flags will return OPAL_UNSUPPORTED.
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On POWER8 CPUs, only OPAL_REINIT_CPUS_HILE_BE and OPAL_REINIT_CPUS_HILE_LE
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are support and other bits *MUST NOT* be set.
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On POWER9 CPUs, all options including OPAL_REINIT_CPUS_MMU_HASH and
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OPAL_REINIT_CPUS_MMU_RADIX.
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OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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This flag requests that CPUs be configured with TM (Transactional Memory)
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suspend mode disabled. This may only be supported on some CPU versions.
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OPAL_REINIT_CPUS_MMU_HASH and OPAL_REINIT_CPUS_MMU_RADIX
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Some processors may need to change a processor specific register in order to
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support Hash or Radix translation.
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For POWER9 CPUs, this is bit 8 of the HID register (see the POWER9 User Manual
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for details). On POWER9 CPUS, when in Hash mode, the full TLB is available to
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the host OS rather than when in radix mode, half the TLB is taken for a Page
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Walk Cache (PWC).
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Future CPUs may or may not do anything with these flags, but a host OS must
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use them to ensure compatibility in the future.
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Returns
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-------
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:ref:`OPAL_SUCCESS`
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Success!
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:ref:`OPAL_UNSUPPORTED`
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Processor does not suport reinit flags.
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