221 lines
4.9 KiB
Text
221 lines
4.9 KiB
Text
/dts-v1/;
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/ {
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compatible = "ibm,powernv";
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model = "BML";
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#size-cells = <0x2>;
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#address-cells = <0x2>;
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chosen {
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linux,pci-assign-all-buses = <0x1>;
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linux,pci-probe-only = <0x0>;
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linux,platform = <0x100>;
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ibm,architecture-vec-5 = <0x0 0x800000>;
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linux,initrd-start = <0x0 0x28000000>;
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linux,initrd-end = <0x0 0x30000000>;
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};
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memory@0 {
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reg = <0x0 0x0 0x0 0x80000000>;
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ibm,chip-id = <0x0>;
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device_type = "memory";
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};
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cpus {
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#size-cells = <0x0>;
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#address-cells = <0x1>;
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PowerPC,POWER9@0 {
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device_type = "cpu";
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status = "okay";
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ibm,chip-id = <0x0>;
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ibm,pir = <0x0>;
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timebase-frequency = <0x1c4fecc0>;
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clock-frequency = <0xe27f6600>;
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ibm,segment-page-sizes = <0xc 0x0 0x1 0xc 0x0 0x10 0x110 0x1 0x10 0x1 0x14 0x111 0x1 0x14 0x2 0x18 0x100 0x1 0x18 0x0 0x22 0x120 0x1 0x22 0x3>;
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ibm,processor-segment-sizes = <0x1c 0xffffffff 0xffffffff 0xffffffff>;
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ibm,pa-features = <0x600f63f 0xc70080c0>;
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i-cache-size = <0x8000>;
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d-cache-size = <0x8000>;
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i-cache-line-size = <0x80>;
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d-cache-line-size = <0x80>;
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ibm,slb-size = <0x20>;
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ibm,vmx = <0x2>;
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reg = <0x0>;
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ibm,ppc-interrupt-server#s = <0x0>;
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};
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};
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xscom@603fc00000000 {
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compatible = "ibm,xscom", "ibm,power9-xscom";
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ibm,chip-id = <0x0>;
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#size-cells = <0x1>;
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#address-cells = <0x1>;
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reg = <0x603fc 0x0 0x8 0x0>;
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/* PE#0 supports only one stack */
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pbcq@4010c00 {
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ibm,pec-index = <0x0>;
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reg = <0x4010c00 0x100 0xd010800 0x200>;
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compatible = "ibm,power9-pbcq";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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stack@0 {
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/* Stack number */
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reg = <0x0>;
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/* Chip-scope PHB index */
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ibm,phb-index = <0x0>;
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compatible = "ibm,power9-phb-stack";
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status = "okay";
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};
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};
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/* PE#1 supports two stacks */
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pbcq@4011000 {
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ibm,pec-index = <0x1>;
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reg = <0x4011000 0x100 0xe010800 0x200>;
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compatible = "ibm,power9-pbcq";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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stack@0 {
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reg = <0x0>;
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ibm,phb-index = <0x1>;
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compatible = "ibm,power9-phb-stack";
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status = "okay";
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};
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stack@1 {
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reg = <0x1>;
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ibm,phb-index = <0x2>;
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compatible = "ibm,power9-phb-stack";
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status = "okay";
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};
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};
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/* PE#2 supports three stacks */
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pbcq@4011400 {
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ibm,pec-index = <0x2>;
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reg = <0x4011400 0x100 0xf010800 0x200>;
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compatible = "ibm,power9-pbcq";
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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stack@0 {
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reg = <0x0>;
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ibm,phb-index = <0x3>;
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compatible = "ibm,power9-phb-stack";
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status = "disabled";
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};
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stack@1 {
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reg = <0x1>;
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ibm,phb-index = <0x4>;
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compatible = "ibm,power9-phb-stack";
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status = "disabled";
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};
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stack@2 {
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reg = <0x2>;
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ibm,phb-index = <0x5>;
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compatible = "ibm,power9-phb-stack";
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status = "disabled";
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};
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};
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chiptod@40000 {
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primary;
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reg = <0x40000 0x34>;
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compatible = "ibm,power-chiptod", "ibm,power9-chiptod";
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};
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xive@5013400 {
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reg = <0x5013000 0x300>;
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compatible = "ibm,power9-xive-x";
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};
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PSI_X0: psihb@5012900 {
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reg = <0x5012900 0x100>;
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compatible = "ibm,power9-psihb-x", "ibm,psihb-x";
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/*
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* This acts as an interrupt remapper for the 16
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* interrupts coming into the PSI HB.
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* OPAL will generate the corresponding interrupt-map
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* property with the final XIVE numbers
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*/
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#interrupt-cells = <0x1>;
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#address-cells = <0x0>;
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#interrupt-map-mask = <0xff>;
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};
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nx@2010000 {
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reg = <0x2010000 0x4000>;
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compatible = "ibm,power9-nx";
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};
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};
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lpcm-opb@6030000000000 {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "ibm,power9-lpcm-opb", "simple-bus";
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ibm,chip-id = <0x0>;
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ranges = <0x00000000 0x60300 0x00000000 0x80000000
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0x80000000 0x60300 0x80000000 0x80000000>;
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opb-master@c0010000 {
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compatible = "ibm,power9-lpcm-opb-master";
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reg = <0xc0010000 0x60>;
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};
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opb-arbiter@c0011000 {
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compatible = "ibm,power9-lpcm-opb-arbiter";
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reg = <0xc0011000 0x8>;
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};
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lpc-controller@c0012000 {
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compatible = "ibm,power9-lpc-controller";
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reg = <0xc0012000 0x100>;
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};
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lpc@f0000000 {
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compatible = "ibm,power9-lpc";
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#address-cells = <0x2>;
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#size-cells = <0x1>;
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ranges = <0x3 0x0 0xf0000000 0x10000000 /* FW space */
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0x0 0x0 0xe0000000 0x10000000 /* MEM space */
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0x1 0x0 0xd0010000 0x00010000 /* IO space */ >;
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/*
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* We currently only support level interrupts on the LPC,
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* we use 1 cell.
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*/
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#interrupt-cells = <0x1>;
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/*
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* Route the LPC interrupts to one of the 4 supported
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* PSI interrupt inputs [7...10].
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*/
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interrupt-map = <0x0 0x0 0x4 &PSI_X0 0x8
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0x0 0x0 0xa &PSI_X0 0x9>;
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interrupt-map-mask = <0x0 0x0 0xff>;
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/* Devices on the LPC bus go here */
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serial@i3f8 {
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compatible = "ns16550";
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reg = <0x1 0x3f8 0x10>;
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current-speed = <0x1c200>;
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clock-frequency = <0x1c2000>;
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interrupts = <0x4>;
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};
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ipmi@ie4 {
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compatible = "ipmi-bt";
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reg = <0x1 0xe4 0x3>;
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interrupts = <0x10>;
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};
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};
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};
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};
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