303 lines
10 KiB
Text
303 lines
10 KiB
Text
Motorola MPC8540ADS and MPC8560ADS board
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Created 10/15/03 Xianghua Xiao
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Updated 13-July-2004 Jon Loeliger
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-----------------------------------------
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0. Toolchain
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The Binutils in current ELDK toolchain will not support MPC85xx
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chip. You need to use binutils-2.14.tar.bz2 (or newer) from
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http://ftp.gnu.org/gnu/binutils.
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The 8540/8560 ADS code base is known to compile using:
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gcc (GCC) 3.2.2 20030217 (Yellow Dog Linux 3.0 3.2.2-2a)
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1. SWITCH SETTINGS & JUMPERS
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1.0 Nomenclature
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For some reason, the HW designers describe the switch settings
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in terms of 0 and 1, and then map that to physical switches where
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the label "On" refers to logic 0 and "Off" (unlabeled) is logic 1.
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Luckily, we're SW types and virtual settings are handled daily.
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The switches for the Rev A board are numbered differently than
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for the Pilot board. Oh yeah.
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Switch bits are numbered 1 through, like, 4 6 8 or 10, but the
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bits may contribute to signals that are numbered based at 0,
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and some of those signals may be high-bit-number-0 too. Heed
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well the names and labels and do not get confused.
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"Off" == 1
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"On" == 0
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SW18 is switch 18 as silk-screened onto the board.
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SW4[8] is the bit labled 8 on Switch 4.
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SW2[1:6] refers to bits labeled 1 through 6 in order on switch 2
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SW3[7:1] refers to bits labeled 7 through 1 in order on switch 3
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1.1 For the MPC85xxADS Pilot Board
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First, make sure the board default setting is consistent with the document
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shipped with your board. Then apply the following changes:
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SW3[1-6]="all OFF" (boot from 32bit flash, no boot sequence is used)
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SW10[2-6]="all OFF" (turn on CPM SCC for serial port,works for 8540/8560)
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SW11[2]='OFF for 8560, ON for 8540' (toggle 8540.8560 mode)
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SW11[7]='ON' (rev2), 'OFF' (rev1)
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SW4[7-8]="OFF OFF" (enable serial ports,I'm using the top serial connector)
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SW22[1-4]="OFF OFF ON OFF"
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SW5[1-10[="ON ON OFF OFF OFF OFF OFF OFF OFF OFF"
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J1 = "Enable Prog" (Make sure your flash is programmable for development)
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If you want to test PCI functionality with a 33Mhz PCI card, you will
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have to change the system clock from the default 66Mhz to 33Mhz by
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setting SW15[1]="OFF" and SW17[8]="OFF". After that you may also need
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double your platform clock(SW6) because the system clock is now only
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half of its original value. For example, if at 66MHz your system
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clock showed SW6[0:1] = 01, then at 33MHz SW6[0:1] it should be 10.
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SW17[8] ------+ SW6
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SW15[1] ----+ | [0:1]
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V V V V
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33MHz 1 1 1 0
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66MHz 0 0 0 1
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Hmmm... That SW6 setting description is incomplete but it works.
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1.3 For the MPC85xxADS Rev A Board
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As shipped, the board should be a 33MHz PCI bus with a CPU Clock
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rate of 825 +/- fuzz:
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Clocks: CPU: 825 MHz, CCB: 330 MHz, DDR: 165 MHz, LBC: 82 MHz
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For 33MHz PCI, the switch settings should be like this:
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SW18[7:1] = 0100001 = M==33 => 33MHz
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SW18[8] = 1 => PWD Divider == 16
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SW16[1:2] = 11 => N == 16 as PWD==1
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Use the magical formula:
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Fout (MHz) = 16 * M / N = 16 * 33 / 16 = 33 MHz
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SW7[1:4] = 1010 = 10 => 10 x 33 = 330 CCB Sysclk
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SW7[5:6] = 01 => 5:2 x 330 = 825 Core clock
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For 66MHz PCI, the switch settings should be like this:
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SW18[7:1] = 0100001 = M==33 => 33MHz
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SW18[8] = 0 => PWD Divider == 1
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SW16[1:2] = 01 => N == 8 as PWD == 0
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Use the magical formula:
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Fout (MHz) = 16 * M / N = 16 * 33 / 8 = 66 MHz
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SW7[1:4] = 0101 = 5 => 5 x 66 = 330 CCB Sysclk
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SW7[5:6] = 01 => 5:2 x 330 = 825 Core clock
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In order to use PCI-X (only in the first PCI slot. The one with
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the RIO connector), you need to set SW1[4] (config) to 1 (off).
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Also, configure the board to run PCI at 66 MHz.
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2. MEMORY MAP TO WORK WITH LINUX KERNEL
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2.1. For the initial bringup, we adopted a consistent memory scheme
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between u-boot and linux kernel, you can customize it based on your
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system requirements:
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0x0000_0000 0x7fff_ffff DDR 2G
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0x8000_0000 0x9fff_ffff PCI MEM 512M
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0xc000_0000 0xdfff_ffff Rapid IO 512M
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0xe000_0000 0xe00f_ffff CCSR 1M
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0xe200_0000 0xe2ff_ffff PCI IO 16M
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0xf000_0000 0xf7ff_ffff SDRAM 128M
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0xf800_0000 0xf80f_ffff BCSR 1M
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0xff00_0000 0xffff_ffff FLASH (boot bank) 16M
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2.2 We are submitting Linux kernel patches for MPC8540 and MPC8560. You
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can download them from linuxppc-2.4 public source. Please make sure the
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kernel's ppcboot.h is consistent with U-Boot's u-boot.h. You can use two
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default configuration files as your starting points to configure the
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kernel:
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arch/powerpc/configs/mpc8540_ads_defconfig
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arch/powerpc/configs/mpc8560_ads_defconfig
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3. DEFINITIONS AND COMPILATION
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3.1 Explanation on NEW definitions in:
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include/configs/MPC8540ADS.h
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include/configs/MPC8560ADS.h
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CONFIG_BOOKE BOOKE(e.g. Motorola MPC85xx, AMCC 440, etc)
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CONFIG_E500 BOOKE e500 family(Motorola)
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CONFIG_MPC85xx MPC8540,MPC8560 and their derivatives
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CONFIG_MPC8540 MPC8540 specific
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CONFIG_MPC8540ADS MPC8540ADS board specific
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CONFIG_MPC8560ADS MPC8560ADS board specific
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CONFIG_TSEC_ENET Use on-chip 10/100/1000 ethernet for networking
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CONFIG_SPD_EEPROM Use SPD EEPROM for DDR auto configuration, you can
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also manual config the DDR after undef this
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definition.
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CONFIG_DDR_ECC only for ECC DDR module
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CONFIG_DDR_DLL DLL fix on some ADS boards needed for more
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stability.
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CONFIG_HAS_FEC If an FEC is on chip, set to 1, else 0.
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Other than the above definitions, the rest in the config files are
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straightforward.
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3.2 Compilation
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Assuming you're using BASH shell:
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export CROSS_COMPILE=your-cross-compile-prefix
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cd u-boot
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make distclean
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make MPC8560ADS_config (or make MPC8540ADS_config)
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make
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4. Notes:
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4.1 When connecting with kermit, the following commands must be present.in
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your .kermrc file. These are especially important when booting as
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MPC8560, as the serial console will not work without them:
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set speed 115200
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set carrier-watch off
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set handshake none
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set flow-control none
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robust
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4.2 Sometimes after U-Boot is up, the 'tftp' won't work well with TSEC
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ethernet. If that happens, you can try the following steps to make
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network work:
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MPC8560ADS>tftp 1000000 pImage
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(if it hangs, use Ctrl-C to quit)
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MPC8560ADS>nm fdf24524
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>0
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>1
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>. (to quit this memory operation)
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MPC8560ADS>tftp 1000000 pImage
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4.3 If you're one of the early developers using the Rev1 8540/8560 chips,
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please use U-Boot 1.0.0, as the newer silicon will only support Rev2
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and future revisions of 8540/8560.
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4.4 Reflash U-boot Image using U-boot
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tftp 10000 u-boot.bin
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protect off fff80000 ffffffff
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erase fff80000 ffffffff
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cp.b 10000 fff80000 80000
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4.5 Reflash U-Boot with a BDI-2000
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BDI> erase 0xFFF80000 0x4000 0x20
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BDI> prog 0xfff80000 u-boot.bin.8560ads
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BDI> verify
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5. Screen dump MPC8540ADS board
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U-Boot 1.1.2(pq3-20040707-0) (Jul 6 2004 - 17:34:25)
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Freescale PowerPC
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Core: E500, Version: 2.0, (0x80200020)
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System: 8540, Version: 2.0, (0x80300020)
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Clocks: CPU: 825 MHz, CCB: 330 MHz, DDR: 165 MHz, LBC: 82 MHz
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L1 D-cache 32KB, L1 I-cache 32KB enabled.
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Board: ADS
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PCI1: 32 bit, 66 MHz (compiled)
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I2C: ready
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DRAM: Initializing
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SDRAM: 64 MB
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DDR: 256 MB
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FLASH: 16 MB
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L2 cache enabled: 256KB
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*** Warning - bad CRC, using default environment
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In: serial
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Out: serial
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Err: serial
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Net: MOTO ENET0: PHY is Marvell 88E1011S (1410c62)
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MOTO ENET1: PHY is Marvell 88E1011S (1410c62)
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MOTO ENET2: PHY is Davicom DM9161E (181b881)
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MOTO ENET0, MOTO ENET1, MOTO ENET2
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Hit any key to stop autoboot: 0
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=>
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=> fli
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Bank # 1: Intel 28F640J3A (64 Mbit, 64 x 128K)
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Size: 16 MB in 64 Sectors
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Sector Start Addresses:
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FF000000 FF040000 FF080000 FF0C0000 FF100000
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FF140000 FF180000 FF1C0000 FF200000 FF240000
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FF280000 FF2C0000 FF300000 FF340000 FF380000
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FF3C0000 FF400000 FF440000 FF480000 FF4C0000
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FF500000 FF540000 FF580000 FF5C0000 FF600000
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FF640000 FF680000 FF6C0000 FF700000 FF740000
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FF780000 FF7C0000 FF800000 FF840000 FF880000
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FF8C0000 FF900000 FF940000 FF980000 FF9C0000
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FFA00000 FFA40000 FFA80000 FFAC0000 FFB00000
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FFB40000 FFB80000 FFBC0000 FFC00000 FFC40000
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FFC80000 FFCC0000 FFD00000 FFD40000 FFD80000
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FFDC0000 FFE00000 FFE40000 FFE80000 FFEC0000
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FFF00000 FFF40000 FFF80000 (RO) FFFC0000 (RO)
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=> bdinfo
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memstart = 0x00000000
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memsize = 0x10000000
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flashstart = 0xFF000000
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flashsize = 0x01000000
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flashoffset = 0x00000000
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sramstart = 0x00000000
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sramsize = 0x00000000
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immr_base = 0xE0000000
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bootflags = 0xE4013F80
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intfreq = 825 MHz
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busfreq = 330 MHz
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ethaddr = 00:E0:0C:00:00:FD
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eth1addr = 00:E0:0C:00:01:FD
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eth2addr = 00:E0:0C:00:02:FD
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IP addr = 192.168.1.253
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baudrate = 115200 bps
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=> printenv
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bootcmd=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;bootm $loadaddr
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ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;bootm $loadaddr $ramdiskaddr
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nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;bootm $loadaddr
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bootdelay=10
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baudrate=115200
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loads_echo=1
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ethaddr=00:E0:0C:00:00:FD
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eth1addr=00:E0:0C:00:01:FD
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eth2addr=00:E0:0C:00:02:FD
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ipaddr=192.168.1.253
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serverip=192.168.1.1
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rootpath=/nfsroot
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gatewayip=192.168.1.1
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netmask=255.255.255.0
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hostname=unknown
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bootfile=your.uImage
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loadaddr=200000
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netdev=eth0
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consoledev=ttyS0
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ramdiskaddr=400000
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ramdiskfile=your.ramdisk.u-boot
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stdin=serial
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stdout=serial
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stderr=serial
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ethact=MOTO ENET0
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Environment size: 1020/8188 bytes
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