473 lines
17 KiB
C
473 lines
17 KiB
C
/*
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* QEMU TCG support -- s390x vector string instruction support
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*
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* Copyright (C) 2019 Red Hat Inc
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*
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* Authors:
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* David Hildenbrand <david@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "internal.h"
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#include "vec.h"
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#include "tcg/tcg.h"
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#include "tcg/tcg-gvec-desc.h"
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#include "exec/helper-proto.h"
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/*
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* Returns a bit set in the MSB of each element that is zero,
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* as defined by the mask.
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*/
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static inline uint64_t zero_search(uint64_t a, uint64_t mask)
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{
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return ~(((a & mask) + mask) | a | mask);
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}
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/*
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* Returns a bit set in the MSB of each element that is not zero,
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* as defined by the mask.
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*/
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static inline uint64_t nonzero_search(uint64_t a, uint64_t mask)
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{
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return (((a & mask) + mask) | a) & ~mask;
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}
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/*
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* Returns the byte offset for the first match, or 16 for no match.
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*/
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static inline int match_index(uint64_t c0, uint64_t c1)
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{
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return (c0 ? clz64(c0) : clz64(c1) + 64) >> 3;
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}
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/*
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* Returns the number of bits composing one element.
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*/
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static uint8_t get_element_bits(uint8_t es)
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{
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return (1 << es) * BITS_PER_BYTE;
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}
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/*
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* Returns the bitmask for a single element.
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*/
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static uint64_t get_single_element_mask(uint8_t es)
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{
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return -1ull >> (64 - get_element_bits(es));
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}
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/*
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* Returns the bitmask for a single element (excluding the MSB).
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*/
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static uint64_t get_single_element_lsbs_mask(uint8_t es)
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{
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return -1ull >> (65 - get_element_bits(es));
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}
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/*
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* Returns the bitmasks for multiple elements (excluding the MSBs).
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*/
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static uint64_t get_element_lsbs_mask(uint8_t es)
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{
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return dup_const(es, get_single_element_lsbs_mask(es));
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}
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static int vfae(void *v1, const void *v2, const void *v3, bool in,
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bool rt, bool zs, uint8_t es)
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{
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const uint64_t mask = get_element_lsbs_mask(es);
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const int bits = get_element_bits(es);
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uint64_t a0, a1, b0, b1, e0, e1, t0, t1, z0, z1;
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uint64_t first_zero = 16;
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uint64_t first_equal;
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int i;
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a0 = s390_vec_read_element64(v2, 0);
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a1 = s390_vec_read_element64(v2, 1);
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b0 = s390_vec_read_element64(v3, 0);
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b1 = s390_vec_read_element64(v3, 1);
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e0 = 0;
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e1 = 0;
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/* compare against equality with every other element */
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for (i = 0; i < 64; i += bits) {
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t0 = rol64(b0, i);
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t1 = rol64(b1, i);
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e0 |= zero_search(a0 ^ t0, mask);
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e0 |= zero_search(a0 ^ t1, mask);
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e1 |= zero_search(a1 ^ t0, mask);
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e1 |= zero_search(a1 ^ t1, mask);
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}
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/* invert the result if requested - invert only the MSBs */
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if (in) {
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e0 = ~e0 & ~mask;
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e1 = ~e1 & ~mask;
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}
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first_equal = match_index(e0, e1);
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if (zs) {
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z0 = zero_search(a0, mask);
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z1 = zero_search(a1, mask);
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first_zero = match_index(z0, z1);
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}
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if (rt) {
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e0 = (e0 >> (bits - 1)) * get_single_element_mask(es);
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e1 = (e1 >> (bits - 1)) * get_single_element_mask(es);
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s390_vec_write_element64(v1, 0, e0);
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s390_vec_write_element64(v1, 1, e1);
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} else {
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s390_vec_write_element64(v1, 0, MIN(first_equal, first_zero));
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s390_vec_write_element64(v1, 1, 0);
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}
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if (first_zero == 16 && first_equal == 16) {
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return 3; /* no match */
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} else if (first_zero == 16) {
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return 1; /* matching elements, no match for zero */
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} else if (first_equal < first_zero) {
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return 2; /* matching elements before match for zero */
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}
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return 0; /* match for zero */
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}
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#define DEF_VFAE_HELPER(BITS) \
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void HELPER(gvec_vfae##BITS)(void *v1, const void *v2, const void *v3, \
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uint32_t desc) \
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{ \
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const bool in = extract32(simd_data(desc), 3, 1); \
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const bool rt = extract32(simd_data(desc), 2, 1); \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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vfae(v1, v2, v3, in, rt, zs, MO_##BITS); \
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}
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DEF_VFAE_HELPER(8)
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DEF_VFAE_HELPER(16)
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DEF_VFAE_HELPER(32)
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#define DEF_VFAE_CC_HELPER(BITS) \
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void HELPER(gvec_vfae_cc##BITS)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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{ \
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const bool in = extract32(simd_data(desc), 3, 1); \
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const bool rt = extract32(simd_data(desc), 2, 1); \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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env->cc_op = vfae(v1, v2, v3, in, rt, zs, MO_##BITS); \
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}
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DEF_VFAE_CC_HELPER(8)
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DEF_VFAE_CC_HELPER(16)
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DEF_VFAE_CC_HELPER(32)
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static int vfee(void *v1, const void *v2, const void *v3, bool zs, uint8_t es)
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{
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const uint64_t mask = get_element_lsbs_mask(es);
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uint64_t a0, a1, b0, b1, e0, e1, z0, z1;
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uint64_t first_zero = 16;
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uint64_t first_equal;
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a0 = s390_vec_read_element64(v2, 0);
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a1 = s390_vec_read_element64(v2, 1);
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b0 = s390_vec_read_element64(v3, 0);
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b1 = s390_vec_read_element64(v3, 1);
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e0 = zero_search(a0 ^ b0, mask);
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e1 = zero_search(a1 ^ b1, mask);
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first_equal = match_index(e0, e1);
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if (zs) {
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z0 = zero_search(a0, mask);
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z1 = zero_search(a1, mask);
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first_zero = match_index(z0, z1);
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}
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s390_vec_write_element64(v1, 0, MIN(first_equal, first_zero));
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s390_vec_write_element64(v1, 1, 0);
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if (first_zero == 16 && first_equal == 16) {
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return 3; /* no match */
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} else if (first_zero == 16) {
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return 1; /* matching elements, no match for zero */
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} else if (first_equal < first_zero) {
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return 2; /* matching elements before match for zero */
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}
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return 0; /* match for zero */
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}
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#define DEF_VFEE_HELPER(BITS) \
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void HELPER(gvec_vfee##BITS)(void *v1, const void *v2, const void *v3, \
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uint32_t desc) \
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{ \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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vfee(v1, v2, v3, zs, MO_##BITS); \
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}
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DEF_VFEE_HELPER(8)
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DEF_VFEE_HELPER(16)
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DEF_VFEE_HELPER(32)
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#define DEF_VFEE_CC_HELPER(BITS) \
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void HELPER(gvec_vfee_cc##BITS)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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{ \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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env->cc_op = vfee(v1, v2, v3, zs, MO_##BITS); \
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}
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DEF_VFEE_CC_HELPER(8)
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DEF_VFEE_CC_HELPER(16)
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DEF_VFEE_CC_HELPER(32)
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static int vfene(void *v1, const void *v2, const void *v3, bool zs, uint8_t es)
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{
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const uint64_t mask = get_element_lsbs_mask(es);
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uint64_t a0, a1, b0, b1, e0, e1, z0, z1;
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uint64_t first_zero = 16;
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uint64_t first_inequal;
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bool smaller = false;
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a0 = s390_vec_read_element64(v2, 0);
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a1 = s390_vec_read_element64(v2, 1);
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b0 = s390_vec_read_element64(v3, 0);
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b1 = s390_vec_read_element64(v3, 1);
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e0 = nonzero_search(a0 ^ b0, mask);
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e1 = nonzero_search(a1 ^ b1, mask);
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first_inequal = match_index(e0, e1);
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/* identify the smaller element */
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if (first_inequal < 16) {
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uint8_t enr = first_inequal / (1 << es);
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uint32_t a = s390_vec_read_element(v2, enr, es);
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uint32_t b = s390_vec_read_element(v3, enr, es);
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smaller = a < b;
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}
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if (zs) {
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z0 = zero_search(a0, mask);
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z1 = zero_search(a1, mask);
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first_zero = match_index(z0, z1);
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}
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s390_vec_write_element64(v1, 0, MIN(first_inequal, first_zero));
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s390_vec_write_element64(v1, 1, 0);
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if (first_zero == 16 && first_inequal == 16) {
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return 3;
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} else if (first_zero < first_inequal) {
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return 0;
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}
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return smaller ? 1 : 2;
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}
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#define DEF_VFENE_HELPER(BITS) \
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void HELPER(gvec_vfene##BITS)(void *v1, const void *v2, const void *v3, \
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uint32_t desc) \
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{ \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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vfene(v1, v2, v3, zs, MO_##BITS); \
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}
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DEF_VFENE_HELPER(8)
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DEF_VFENE_HELPER(16)
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DEF_VFENE_HELPER(32)
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#define DEF_VFENE_CC_HELPER(BITS) \
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void HELPER(gvec_vfene_cc##BITS)(void *v1, const void *v2, const void *v3, \
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CPUS390XState *env, uint32_t desc) \
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{ \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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env->cc_op = vfene(v1, v2, v3, zs, MO_##BITS); \
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}
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DEF_VFENE_CC_HELPER(8)
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DEF_VFENE_CC_HELPER(16)
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DEF_VFENE_CC_HELPER(32)
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static int vistr(void *v1, const void *v2, uint8_t es)
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{
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const uint64_t mask = get_element_lsbs_mask(es);
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uint64_t a0 = s390_vec_read_element64(v2, 0);
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uint64_t a1 = s390_vec_read_element64(v2, 1);
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uint64_t z;
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int cc = 3;
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z = zero_search(a0, mask);
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if (z) {
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a0 &= ~(-1ull >> clz64(z));
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a1 = 0;
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cc = 0;
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} else {
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z = zero_search(a1, mask);
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if (z) {
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a1 &= ~(-1ull >> clz64(z));
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cc = 0;
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}
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}
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s390_vec_write_element64(v1, 0, a0);
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s390_vec_write_element64(v1, 1, a1);
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return cc;
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}
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#define DEF_VISTR_HELPER(BITS) \
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void HELPER(gvec_vistr##BITS)(void *v1, const void *v2, uint32_t desc) \
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{ \
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vistr(v1, v2, MO_##BITS); \
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}
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DEF_VISTR_HELPER(8)
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DEF_VISTR_HELPER(16)
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DEF_VISTR_HELPER(32)
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#define DEF_VISTR_CC_HELPER(BITS) \
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void HELPER(gvec_vistr_cc##BITS)(void *v1, const void *v2, CPUS390XState *env, \
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uint32_t desc) \
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{ \
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env->cc_op = vistr(v1, v2, MO_##BITS); \
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}
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DEF_VISTR_CC_HELPER(8)
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DEF_VISTR_CC_HELPER(16)
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DEF_VISTR_CC_HELPER(32)
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static bool element_compare(uint32_t data, uint32_t l, uint8_t c)
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{
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const bool equal = extract32(c, 7, 1);
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const bool lower = extract32(c, 6, 1);
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const bool higher = extract32(c, 5, 1);
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if (data < l) {
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return lower;
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} else if (data > l) {
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return higher;
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}
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return equal;
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}
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static int vstrc(void *v1, const void *v2, const void *v3, const void *v4,
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bool in, bool rt, bool zs, uint8_t es)
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{
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const uint64_t mask = get_element_lsbs_mask(es);
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uint64_t a0 = s390_vec_read_element64(v2, 0);
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uint64_t a1 = s390_vec_read_element64(v2, 1);
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int first_zero = 16, first_match = 16;
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S390Vector rt_result = {};
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uint64_t z0, z1;
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int i, j;
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if (zs) {
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z0 = zero_search(a0, mask);
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z1 = zero_search(a1, mask);
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first_zero = match_index(z0, z1);
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}
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for (i = 0; i < 16 / (1 << es); i++) {
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const uint32_t data = s390_vec_read_element(v2, i, es);
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const int cur_byte = i * (1 << es);
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bool any_match = false;
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/* if we don't need a bit vector, we can stop early */
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if (cur_byte == first_zero && !rt) {
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break;
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}
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for (j = 0; j < 16 / (1 << es); j += 2) {
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const uint32_t l1 = s390_vec_read_element(v3, j, es);
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const uint32_t l2 = s390_vec_read_element(v3, j + 1, es);
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/* we are only interested in the highest byte of each element */
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const uint8_t c1 = s390_vec_read_element8(v4, j * (1 << es));
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const uint8_t c2 = s390_vec_read_element8(v4, (j + 1) * (1 << es));
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if (element_compare(data, l1, c1) &&
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element_compare(data, l2, c2)) {
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any_match = true;
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break;
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}
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}
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/* invert the result if requested */
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any_match = in ^ any_match;
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if (any_match) {
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/* indicate bit vector if requested */
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if (rt) {
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const uint64_t val = -1ull;
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first_match = MIN(cur_byte, first_match);
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s390_vec_write_element(&rt_result, i, es, val);
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} else {
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/* stop on the first match */
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first_match = cur_byte;
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break;
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}
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}
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}
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if (rt) {
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*(S390Vector *)v1 = rt_result;
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} else {
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s390_vec_write_element64(v1, 0, MIN(first_match, first_zero));
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s390_vec_write_element64(v1, 1, 0);
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}
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if (first_zero == 16 && first_match == 16) {
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return 3; /* no match */
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} else if (first_zero == 16) {
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return 1; /* matching elements, no match for zero */
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} else if (first_match < first_zero) {
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return 2; /* matching elements before match for zero */
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}
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return 0; /* match for zero */
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}
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#define DEF_VSTRC_HELPER(BITS) \
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void HELPER(gvec_vstrc##BITS)(void *v1, const void *v2, const void *v3, \
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const void *v4, uint32_t desc) \
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{ \
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const bool in = extract32(simd_data(desc), 3, 1); \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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vstrc(v1, v2, v3, v4, in, 0, zs, MO_##BITS); \
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}
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DEF_VSTRC_HELPER(8)
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DEF_VSTRC_HELPER(16)
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DEF_VSTRC_HELPER(32)
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#define DEF_VSTRC_RT_HELPER(BITS) \
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void HELPER(gvec_vstrc_rt##BITS)(void *v1, const void *v2, const void *v3, \
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const void *v4, uint32_t desc) \
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{ \
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const bool in = extract32(simd_data(desc), 3, 1); \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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vstrc(v1, v2, v3, v4, in, 1, zs, MO_##BITS); \
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}
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DEF_VSTRC_RT_HELPER(8)
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DEF_VSTRC_RT_HELPER(16)
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DEF_VSTRC_RT_HELPER(32)
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#define DEF_VSTRC_CC_HELPER(BITS) \
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void HELPER(gvec_vstrc_cc##BITS)(void *v1, const void *v2, const void *v3, \
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const void *v4, CPUS390XState *env, \
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uint32_t desc) \
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{ \
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const bool in = extract32(simd_data(desc), 3, 1); \
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const bool zs = extract32(simd_data(desc), 1, 1); \
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\
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env->cc_op = vstrc(v1, v2, v3, v4, in, 0, zs, MO_##BITS); \
|
|
}
|
|
DEF_VSTRC_CC_HELPER(8)
|
|
DEF_VSTRC_CC_HELPER(16)
|
|
DEF_VSTRC_CC_HELPER(32)
|
|
|
|
#define DEF_VSTRC_CC_RT_HELPER(BITS) \
|
|
void HELPER(gvec_vstrc_cc_rt##BITS)(void *v1, const void *v2, const void *v3, \
|
|
const void *v4, CPUS390XState *env, \
|
|
uint32_t desc) \
|
|
{ \
|
|
const bool in = extract32(simd_data(desc), 3, 1); \
|
|
const bool zs = extract32(simd_data(desc), 1, 1); \
|
|
\
|
|
env->cc_op = vstrc(v1, v2, v3, v4, in, 1, zs, MO_##BITS); \
|
|
}
|
|
DEF_VSTRC_CC_RT_HELPER(8)
|
|
DEF_VSTRC_CC_RT_HELPER(16)
|
|
DEF_VSTRC_CC_RT_HELPER(32)
|