423 lines
13 KiB
C
423 lines
13 KiB
C
/*
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* QEMU IPMI KCS emulation
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*
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* Copyright (c) 2015,2017 Corey Minyard, MontaVista Software, LLC
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "migration/vmstate.h"
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#include "qemu/log.h"
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#include "qapi/error.h"
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#include "hw/ipmi/ipmi_kcs.h"
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#define IPMI_KCS_OBF_BIT 0
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#define IPMI_KCS_IBF_BIT 1
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#define IPMI_KCS_SMS_ATN_BIT 2
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#define IPMI_KCS_CD_BIT 3
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#define IPMI_KCS_OBF_MASK (1 << IPMI_KCS_OBF_BIT)
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#define IPMI_KCS_GET_OBF(d) (((d) >> IPMI_KCS_OBF_BIT) & 0x1)
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#define IPMI_KCS_SET_OBF(d, v) (d) = (((d) & ~IPMI_KCS_OBF_MASK) | \
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(((v) & 1) << IPMI_KCS_OBF_BIT))
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#define IPMI_KCS_IBF_MASK (1 << IPMI_KCS_IBF_BIT)
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#define IPMI_KCS_GET_IBF(d) (((d) >> IPMI_KCS_IBF_BIT) & 0x1)
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#define IPMI_KCS_SET_IBF(d, v) (d) = (((d) & ~IPMI_KCS_IBF_MASK) | \
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(((v) & 1) << IPMI_KCS_IBF_BIT))
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#define IPMI_KCS_SMS_ATN_MASK (1 << IPMI_KCS_SMS_ATN_BIT)
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#define IPMI_KCS_GET_SMS_ATN(d) (((d) >> IPMI_KCS_SMS_ATN_BIT) & 0x1)
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#define IPMI_KCS_SET_SMS_ATN(d, v) (d) = (((d) & ~IPMI_KCS_SMS_ATN_MASK) | \
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(((v) & 1) << IPMI_KCS_SMS_ATN_BIT))
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#define IPMI_KCS_CD_MASK (1 << IPMI_KCS_CD_BIT)
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#define IPMI_KCS_GET_CD(d) (((d) >> IPMI_KCS_CD_BIT) & 0x1)
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#define IPMI_KCS_SET_CD(d, v) (d) = (((d) & ~IPMI_KCS_CD_MASK) | \
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(((v) & 1) << IPMI_KCS_CD_BIT))
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#define IPMI_KCS_IDLE_STATE 0
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#define IPMI_KCS_READ_STATE 1
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#define IPMI_KCS_WRITE_STATE 2
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#define IPMI_KCS_ERROR_STATE 3
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#define IPMI_KCS_GET_STATE(d) (((d) >> 6) & 0x3)
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#define IPMI_KCS_SET_STATE(d, v) ((d) = ((d) & ~0xc0) | (((v) & 0x3) << 6))
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#define IPMI_KCS_ABORT_STATUS_CMD 0x60
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#define IPMI_KCS_WRITE_START_CMD 0x61
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#define IPMI_KCS_WRITE_END_CMD 0x62
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#define IPMI_KCS_READ_CMD 0x68
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#define IPMI_KCS_STATUS_NO_ERR 0x00
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#define IPMI_KCS_STATUS_ABORTED_ERR 0x01
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#define IPMI_KCS_STATUS_BAD_CC_ERR 0x02
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#define IPMI_KCS_STATUS_LENGTH_ERR 0x06
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static void ipmi_kcs_raise_irq(IPMIKCS *ik)
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{
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if (ik->use_irq && ik->irqs_enabled && ik->raise_irq) {
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ik->raise_irq(ik);
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}
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}
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static void ipmi_kcs_lower_irq(IPMIKCS *ik)
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{
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if (ik->lower_irq) {
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ik->lower_irq(ik);
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}
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}
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#define SET_OBF() \
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do { \
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IPMI_KCS_SET_OBF(ik->status_reg, 1); \
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if (!ik->obf_irq_set) { \
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ik->obf_irq_set = 1; \
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if (!ik->atn_irq_set) { \
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ipmi_kcs_raise_irq(ik); \
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} \
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} \
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} while (0)
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static void ipmi_kcs_signal(IPMIKCS *ik, IPMIInterface *ii)
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{
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IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii);
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ik->do_wake = 1;
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while (ik->do_wake) {
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ik->do_wake = 0;
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iic->handle_if_event(ii);
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}
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}
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static void ipmi_kcs_handle_event(IPMIInterface *ii)
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{
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IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii);
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IPMIKCS *ik = iic->get_backend_data(ii);
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if (ik->cmd_reg == IPMI_KCS_ABORT_STATUS_CMD) {
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if (IPMI_KCS_GET_STATE(ik->status_reg) != IPMI_KCS_ERROR_STATE) {
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ik->waiting_rsp++; /* Invalidate the message */
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ik->outmsg[0] = IPMI_KCS_STATUS_ABORTED_ERR;
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ik->outlen = 1;
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ik->outpos = 0;
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IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_ERROR_STATE);
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SET_OBF();
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}
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goto out;
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}
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switch (IPMI_KCS_GET_STATE(ik->status_reg)) {
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case IPMI_KCS_IDLE_STATE:
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if (ik->cmd_reg == IPMI_KCS_WRITE_START_CMD) {
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IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_WRITE_STATE);
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ik->cmd_reg = -1;
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ik->write_end = 0;
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ik->inlen = 0;
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SET_OBF();
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}
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break;
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case IPMI_KCS_READ_STATE:
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handle_read:
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if (ik->outpos >= ik->outlen) {
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IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_IDLE_STATE);
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SET_OBF();
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} else if (ik->data_in_reg == IPMI_KCS_READ_CMD) {
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ik->data_out_reg = ik->outmsg[ik->outpos];
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ik->outpos++;
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SET_OBF();
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} else {
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ik->outmsg[0] = IPMI_KCS_STATUS_BAD_CC_ERR;
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ik->outlen = 1;
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ik->outpos = 0;
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IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_ERROR_STATE);
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SET_OBF();
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goto out;
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}
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break;
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case IPMI_KCS_WRITE_STATE:
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if (ik->data_in_reg != -1) {
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/*
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* Don't worry about input overrun here, that will be
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* handled in the BMC.
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*/
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if (ik->inlen < sizeof(ik->inmsg)) {
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ik->inmsg[ik->inlen] = ik->data_in_reg;
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}
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ik->inlen++;
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}
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if (ik->write_end) {
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IPMIBmcClass *bk = IPMI_BMC_GET_CLASS(ik->bmc);
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ik->outlen = 0;
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ik->write_end = 0;
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ik->outpos = 0;
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bk->handle_command(ik->bmc, ik->inmsg, ik->inlen, sizeof(ik->inmsg),
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ik->waiting_rsp);
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goto out_noibf;
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} else if (ik->cmd_reg == IPMI_KCS_WRITE_END_CMD) {
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ik->cmd_reg = -1;
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ik->write_end = 1;
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}
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SET_OBF();
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break;
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case IPMI_KCS_ERROR_STATE:
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if (ik->data_in_reg != -1) {
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IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_READ_STATE);
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ik->data_in_reg = IPMI_KCS_READ_CMD;
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goto handle_read;
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}
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break;
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}
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if (ik->cmd_reg != -1) {
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/* Got an invalid command */
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ik->outmsg[0] = IPMI_KCS_STATUS_BAD_CC_ERR;
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ik->outlen = 1;
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ik->outpos = 0;
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IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_ERROR_STATE);
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}
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out:
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ik->cmd_reg = -1;
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ik->data_in_reg = -1;
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IPMI_KCS_SET_IBF(ik->status_reg, 0);
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out_noibf:
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return;
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}
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static void ipmi_kcs_handle_rsp(IPMIInterface *ii, uint8_t msg_id,
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unsigned char *rsp, unsigned int rsp_len)
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{
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IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii);
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IPMIKCS *ik = iic->get_backend_data(ii);
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if (ik->waiting_rsp == msg_id) {
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ik->waiting_rsp++;
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if (rsp_len > sizeof(ik->outmsg)) {
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ik->outmsg[0] = rsp[0];
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ik->outmsg[1] = rsp[1];
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ik->outmsg[2] = IPMI_CC_CANNOT_RETURN_REQ_NUM_BYTES;
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ik->outlen = 3;
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} else {
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memcpy(ik->outmsg, rsp, rsp_len);
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ik->outlen = rsp_len;
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}
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IPMI_KCS_SET_STATE(ik->status_reg, IPMI_KCS_READ_STATE);
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ik->data_in_reg = IPMI_KCS_READ_CMD;
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ipmi_kcs_signal(ik, ii);
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}
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}
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static uint64_t ipmi_kcs_ioport_read(void *opaque, hwaddr addr, unsigned size)
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{
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IPMIInterface *ii = opaque;
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IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii);
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IPMIKCS *ik = iic->get_backend_data(ii);
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uint32_t ret;
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switch (addr & ik->size_mask) {
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case 0:
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ret = ik->data_out_reg;
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IPMI_KCS_SET_OBF(ik->status_reg, 0);
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if (ik->obf_irq_set) {
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ik->obf_irq_set = 0;
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if (!ik->atn_irq_set) {
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ipmi_kcs_lower_irq(ik);
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}
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}
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break;
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case 1:
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ret = ik->status_reg;
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if (ik->atn_irq_set) {
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ik->atn_irq_set = 0;
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if (!ik->obf_irq_set) {
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ipmi_kcs_lower_irq(ik);
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}
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}
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break;
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default:
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ret = 0xff;
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}
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return ret;
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}
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static void ipmi_kcs_ioport_write(void *opaque, hwaddr addr, uint64_t val,
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unsigned size)
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{
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IPMIInterface *ii = opaque;
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IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii);
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IPMIKCS *ik = iic->get_backend_data(ii);
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if (IPMI_KCS_GET_IBF(ik->status_reg)) {
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return;
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}
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switch (addr & ik->size_mask) {
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case 0:
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ik->data_in_reg = val;
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break;
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case 1:
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ik->cmd_reg = val;
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break;
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default:
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/* Ignore. */
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break;
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}
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IPMI_KCS_SET_IBF(ik->status_reg, 1);
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ipmi_kcs_signal(ik, ii);
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}
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const MemoryRegionOps ipmi_kcs_io_ops = {
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.read = ipmi_kcs_ioport_read,
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.write = ipmi_kcs_ioport_write,
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.impl = {
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.min_access_size = 1,
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.max_access_size = 1,
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},
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void ipmi_kcs_set_atn(IPMIInterface *ii, int val, int irq)
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{
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IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii);
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IPMIKCS *ik = iic->get_backend_data(ii);
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IPMI_KCS_SET_SMS_ATN(ik->status_reg, val);
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if (val) {
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if (irq && !ik->atn_irq_set) {
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ik->atn_irq_set = 1;
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if (!ik->obf_irq_set) {
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ipmi_kcs_raise_irq(ik);
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}
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}
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} else {
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if (ik->atn_irq_set) {
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ik->atn_irq_set = 0;
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if (!ik->obf_irq_set) {
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ipmi_kcs_lower_irq(ik);
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}
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}
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}
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}
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static void ipmi_kcs_set_irq_enable(IPMIInterface *ii, int val)
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{
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IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii);
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IPMIKCS *ik = iic->get_backend_data(ii);
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ik->irqs_enabled = val;
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}
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/* min_size must be a power of 2. */
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static void ipmi_kcs_init(IPMIInterface *ii, unsigned int min_size,
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Error **errp)
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{
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IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii);
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IPMIKCS *ik = iic->get_backend_data(ii);
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if (min_size == 0) {
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min_size = 2;
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}
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ik->size_mask = min_size - 1;
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ik->io_length = 2;
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memory_region_init_io(&ik->io, NULL, &ipmi_kcs_io_ops, ii, "ipmi-kcs",
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min_size);
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}
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int ipmi_kcs_vmstate_post_load(void *opaque, int version)
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{
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IPMIKCS *ik = opaque;
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/* Make sure all the values are sane. */
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if (ik->outpos >= MAX_IPMI_MSG_SIZE || ik->outlen >= MAX_IPMI_MSG_SIZE ||
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ik->outpos >= ik->outlen) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"ipmi:kcs: vmstate transfer received bad out values: %d %d\n",
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ik->outpos, ik->outlen);
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ik->outpos = 0;
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ik->outlen = 0;
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}
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if (ik->inlen >= MAX_IPMI_MSG_SIZE) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"ipmi:kcs: vmstate transfer received bad in value: %d\n",
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ik->inlen);
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ik->inlen = 0;
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}
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return 0;
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}
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static bool vmstate_kcs_before_version2(void *opaque, int version)
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{
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return version <= 1;
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}
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const VMStateDescription vmstate_IPMIKCS = {
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.name = TYPE_IPMI_INTERFACE_PREFIX "kcs",
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.version_id = 2,
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.minimum_version_id = 1,
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.post_load = ipmi_kcs_vmstate_post_load,
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.fields = (VMStateField[]) {
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VMSTATE_BOOL(obf_irq_set, IPMIKCS),
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VMSTATE_BOOL(atn_irq_set, IPMIKCS),
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VMSTATE_UNUSED_TEST(vmstate_kcs_before_version2, 1), /* Was use_irq */
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VMSTATE_BOOL(irqs_enabled, IPMIKCS),
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VMSTATE_UINT32(outpos, IPMIKCS),
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VMSTATE_UINT32_V(outlen, IPMIKCS, 2),
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VMSTATE_UINT8_ARRAY(outmsg, IPMIKCS, MAX_IPMI_MSG_SIZE),
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VMSTATE_UINT32_V(inlen, IPMIKCS, 2),
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VMSTATE_UINT8_ARRAY(inmsg, IPMIKCS, MAX_IPMI_MSG_SIZE),
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VMSTATE_BOOL(write_end, IPMIKCS),
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VMSTATE_UINT8(status_reg, IPMIKCS),
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VMSTATE_UINT8(data_out_reg, IPMIKCS),
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VMSTATE_INT16(data_in_reg, IPMIKCS),
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VMSTATE_INT16(cmd_reg, IPMIKCS),
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VMSTATE_UINT8(waiting_rsp, IPMIKCS),
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VMSTATE_END_OF_LIST()
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}
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};
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void ipmi_kcs_get_fwinfo(IPMIKCS *ik, IPMIFwInfo *info)
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{
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info->interface_name = "kcs";
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info->interface_type = IPMI_SMBIOS_KCS;
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info->ipmi_spec_major_revision = 2;
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info->ipmi_spec_minor_revision = 0;
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info->base_address = ik->io_base;
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info->i2c_slave_address = ik->bmc->slave_addr;
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info->register_length = ik->io_length;
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info->register_spacing = 1;
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info->memspace = IPMI_MEMSPACE_IO;
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info->irq_type = IPMI_LEVEL_IRQ;
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}
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void ipmi_kcs_class_init(IPMIInterfaceClass *iic)
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{
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iic->init = ipmi_kcs_init;
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iic->set_atn = ipmi_kcs_set_atn;
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iic->handle_rsp = ipmi_kcs_handle_rsp;
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iic->handle_if_event = ipmi_kcs_handle_event;
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iic->set_irq_enable = ipmi_kcs_set_irq_enable;
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}
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