783 lines
23 KiB
ArmAsm
783 lines
23 KiB
ArmAsm
/*
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* <vectors.S>
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*
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* Sparc V9 Trap Table(s) with SpitFire/Cheetah extensions.
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*
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* Copyright (C) 1996, 2001 David S. Miller (davem@caip.rutgers.edu)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License V2
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* as published by the Free Software Foundation
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*/
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#define __ASSEMBLY__
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#include "cpustate.h"
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#include "pstate.h"
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#include <asm/asi.h>
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#define ASI_BP ASI_PHYS_BYPASS_EC_E
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#define PROM_ADDR 0x1fff0000000
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#define SER_ADDR 0x1fe020003f8
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#define TICK_INT_DIS 0x8000000000000000
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#define TICK_INTERVAL 1*1000*1000
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.section ".text.vectors", "ax"
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.align 16384
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/* Sparc64 trap table */
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.globl trap_table, __divide_error, softint_irq, softint_irq_tl1
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.register %g2, #scratch
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.register %g3, #scratch
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.register %g6, #scratch
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.register %g7, #scratch
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trap_table:
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#define SPILL_WINDOW \
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btst 1, %sp; \
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be spill_32bit; \
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nop; \
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stx %l0, [%sp + STACK_BIAS + 0x00]; \
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stx %l1, [%sp + STACK_BIAS + 0x08]; \
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stx %l2, [%sp + STACK_BIAS + 0x10]; \
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stx %l3, [%sp + STACK_BIAS + 0x18]; \
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stx %l4, [%sp + STACK_BIAS + 0x20]; \
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stx %l5, [%sp + STACK_BIAS + 0x28]; \
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stx %l6, [%sp + STACK_BIAS + 0x30]; \
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stx %l7, [%sp + STACK_BIAS + 0x38]; \
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stx %i0, [%sp + STACK_BIAS + 0x40]; \
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stx %i1, [%sp + STACK_BIAS + 0x48]; \
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stx %i2, [%sp + STACK_BIAS + 0x50]; \
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stx %i3, [%sp + STACK_BIAS + 0x58]; \
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stx %i4, [%sp + STACK_BIAS + 0x60]; \
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stx %i5, [%sp + STACK_BIAS + 0x68]; \
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stx %i6, [%sp + STACK_BIAS + 0x70]; \
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stx %i7, [%sp + STACK_BIAS + 0x78]; \
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saved; retry; nop; nop; nop; nop; nop; nop; \
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nop; nop; nop; nop; nop;
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#define FILL_WINDOW \
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btst 1, %sp; \
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be fill_32bit; \
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nop; \
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ldx [%sp + STACK_BIAS + 0x00], %l0; \
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ldx [%sp + STACK_BIAS + 0x08], %l1; \
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ldx [%sp + STACK_BIAS + 0x10], %l2; \
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ldx [%sp + STACK_BIAS + 0x18], %l3; \
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ldx [%sp + STACK_BIAS + 0x20], %l4; \
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ldx [%sp + STACK_BIAS + 0x28], %l5; \
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ldx [%sp + STACK_BIAS + 0x30], %l6; \
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ldx [%sp + STACK_BIAS + 0x38], %l7; \
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ldx [%sp + STACK_BIAS + 0x40], %i0; \
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ldx [%sp + STACK_BIAS + 0x48], %i1; \
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ldx [%sp + STACK_BIAS + 0x50], %i2; \
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ldx [%sp + STACK_BIAS + 0x58], %i3; \
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ldx [%sp + STACK_BIAS + 0x60], %i4; \
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ldx [%sp + STACK_BIAS + 0x68], %i5; \
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ldx [%sp + STACK_BIAS + 0x70], %i6; \
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ldx [%sp + STACK_BIAS + 0x78], %i7; \
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restored; retry; nop; nop; nop; nop; nop; nop; \
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nop; nop; nop; nop; nop;
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#define CLEAN_WINDOW \
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rdpr %cleanwin, %l0; add %l0, 1, %l0; \
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wrpr %l0, 0x0, %cleanwin; \
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clr %o0; clr %o1; clr %o2; clr %o3; \
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clr %o4; clr %o5; clr %o6; clr %o7; \
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clr %l0; clr %l1; clr %l2; clr %l3; \
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clr %l4; clr %l5; clr %l6; clr %l7; \
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retry; \
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nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
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#define TRAP_IRQ(routine, level) \
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ba routine; mov level, %g1; nop; nop; nop; nop; nop; nop;
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#define BTRAP(lvl) \
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ba bug; mov lvl, %g1; nop; nop; nop; nop; nop; nop;
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#define BTRAPTL1(lvl) BTRAP(lvl)
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#define BTRAPS(x) BTRAP(x) BTRAP(x+1) BTRAP(x+2) BTRAP(x+3) BTRAP(x+4) BTRAP(x+5) BTRAP(x+6) BTRAP(x+7)
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#define BTRAPS4(x) BTRAP(x) BTRAP(x+1) BTRAP(x+2) BTRAP(x+3)
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#define TRAP_HANDLER(routine) ba routine; nop; nop; nop; nop; nop; nop; nop;
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#define STACK_BIAS 2047
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.globl sparc64_ttable_tl0, sparc64_ttable_tl1
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sparc64_ttable_tl0:
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ba entry; nop; nop; nop; nop; nop; nop; nop;! XXX remove
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ba entry; nop; nop; nop; nop; nop; nop; nop;! Power-on reset
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ba entry; nop; nop; nop; nop; nop; nop; nop;! Watchdog reset
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ba entry; nop; nop; nop; nop; nop; nop; nop;! External reset
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ba entry; nop; nop; nop; nop; nop; nop; nop;! Software reset
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ba entry; nop; nop; nop; nop; nop; nop; nop;! RED state
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BTRAP(0x06) BTRAP(0x07) BTRAPS(0x08)
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BTRAPS(0x10) BTRAPS(0x18)
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BTRAP(0x20) BTRAP(0x21) BTRAP(0x22) BTRAP(0x23)
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CLEAN_WINDOW ! 24-27
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BTRAPS(0x28)
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BTRAPS(0x30) BTRAPS(0x38)
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BTRAP(0x40) BTRAP(0x41) BTRAP(0x42) BTRAP(0x43)
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tl0_irq4: TRAP_IRQ(handler_irq, 4)
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tl0_irq5: TRAP_IRQ(handler_irq, 5) TRAP_IRQ(handler_irq, 6)
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tl0_irq7: TRAP_IRQ(handler_irq, 7) TRAP_IRQ(handler_irq, 8)
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tl0_irq9: TRAP_IRQ(handler_irq, 9) TRAP_IRQ(handler_irq, 10)
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tl0_irq11: TRAP_IRQ(handler_irq, 11) TRAP_IRQ(handler_irq, 12)
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tl0_irq13: TRAP_IRQ(handler_irq, 13)
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tl0_irq14: TRAP_IRQ(softint_irq, 14)
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tl0_irq15: TRAP_IRQ(handler_irq, 15)
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BTRAPS(0x50) BTRAPS(0x58)
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BTRAPS4(0x60)
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TRAP_HANDLER(reload_IMMU_tlb) ! 0x64 : instruction_access_MMU_miss
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TRAP_HANDLER(reload_IMMU_tlb) ! 0x65 : instruction_access_MMU_miss
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TRAP_HANDLER(reload_IMMU_tlb) ! 0x66 : instruction_access_MMU_miss
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TRAP_HANDLER(reload_IMMU_tlb) ! 0x67 : instruction_access_MMU_miss
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TRAP_HANDLER(reload_DMMU_tlb) ! 0x68 : data_access_MMU_miss
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TRAP_HANDLER(reload_DMMU_tlb) ! 0x69 : data_access_MMU_miss
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TRAP_HANDLER(reload_DMMU_tlb) ! 0x6A : data_access_MMU_miss
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TRAP_HANDLER(reload_DMMU_tlb) ! 0x6B : data_access_MMU_miss
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BTRAPS4(0x6C) ! data_access_protection
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BTRAPS(0x70) BTRAPS(0x78)
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tl0_s0n: SPILL_WINDOW
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tl0_s1n: SPILL_WINDOW
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tl0_s2n: SPILL_WINDOW
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tl0_s3n: SPILL_WINDOW
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tl0_s4n: SPILL_WINDOW
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tl0_s5n: SPILL_WINDOW
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tl0_s6n: SPILL_WINDOW
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tl0_s7n: SPILL_WINDOW
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tl0_s0o: SPILL_WINDOW
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tl0_s1o: SPILL_WINDOW
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tl0_s2o: SPILL_WINDOW
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tl0_s3o: SPILL_WINDOW
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tl0_s4o: SPILL_WINDOW
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tl0_s5o: SPILL_WINDOW
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tl0_s6o: SPILL_WINDOW
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tl0_s7o: SPILL_WINDOW
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tl0_f0n: FILL_WINDOW
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tl0_f1n: FILL_WINDOW
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tl0_f2n: FILL_WINDOW
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tl0_f3n: FILL_WINDOW
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tl0_f4n: FILL_WINDOW
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tl0_f5n: FILL_WINDOW
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tl0_f6n: FILL_WINDOW
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tl0_f7n: FILL_WINDOW
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tl0_f0o: FILL_WINDOW
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tl0_f1o: FILL_WINDOW
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tl0_f2o: FILL_WINDOW
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tl0_f3o: FILL_WINDOW
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tl0_f4o: FILL_WINDOW
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tl0_f5o: FILL_WINDOW
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tl0_f6o: FILL_WINDOW
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tl0_f7o: FILL_WINDOW
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tl0_resv100: BTRAPS(0x100) BTRAPS(0x108)
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tl0_resv110: BTRAPS(0x110) BTRAPS(0x118)
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tl0_resv120: BTRAPS(0x120) BTRAPS(0x128)
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tl0_resv130: BTRAPS(0x130) BTRAPS(0x138)
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tl0_resv140: BTRAPS(0x140) BTRAPS(0x148)
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tl0_resv150: BTRAPS(0x150) BTRAPS(0x158)
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tl0_resv160: BTRAPS(0x160) BTRAPS(0x168)
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tl0_resv170: BTRAPS(0x170) BTRAPS4(0x178)
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BTRAP(0x17c)
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TRAP_HANDLER(prom_debug) ! 0x17d : debugger
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TRAP_HANDLER(prom_debug) ! 0x17e : debugger breakpoint
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BTRAP(0x17f)
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tl0_resv180: BTRAPS(0x180) BTRAPS(0x188)
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tl0_resv190: BTRAPS(0x190) BTRAPS(0x198)
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tl0_resv1a0: BTRAPS(0x1a0) BTRAPS(0x1a8)
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tl0_resv1b0: BTRAPS(0x1b0) BTRAPS(0x1b8)
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tl0_resv1c0: BTRAPS(0x1c0) BTRAPS(0x1c8)
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tl0_resv1d0: BTRAPS(0x1d0) BTRAPS(0x1d8)
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tl0_resv1e0: BTRAPS(0x1e0) BTRAPS(0x1e8)
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tl0_resv1f0: BTRAPS(0x1f0) BTRAPS(0x1f8)
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#undef BTRAPS
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#define BTRAPS(x) BTRAPTL1(x) BTRAPTL1(x+1) BTRAPTL1(x+2) BTRAPTL1(x+3) BTRAPTL1(x+4) BTRAPTL1(x+5) BTRAPTL1(x+6) BTRAPTL1(x+7)
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#define SKIP_IRQ(routine, level) \
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retry; nop; nop; nop; nop; nop; nop; nop;
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sparc64_ttable_tl1:
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BTRAPS(0x00) BTRAPS(0x08)
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BTRAPS(0x10) BTRAPS(0x18)
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BTRAPTL1(0x20) BTRAPTL1(0x21) BTRAPTL1(0x22) BTRAPTL1(0x23)
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CLEAN_WINDOW ! 24-27
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BTRAPS(0x28)
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BTRAPS(0x30) BTRAPS(0x38)
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BTRAPTL1(0x40) BTRAPTL1(0x41) BTRAPTL1(0x42) BTRAPTL1(0x43)
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tl1_irq4: TRAP_IRQ(handler_irq, 4)
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tl1_irq5: TRAP_IRQ(handler_irq, 5) TRAP_IRQ(handler_irq, 6)
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tl1_irq7: TRAP_IRQ(handler_irq, 7) TRAP_IRQ(handler_irq, 8)
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tl1_irq9: TRAP_IRQ(handler_irq, 9) TRAP_IRQ(handler_irq, 10)
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tl1_irq11: TRAP_IRQ(handler_irq, 11) TRAP_IRQ(handler_irq, 12)
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tl1_irq13: TRAP_IRQ(handler_irq, 13)
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tl1_irq14: SKIP_IRQ(softint_irq, 14)
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tl1_irq15: TRAP_IRQ(handler_irq, 15)
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BTRAPS(0x50) BTRAPS(0x58)
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BTRAPS4(0x60)
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TRAP_HANDLER(reload_IMMU_tlb) ! 0x64 : instruction_access_MMU_miss
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TRAP_HANDLER(reload_IMMU_tlb) ! 0x65 : instruction_access_MMU_miss
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TRAP_HANDLER(reload_IMMU_tlb) ! 0x66 : instruction_access_MMU_miss
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TRAP_HANDLER(reload_IMMU_tlb) ! 0x67 : instruction_access_MMU_miss
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TRAP_HANDLER(reload_DMMU_tlb) ! 0x68 : data_access_MMU_miss
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TRAP_HANDLER(reload_DMMU_tlb) ! 0x69 : data_access_MMU_miss
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TRAP_HANDLER(reload_DMMU_tlb) ! 0x6A : data_access_MMU_miss
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TRAP_HANDLER(reload_DMMU_tlb) ! 0x6B : data_access_MMU_miss
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BTRAPS4(0x6C) ! data_access_protection
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BTRAPS(0x70) BTRAPS(0x78)
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tl1_s0n: SPILL_WINDOW
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tl1_s1n: SPILL_WINDOW
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tl1_s2n: SPILL_WINDOW
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tl1_s3n: SPILL_WINDOW
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tl1_s4n: SPILL_WINDOW
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tl1_s5n: SPILL_WINDOW
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tl1_s6n: SPILL_WINDOW
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tl1_s7n: SPILL_WINDOW
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tl1_s0o: SPILL_WINDOW
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tl1_s1o: SPILL_WINDOW
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tl1_s2o: SPILL_WINDOW
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tl1_s3o: SPILL_WINDOW
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tl1_s4o: SPILL_WINDOW
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tl1_s5o: SPILL_WINDOW
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tl1_s6o: SPILL_WINDOW
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tl1_s7o: SPILL_WINDOW
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tl1_f0n: FILL_WINDOW
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tl1_f1n: FILL_WINDOW
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tl1_f2n: FILL_WINDOW
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tl1_f3n: FILL_WINDOW
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tl1_f4n: FILL_WINDOW
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tl1_f5n: FILL_WINDOW
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tl1_f6n: FILL_WINDOW
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tl1_f7n: FILL_WINDOW
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tl1_f0o: FILL_WINDOW
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tl1_f1o: FILL_WINDOW
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tl1_f2o: FILL_WINDOW
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tl1_f3o: FILL_WINDOW
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tl1_f4o: FILL_WINDOW
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tl1_f5o: FILL_WINDOW
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tl1_f6o: FILL_WINDOW
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tl1_f7o: FILL_WINDOW
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tl1_resv100: BTRAPS(0x100) BTRAPS(0x108)
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tl1_resv110: BTRAPS(0x110) BTRAPS(0x118)
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tl1_resv120: BTRAPS(0x120) BTRAPS(0x128)
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tl1_resv130: BTRAPS(0x130) BTRAPS(0x138)
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tl1_resv140: BTRAPS(0x140) BTRAPS(0x148)
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tl1_resv150: BTRAPS(0x150) BTRAPS(0x158)
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tl1_resv160: BTRAPS(0x160) BTRAPS(0x168)
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tl1_resv170: BTRAPS(0x170) BTRAPS4(0x178)
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BTRAP(0x17c)
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TRAP_HANDLER(prom_debug) ! 0x17d : debugger
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TRAP_HANDLER(prom_debug) ! 0x17e : debugger breakpoint
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BTRAP(0x17f)
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tl1_resv180: BTRAPS(0x180) BTRAPS(0x188)
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tl1_resv190: BTRAPS(0x190) BTRAPS(0x198)
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tl1_resv1a0: BTRAPS(0x1a0) BTRAPS(0x1a8)
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tl1_resv1b0: BTRAPS(0x1b0) BTRAPS(0x1b8)
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tl1_resv1c0: BTRAPS(0x1c0) BTRAPS(0x1c8)
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tl1_resv1d0: BTRAPS(0x1d0) BTRAPS(0x1d8)
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tl1_resv1e0: BTRAPS(0x1e0) BTRAPS(0x1e8)
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tl1_resv1f0: BTRAPS(0x1f0) BTRAPS(0x1f8)
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.section ".data"
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.align 8
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.globl obp_ticks_pointer
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! Pointer to current tick value
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obp_ticks_pointer:
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.xword 0
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! Saved context state
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debug_context:
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.xword 0
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.section ".text", "ax"
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spill_32bit:
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srl %sp, 0, %sp
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stw %l0, [%sp + 0x00]
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stw %l1, [%sp + 0x04]
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stw %l2, [%sp + 0x08]
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stw %l3, [%sp + 0x0c]
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stw %l4, [%sp + 0x10]
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stw %l5, [%sp + 0x14]
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stw %l6, [%sp + 0x18]
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stw %l7, [%sp + 0x1c]
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stw %i0, [%sp + 0x20]
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stw %i1, [%sp + 0x24]
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stw %i2, [%sp + 0x28]
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stw %i3, [%sp + 0x2c]
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stw %i4, [%sp + 0x30]
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stw %i5, [%sp + 0x34]
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stw %i6, [%sp + 0x38]
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stw %i7, [%sp + 0x3c]
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saved
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retry
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fill_32bit:
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srl %sp, 0, %sp
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lduw [%sp + 0x00], %l0
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lduw [%sp + 0x04], %l1
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lduw [%sp + 0x08], %l2
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lduw [%sp + 0x0c], %l3
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lduw [%sp + 0x10], %l4
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lduw [%sp + 0x14], %l5
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lduw [%sp + 0x18], %l6
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lduw [%sp + 0x1c], %l7
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lduw [%sp + 0x20], %i0
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lduw [%sp + 0x24], %i1
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lduw [%sp + 0x28], %i2
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lduw [%sp + 0x2c], %i3
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lduw [%sp + 0x30], %i4
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lduw [%sp + 0x34], %i5
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lduw [%sp + 0x38], %i6
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lduw [%sp + 0x3c], %i7
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restored
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retry
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.globl reload_DMMU_tlb, reload_IMMU_tlb, bug
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|
reload_DMMU_tlb:
|
|
|
|
/* Save CPU state to stack */
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g1
|
|
add %g1, -CONTEXT_STATE_SIZE, %g1
|
|
stx %g1, [%g7]
|
|
|
|
SAVE_CPU_STATE(dtlb)
|
|
|
|
RESET_CPU_WINDOW_STATE(dtlb)
|
|
|
|
/* Switch to ordinary globals, saving to context */
|
|
mov %g1, %o1
|
|
rdpr %pstate, %o2
|
|
andn %o2, PSTATE_MG, %o2
|
|
wrpr %o2, %pstate
|
|
|
|
stx %g1, [%o1 + 0x30]
|
|
stx %g2, [%o1 + 0x38]
|
|
stx %g3, [%o1 + 0x40]
|
|
stx %g4, [%o1 + 0x48]
|
|
stx %g5, [%o1 + 0x50]
|
|
stx %g6, [%o1 + 0x58]
|
|
stx %g7, [%o1 + 0x60]
|
|
|
|
/* Copy context back to %g1 */
|
|
mov %o1, %g1
|
|
|
|
/* Switch to 8K TLB locked OpenBIOS stack (note we add an additional 192 bytes required for
|
|
gcc to save its arguments when building with -O0) */
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g6
|
|
setx CONTEXT_STACK_SIZE, %g4, %g5
|
|
sub %g6, %g5, %g6
|
|
stx %g6, [%g7]
|
|
|
|
setx - 2047 - 192, %g6, %g7
|
|
add %g1, %g7, %g7
|
|
mov %g7, %sp
|
|
|
|
/* Enable interrupts for window spill/fill traps */
|
|
rdpr %pstate, %g7
|
|
or %g7, PSTATE_IE, %g7
|
|
wrpr %g7, %pstate
|
|
|
|
call dtlb_miss_handler
|
|
nop
|
|
|
|
/* Disable interrupts */
|
|
rdpr %pstate, %g7
|
|
andn %g7, PSTATE_IE, %g7
|
|
wrpr %g7, %pstate
|
|
|
|
/* Restore CPU state from stack */
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g1
|
|
setx CONTEXT_STACK_SIZE, %g4, %g5
|
|
add %g1, %g5, %g1
|
|
stx %g1, [%g7]
|
|
|
|
/* Restore ordinary globals, switch back to memory globals */
|
|
mov %g1, %o1
|
|
rdpr %pstate, %o2
|
|
or %o2, PSTATE_MG, %o2
|
|
|
|
ldx [%o1 + 0x30], %g1
|
|
ldx [%o1 + 0x38], %g2
|
|
ldx [%o1 + 0x40], %g3
|
|
ldx [%o1 + 0x48], %g4
|
|
ldx [%o1 + 0x50], %g5
|
|
ldx [%o1 + 0x58], %g6
|
|
ldx [%o1 + 0x60], %g7
|
|
|
|
wrpr %o2, %pstate
|
|
mov %o1, %g1
|
|
|
|
RESTORE_CPU_STATE(dtlb)
|
|
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g1
|
|
add %g1, CONTEXT_STATE_SIZE, %g1
|
|
stx %g1, [%g7]
|
|
|
|
retry
|
|
|
|
reload_IMMU_tlb:
|
|
|
|
/* Save CPU state to stack */
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g1
|
|
add %g1, -CONTEXT_STATE_SIZE, %g1
|
|
stx %g1, [%g7]
|
|
|
|
SAVE_CPU_STATE(itlb)
|
|
|
|
RESET_CPU_WINDOW_STATE(itlb)
|
|
|
|
/* Switch to ordinary globals, saving to context */
|
|
mov %g1, %o1
|
|
rdpr %pstate, %o2
|
|
andn %o2, PSTATE_MG, %o2
|
|
wrpr %o2, %pstate
|
|
|
|
stx %g1, [%o1 + 0x30]
|
|
stx %g2, [%o1 + 0x38]
|
|
stx %g3, [%o1 + 0x40]
|
|
stx %g4, [%o1 + 0x48]
|
|
stx %g5, [%o1 + 0x50]
|
|
stx %g6, [%o1 + 0x58]
|
|
stx %g7, [%o1 + 0x60]
|
|
|
|
/* Copy context back to %g1 */
|
|
mov %o1, %g1
|
|
|
|
/* Switch to 8K TLB locked OpenBIOS stack (note we add an additional 192 bytes required for
|
|
gcc to save its arguments when building with -O0) */
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g6
|
|
setx CONTEXT_STACK_SIZE, %g4, %g5
|
|
sub %g6, %g5, %g6
|
|
stx %g6, [%g7]
|
|
|
|
setx - 2047 - 192, %g6, %g7
|
|
add %g1, %g7, %g7
|
|
mov %g7, %sp
|
|
|
|
/* Enable interrupts for window spill/fill traps */
|
|
rdpr %pstate, %g7
|
|
or %g7, PSTATE_IE, %g7
|
|
wrpr %g7, %pstate
|
|
|
|
call itlb_miss_handler
|
|
nop
|
|
|
|
/* Disable interrupts */
|
|
rdpr %pstate, %g7
|
|
andn %g7, PSTATE_IE, %g7
|
|
wrpr %g7, %pstate
|
|
|
|
/* Restore CPU state from stack */
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g1
|
|
setx CONTEXT_STACK_SIZE, %g4, %g5
|
|
add %g1, %g5, %g1
|
|
stx %g1, [%g7]
|
|
|
|
/* Restore ordinary globals, switch back to memory globals */
|
|
mov %g1, %o1
|
|
rdpr %pstate, %o2
|
|
or %o2, PSTATE_MG, %o2
|
|
|
|
ldx [%o1 + 0x30], %g1
|
|
ldx [%o1 + 0x38], %g2
|
|
ldx [%o1 + 0x40], %g3
|
|
ldx [%o1 + 0x48], %g4
|
|
ldx [%o1 + 0x50], %g5
|
|
ldx [%o1 + 0x58], %g6
|
|
ldx [%o1 + 0x60], %g7
|
|
|
|
wrpr %o2, %pstate
|
|
mov %o1, %g1
|
|
|
|
RESTORE_CPU_STATE(itlb)
|
|
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g1
|
|
add %g1, CONTEXT_STATE_SIZE, %g1
|
|
stx %g1, [%g7]
|
|
|
|
retry
|
|
|
|
|
|
.globl prom_debug_handler
|
|
|
|
prom_debug:
|
|
|
|
/* Make sure all windows are on the stack */
|
|
flushw
|
|
|
|
rdpr %tl, %g7
|
|
rdpr %tpc, %g6
|
|
rdpr %tnpc, %g5
|
|
|
|
/* Save CPU state to stack */
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g1
|
|
add %g1, -CONTEXT_STATE_SIZE, %g1
|
|
stx %g1, [%g7]
|
|
|
|
SAVE_CPU_STATE(prom_debug)
|
|
|
|
RESET_CPU_WINDOW_STATE(prom_debug)
|
|
|
|
/* Switch to ordinary globals, saving to context */
|
|
mov %g1, %o1
|
|
rdpr %pstate, %o2
|
|
andn %o2, PSTATE_AG, %o2
|
|
wrpr %o2, %pstate
|
|
|
|
stx %g1, [%o1 + 0x30]
|
|
stx %g2, [%o1 + 0x38]
|
|
stx %g3, [%o1 + 0x40]
|
|
stx %g4, [%o1 + 0x48]
|
|
stx %g5, [%o1 + 0x50]
|
|
stx %g6, [%o1 + 0x58]
|
|
stx %g7, [%o1 + 0x60]
|
|
|
|
/* Copy context back to %g1 */
|
|
mov %o1, %g1
|
|
|
|
/* Update __context to point to saved area */
|
|
setx __context, %g6, %g7
|
|
ldx [%g7], %g3
|
|
setx debug_context, %g4, %g5
|
|
stx %g3, [%g5]
|
|
stx %g1, [%g7]
|
|
|
|
/* Switch to TLB locked OpenBIOS stack space (note we add an additional 192 bytes required for
|
|
gcc to save its arguments when building with -O0) */
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g6
|
|
setx CONTEXT_STACK_SIZE, %g4, %g5
|
|
sub %g6, %g5, %g6
|
|
stx %g6, [%g7]
|
|
|
|
setx - 2047 - 192, %g6, %g7
|
|
add %g1, %g7, %g7
|
|
mov %g7, %sp
|
|
|
|
/* Enable interrupts for window spill/fill traps */
|
|
rdpr %pstate, %g7
|
|
or %g7, PSTATE_IE, %g7
|
|
wrpr %g7, %pstate
|
|
|
|
call prom_debug_handler
|
|
nop
|
|
|
|
/* Disable interrupts */
|
|
rdpr %pstate, %g7
|
|
andn %g7, PSTATE_IE, %g7
|
|
wrpr %g7, %pstate
|
|
|
|
/* Restore CPU state from stack */
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g1
|
|
setx CONTEXT_STACK_SIZE, %g4, %g5
|
|
add %g1, %g5, %g1
|
|
stx %g1, [%g7]
|
|
|
|
/* Restore ordinary globals, switch back to alternate globals */
|
|
mov %g1, %o1
|
|
rdpr %pstate, %o2
|
|
or %o2, PSTATE_AG, %o2
|
|
|
|
ldx [%o1 + 0x30], %g1
|
|
ldx [%o1 + 0x38], %g2
|
|
ldx [%o1 + 0x40], %g3
|
|
ldx [%o1 + 0x48], %g4
|
|
ldx [%o1 + 0x50], %g5
|
|
ldx [%o1 + 0x58], %g6
|
|
ldx [%o1 + 0x60], %g7
|
|
|
|
wrpr %o2, %pstate
|
|
mov %o1, %g1
|
|
|
|
RESTORE_CPU_STATE(prom_debug)
|
|
|
|
/* Restore __context */
|
|
setx debug_context, %g4, %g5
|
|
ldx [%g5], %g3
|
|
setx __context, %g6, %g7
|
|
stx %g3, [%g7]
|
|
|
|
setx _fcstack_ptr, %g6, %g7
|
|
ldx [%g7], %g1
|
|
add %g1, CONTEXT_STATE_SIZE, %g1
|
|
stx %g1, [%g7]
|
|
|
|
done
|
|
|
|
|
|
softint_irq_tl1:
|
|
softint_irq:
|
|
mov 1, %g2
|
|
/* clear tick interrupt */
|
|
wr %g2, 0x0, %clear_softint
|
|
sll %g2, %g1, %g2
|
|
sra %g2, 0, %g2
|
|
/* clear softint interrupt */
|
|
wr %g2, 0x0, %clear_softint
|
|
|
|
setx TICK_INT_DIS, %g2, %g1
|
|
rd %tick, %g2
|
|
and %g1, %g2, %g1
|
|
brnz,pn %g1, tick_compare_disabled
|
|
nop
|
|
|
|
/* update tick value if pointer set */
|
|
setx obp_ticks_pointer, %g3, %g1
|
|
ldx [%g1], %g3
|
|
brz %g3, tick_rearm
|
|
nop
|
|
|
|
ldx [%g3], %g1
|
|
add %g1, 10, %g1 ! 100Hz = 10ms
|
|
stx %g1, [%g3]
|
|
|
|
tick_rearm:
|
|
set TICK_INTERVAL, %g1
|
|
add %g1, %g2, %g1
|
|
wr %g1, 0, %tick_cmpr
|
|
tick_compare_disabled:
|
|
retry
|
|
|
|
handler_irq:
|
|
__divide_error:
|
|
bug:
|
|
/* Dump the exception and its context */
|
|
! Set up CPU state
|
|
! Don't change the global register set or we lose %g1 (exception level)
|
|
rdpr %pstate, %g2
|
|
or %g2, PSTATE_PRIV, %g2
|
|
wrpr %g2, %pstate
|
|
wr %g0, 0, %fprs
|
|
|
|
! Jump to ROM ...
|
|
setx _start, %g2, %g3
|
|
setx highmem, %g2, %g4
|
|
sub %g4, %g3, %g4
|
|
setx PROM_ADDR, %g2, %g3
|
|
add %g4, %g3, %g3
|
|
jmp %g3
|
|
! ... while disabling I/D MMUs and caches
|
|
stxa %g0, [%g0] ASI_LSU_CONTROL
|
|
|
|
highmem:
|
|
! Extract NWINDOWS from %ver
|
|
rdpr %ver, %g2
|
|
and %g2, 0xf, %g2
|
|
wrpr %g2, 0, %cleanwin
|
|
wrpr %g2, 0, %cansave
|
|
wrpr %g0, 0, %canrestore
|
|
wrpr %g0, 0, %otherwin
|
|
wrpr %g0, 0, %wstate
|
|
|
|
b dump_exception
|
|
nop
|
|
|
|
outstr:
|
|
/* void outstr (unsigned long port, const unsigned char *str);
|
|
* Writes a string on an IO port.
|
|
*/
|
|
1: ldub [%o1], %o3
|
|
cmp %o3, 0
|
|
be 2f
|
|
nop
|
|
stba %o3, [%o0] ASI_BP
|
|
b 1b
|
|
inc %o1
|
|
2: retl
|
|
nop
|
|
|
|
outdigit:
|
|
/* void outdigit (unsigned long port, uint8_t digit);
|
|
* Dumps a single digit on serial port.
|
|
*/
|
|
add %o1, '0', %o1
|
|
retl
|
|
stba %o1, [%o0] ASI_BP
|
|
|
|
outhex:
|
|
/* void outhex (unsigned long port, uint64_t value);
|
|
* Dumps a 64 bits hex number on serial port
|
|
*/
|
|
mov %o1, %o2
|
|
set 60, %o3
|
|
srlx %o2, %o3, %o1
|
|
1: and %o1, 0xf, %o1
|
|
cmp %o1, 9
|
|
bgt 2f
|
|
nop
|
|
b 3f
|
|
add %o1, '0', %o1
|
|
2: add %o1, 'a' - 10, %o1
|
|
3: stba %o1, [%o0] ASI_BP
|
|
subcc %o3, 4, %o3
|
|
bge 1b
|
|
srlx %o2, %o3, %o1
|
|
retl
|
|
nop
|
|
|
|
/* void dump_exception ();
|
|
*
|
|
* Dump a message when catching an exception
|
|
*/
|
|
dump_exception:
|
|
setx SER_ADDR, %o3, %o0
|
|
set _start, %g3
|
|
set (_BUG_message_0), %o1
|
|
sub %o1, %g3, %g4
|
|
setx PROM_ADDR, %g2, %g3
|
|
add %g4, %g3, %g3
|
|
call outstr
|
|
mov %g3, %o1
|
|
|
|
call outhex
|
|
mov %g1, %o1
|
|
|
|
call outstr
|
|
add %g3, (_BUG_message_1 - _BUG_message_0), %o1
|
|
|
|
call outhex
|
|
rdpr %tpc, %o1
|
|
|
|
call outstr
|
|
add %g3, (_BUG_message_2 - _BUG_message_0), %o1
|
|
|
|
call outhex
|
|
rdpr %tnpc, %o1
|
|
|
|
call outstr
|
|
add %g3, (_BUG_message_3 - _BUG_message_0), %o1
|
|
|
|
_forever:
|
|
/* Loop forever */
|
|
b _forever ;
|
|
nop
|
|
|
|
.section .rodata
|
|
_BUG_message_0:
|
|
.string "Unhandled Exception 0x"
|
|
_BUG_message_1:
|
|
.string "\nPC = 0x"
|
|
_BUG_message_2:
|
|
.string " NPC = 0x"
|
|
_BUG_message_3:
|
|
.string "\nStopping execution\n"
|