272 lines
6 KiB
C
272 lines
6 KiB
C
/**
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** Proll (PROM replacement)
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** iommu.c: Functions for DVMA management.
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** Copyright 1999 Pete Zaitcev
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** This code is licensed under GNU General Public License.
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**/
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#include "config.h"
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#include "libopenbios/bindings.h"
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#include "libopenbios/ofmem.h"
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#include "drivers/drivers.h"
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#include "iommu.h"
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#include "arch/sparc32/ofmem_sparc32.h"
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#include "arch/sparc32/asi.h"
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#include "arch/sparc32/pgtsrmmu.h"
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#ifdef CONFIG_DEBUG_IOMMU
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#define DPRINTF(fmt, args...) \
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do { printk(fmt , ##args); } while (0)
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#else
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#define DPRINTF(fmt, args...)
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#endif
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/*
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* IOMMU parameters
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*/
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struct iommu {
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struct iommu_regs *regs;
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unsigned int *page_table;
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unsigned long plow; /* Base bus address */
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unsigned long pphys; /* Base phys address */
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};
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static struct iommu ciommu;
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static void
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iommu_invalidate(struct iommu_regs *iregs)
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{
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iregs->tlbflush = 0;
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}
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/*
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* XXX This is a problematic interface. We alloc _memory_ which is uncached.
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* So if we ever reuse allocations somebody is going to get uncached pages.
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* Returned address is always aligned by page.
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* BTW, we were not going to give away anonymous storage, were we not?
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*/
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void *
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dvma_alloc(int size)
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{
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void *va;
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unsigned int pa, iova;
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unsigned int npages;
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unsigned int mva, mpa;
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unsigned int i;
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unsigned int *iopte;
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struct iommu *t = &ciommu;
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npages = (size + (PAGE_SIZE-1)) / PAGE_SIZE;
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iova = (unsigned int)mem_alloc(&cdvmem, npages * PAGE_SIZE, PAGE_SIZE);
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if (iova == 0)
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return NULL;
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pa = t->pphys + (iova - t->plow);
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va = (void *)pa2va((unsigned long)pa);
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/*
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* Change page attributes in MMU to uncached.
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*/
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mva = (unsigned int) va;
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mpa = (unsigned int) pa;
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ofmem_arch_map_pages(mpa, mva, npages * PAGE_SIZE, ofmem_arch_io_translation_mode(mpa));
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/*
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* Map into IOMMU page table.
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*/
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mpa = (unsigned int) pa;
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iopte = &t->page_table[(iova - t->plow) / PAGE_SIZE];
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for (i = 0; i < npages; i++) {
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*iopte++ = MKIOPTE(mpa);
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mpa += PAGE_SIZE;
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}
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return va;
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}
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void
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dvma_sync(unsigned char *va, int size)
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{
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/* Synchronise the VA address region after DMA */
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unsigned long virt = pointer2cell(va);
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unsigned long page;
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for (page = (unsigned long)virt; page < virt + size; page += PAGE_SIZE) {
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srmmu_flush_tlb_page(page);
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}
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}
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unsigned int
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dvma_map_in(unsigned char *va)
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{
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/* Convert from VA to IOVA */
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unsigned int pa, iova;
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struct iommu *t = &ciommu;
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pa = va2pa((unsigned int)va);
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iova = t->plow + (pa - t->pphys);
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return iova;
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}
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#define DVMA_SIZE 0x4000
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/*
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* Initialize IOMMU
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* This looks like initialization of CPU MMU but
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* the routine is higher in food chain.
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*/
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static struct iommu_regs *
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iommu_init(struct iommu *t, uint64_t base)
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{
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unsigned int *ptab, pva;
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int ptsize;
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#ifdef CONFIG_DEBUG_IOMMU
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unsigned int impl, vers;
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#endif
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unsigned int tmp;
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struct iommu_regs *regs;
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int ret;
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unsigned long vasize;
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regs = (struct iommu_regs *)ofmem_map_io(base, IOMMU_REGS);
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if (regs == NULL) {
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DPRINTF("Cannot map IOMMU\n");
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for (;;) { }
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}
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t->regs = regs;
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#ifdef CONFIG_DEBUG_IOMMU
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impl = (regs->control & IOMMU_CTRL_IMPL) >> 28;
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vers = (regs->control & IOMMU_CTRL_VERS) >> 24;
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#endif
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tmp = regs->control;
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tmp &= ~(IOMMU_CTRL_RNGE);
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tmp |= (IOMMU_RNGE_32MB | IOMMU_CTRL_ENAB);
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t->plow = 0xfe000000; /* End - 32 MB */
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/* Size of VA region that we manage */
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vasize = 0x2000000; /* 32 MB */
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regs->control = tmp;
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iommu_invalidate(regs);
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/* Allocate IOMMU page table */
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/* Tremendous alignment causes great waste... */
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ptsize = (vasize / PAGE_SIZE) * sizeof(int);
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ret = ofmem_posix_memalign((void *)&ptab, ptsize, ptsize);
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if (ret != 0) {
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DPRINTF("Cannot allocate IOMMU table [0x%x]\n", ptsize);
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for (;;) { }
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}
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t->page_table = ptab;
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/* flush_cache_all(); */
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/** flush_tlb_all(); **/
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tmp = (unsigned int)va2pa((unsigned long)ptab);
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regs->base = tmp >> 4;
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iommu_invalidate(regs);
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DPRINTF("IOMMU: impl %d vers %d page table at 0x%p (pa 0x%x) of size %d bytes\n",
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impl, vers, t->page_table, tmp, ptsize);
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mem_init(&cdvmem, (char*)t->plow, (char *)(t->plow + DVMA_SIZE));
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ret = ofmem_posix_memalign((void *)&pva, DVMA_SIZE, PAGE_SIZE);
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if (ret != 0) {
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DPRINTF("Cannot allocate IOMMU phys size [0x%x]\n", DVMA_SIZE);
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for (;;) { }
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}
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t->pphys = va2pa(pva);
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return regs;
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}
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/* ( addr.lo addr.hi size -- virt ) */
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static void
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ob_iommu_map_in(void)
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{
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phys_addr_t phys;
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ucell size, virt;
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size = POP();
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phys = POP();
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phys = (phys << 32) + POP();
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virt = ofmem_map_io(phys, size);
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PUSH(virt);
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}
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/* ( virt size ) */
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static void
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ob_iommu_map_out(void)
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{
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ucell size = POP();
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ucell virt = POP();
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ofmem_release_io(virt, size);
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}
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static void
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ob_iommu_dma_alloc(void)
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{
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call_parent_method("dma-alloc");
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}
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static void
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ob_iommu_dma_free(void)
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{
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call_parent_method("dma-free");
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}
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static void
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ob_iommu_dma_map_in(void)
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{
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call_parent_method("dma-map-in");
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}
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static void
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ob_iommu_dma_map_out(void)
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{
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call_parent_method("dma-map-out");
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}
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static void
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ob_iommu_dma_sync(void)
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{
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call_parent_method("dma-sync");
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}
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void
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ob_init_iommu(uint64_t base)
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{
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struct iommu_regs *regs;
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regs = iommu_init(&ciommu, base);
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push_str("/iommu");
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fword("find-device");
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PUSH((unsigned long)regs);
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fword("encode-int");
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push_str("address");
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fword("property");
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PUSH(base >> 32);
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fword("encode-int");
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PUSH(base & 0xffffffff);
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fword("encode-int");
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fword("encode+");
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PUSH(IOMMU_REGS);
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fword("encode-int");
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fword("encode+");
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push_str("reg");
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fword("property");
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bind_func("map-in", ob_iommu_map_in);
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bind_func("map-out", ob_iommu_map_out);
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bind_func("dma-alloc", ob_iommu_dma_alloc);
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bind_func("dma-free", ob_iommu_dma_free);
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bind_func("dma-map-in", ob_iommu_dma_map_in);
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bind_func("dma-map-out", ob_iommu_dma_map_out);
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bind_func("dma-sync", ob_iommu_dma_sync);
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}
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