165 lines
5.3 KiB
ReStructuredText
165 lines
5.3 KiB
ReStructuredText
skiboot-5.2.1
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=============
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skiboot-5.2.1 was released on Wednesday April 27th, 2016.
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skiboot-5.2.1 is the second stable release of skiboot 5.2, the new stable
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release of skiboot, which will take over from the 5.1.x series which was
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first released August 17th, 2015.
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skiboot-5.2.1 contains all bug fixes as of skiboot-5.1.15.
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This is the second release that will follow the (now documented) Skiboot
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stable rules - see :ref:`stable-rules`.
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Changes
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-------
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Over skiboot-5.2.0, the following fixes are included:
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pflash
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^^^^^^
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- Allow building under yocto.
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Makefile fixes to enable building as part of an OpenBMC build.
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Garrison platform
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^^^^^^^^^^^^^^^^^
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- Add PCIe and NPU slot location names
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- hw/npu.c: Add ibm, npu-index property to npu device tree
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- hmi: Add handling for NPU checkstops
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PHB3 (all POWER8 platforms)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^
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- hw/phb3: Ensure PQ bits are cleared in the IVC when masking IRQ
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When we mask an interrupt, we may race with another interrupt coming
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in from the hardware. If this occurs, the P and/or Q bit may end up
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being set but we never EOI/clear them. This could result in a lost
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interrupt or the next interrupt that comes in after re-enabling never
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being presented.
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This fixes a bug seen with some CAPI workloads which have lots of
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interrupt masking at the same time as high interrupt load. The fix is
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not specific to CAPI though.
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- hw/phb3: Fix potential race in EOI
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When we EOI we need to clear the present (P) bit in the Interrupt
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Vector Cache (IVC). We must clear P ensuring that any additional
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interrupts that come in aren't lost while also maintaining coherency
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with the Interrupt Vector Table (IVT).
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To do this, the hardware provides a conditional update bit in the
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IVC. This bit ensures that generation counts between the IVT and the
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IVC updates are synchronised.
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Unfortunately we never set this the bit to conditionally update the P
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bit in the IVC based on the generation count. Also, we didn't set
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what we wanted the new generation count to be if the update was
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successful.
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FSP platforms
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^^^^^^^^^^^^^
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- OPAL:Handle mbox response with bad status:0x24 during FSP termination
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OPAL committed a predictive log with SRC BB822411 in some situations.
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Generic
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^^^^^^^
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- hmi: Fix a bug where partial hmi event was reported to host.
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This bug fix ensures the CPU PIR is reported correctly: ::
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[ 305.628283] Fatal Hypervisor Maintenance interrupt [Not recovered]
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[ 305.628341] Error detail: Malfunction Alert
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[ 305.628388] HMER: 8040000000000000
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- [ 305.628423] CPU PIR: 00000000
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+ [ 200.123021] CPU PIR: 000008e8
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[ 305.628458] [Unit: VSU] Logic core check stop
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- xscom: Return OPAL_WRONG_STATE on XSCOM ops if CPU is asleep
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Contributors
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------------
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Processed 15 csets from 7 developers
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A total of 436 lines added, 59 removed (delta 377)
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Developers with the most changesets
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============================ ==========
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============================ ==========
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Russell Currey 7 (46.7%)
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Alistair Popple 2 (13.3%)
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Michael Neuling 2 (13.3%)
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Patrick Williams 1 (6.7%)
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Stewart Smith 1 (6.7%)
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Mamatha 1 (6.7%)
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Mahesh Salgaonkar 1 (6.7%)
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============================ ==========
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Developers with the most changed lines
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========================== ============
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========================== ============
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Alistair Popple 215 (48.3%)
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Russell Currey 140 (31.5%)
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Michael Neuling 55 (12.4%)
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Mamatha 15 (3.4%)
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Patrick Williams 9 (2.0%)
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Mahesh Salgaonkar 8 (1.8%)
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Stewart Smith 3 (0.7%)
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========================== ============
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Developers with the most lines removed
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========================== ============
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========================== ============
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Patrick Williams 5 (8.5%)
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========================== ============
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Developers with the most signoffs (total 30)
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========================== ============
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========================== ============
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Stewart Smith 15 (50.0%)
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Russell Currey 7 (23.3%)
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Michael Neuling 2 (6.7%)
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Alistair Popple 2 (6.7%)
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Patrick Williams 1 (3.3%)
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Oliver O'Halloran 1 (3.3%)
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Mahesh Salgaonkar 1 (3.3%)
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Mamatha 1 (3.3%)
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========================== ============
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Developers with the most reviews (total 11)
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========================== ============
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========================== ============
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Alistair Popple 5 (45.5%)
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Andrew Donnellan 3 (27.3%)
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Mahesh Salgaonkar 2 (18.2%)
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Joel Stanley 1 (9.1%)
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========================== ============
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Developers with the most Acked-by (total 1)
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========================== ============
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========================== ============
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Alistair Popple 1 (100.0%)
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========================== ============
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Developers with the most test credits (total 3)
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========================== ============
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========================== ============
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Andrew Donnellan 2 (66.7%)
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Vaibhav Jain 1 (33.3%)
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========================== ============
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Developers who received the most tested-by credits (total 3)
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========================== ============
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========================== ============
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Michael Neuling 3 (100.0%)
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========================== ============
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