134 lines
3.1 KiB
C
134 lines
3.1 KiB
C
/* Copyright 2013-2015 IBM Corp.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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* implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <skiboot.h>
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#include <xscom.h>
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#include <io.h>
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#include <cpu.h>
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#include <nx.h>
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#include <chip.h>
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#include <xscom-p9-regs.h>
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#include <phys-map.h>
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#include <vas.h>
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#include <p9_stop_api.H>
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static void p9_darn_init(void)
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{
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struct dt_node *nx;
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struct proc_chip *chip;
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struct cpu_thread *c;
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uint64_t bar, default_bar;
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if (chip_quirk(QUIRK_NO_RNG))
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return;
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/*
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* To allow the DARN instruction to function there must be at least
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* one NX available in the system. Otherwise using DARN will result
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* in a checkstop. I suppose we could mask the FIR...
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*/
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dt_for_each_compatible(dt_root, nx, "ibm,power9-nx")
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break;
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assert(nx);
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phys_map_get(dt_get_chip_id(nx), NX_RNG, 0, &default_bar, NULL);
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for_each_chip(chip) {
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/* is this NX enabled? */
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xscom_read(chip->id, P9X_NX_MMIO_BAR, &bar);
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if (!(bar & ~P9X_NX_MMIO_BAR_EN))
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bar = default_bar;
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for_each_available_core_in_chip(c, chip->id) {
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uint64_t addr;
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addr = XSCOM_ADDR_P9_EX(pir_to_core_id(c->pir),
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P9X_EX_NCU_DARN_BAR);
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xscom_write(chip->id, addr,
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bar | P9X_EX_NCU_DARN_BAR_EN);
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}
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}
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}
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void nx_p9_rng_late_init(void)
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{
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struct cpu_thread *c;
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uint64_t rc;
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if (proc_gen != proc_gen_p9)
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return;
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if (chip_quirk(QUIRK_NO_RNG))
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return;
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prlog(PR_INFO, "SLW: Configuring self-restore for P9X_EX_NCU_DARN_BAR\n");
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for_each_present_cpu(c) {
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if(cpu_is_thread0(c)) {
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struct proc_chip *chip = get_chip(c->chip_id);
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uint64_t addr, bar;
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phys_map_get(chip->id, NX_RNG, 0, &bar, NULL);
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addr = XSCOM_ADDR_P9_EX(pir_to_core_id(c->pir),
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P9X_EX_NCU_DARN_BAR);
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/* Bail out if wakeup engine has already failed */
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if ( wakeup_engine_state != WAKEUP_ENGINE_PRESENT) {
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prlog(PR_ERR,"DARN BAR p9_stop_api fail detected\n");
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break;
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}
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rc = p9_stop_save_scom((void *)chip->homer_base,
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addr, bar | P9X_EX_NCU_DARN_BAR_EN,
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P9_STOP_SCOM_REPLACE,
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P9_STOP_SECTION_EQ_SCOM);
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if (rc) {
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prlog(PR_ERR,
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"p9_stop_api for DARN_BAR failed rc= %lld",
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rc);
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prlog(PR_ERR, "Disabling deep stop states\n");
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wakeup_engine_state = WAKEUP_ENGINE_FAILED;
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break;
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}
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}
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}
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}
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static void nx_init_one(struct dt_node *node)
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{
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nx_create_rng_node(node);
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if (!vas_nx_enabled())
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return;
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nx_create_crypto_node(node);
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nx_create_compress_node(node);
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}
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void nx_init(void)
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{
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struct dt_node *node;
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dt_for_each_compatible(dt_root, node, "ibm,power-nx") {
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nx_init_one(node);
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}
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dt_for_each_compatible(dt_root, node, "ibm,power9-nx") {
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nx_init_one(node);
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}
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if (proc_gen == proc_gen_p9)
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p9_darn_init();
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}
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