273 lines
8 KiB
C
273 lines
8 KiB
C
/* Copyright 2017 IBM Corp.
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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* implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include <skiboot.h>
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#include <device.h>
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#include <console.h>
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#include <chip.h>
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#include <ipmi.h>
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#include <psi.h>
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#include <npu-regs.h>
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#include <npu2.h>
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#include <pci.h>
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#include <pci-cfg.h>
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#include "astbmc.h"
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/* backplane slots */
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static const struct slot_table_entry hdd_bay_slots[] = {
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SW_PLUGGABLE("hdd0", 0xe),
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SW_PLUGGABLE("hdd1", 0x4),
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SW_PLUGGABLE("hdd2", 0x5),
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SW_PLUGGABLE("hdd3", 0x6),
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SW_PLUGGABLE("hdd4", 0x7),
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SW_PLUGGABLE("hdd5", 0xf),
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SW_PLUGGABLE("hdd6", 0xc),
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SW_PLUGGABLE("hdd7", 0xd),
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SW_PLUGGABLE("hdd8", 0x14),
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SW_PLUGGABLE("hdd9", 0x17),
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SW_PLUGGABLE("hdd10", 0x8),
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SW_PLUGGABLE("hdd11", 0xb),
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SW_PLUGGABLE("hdd12", 0x10),
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SW_PLUGGABLE("hdd13", 0x13),
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SW_PLUGGABLE("hdd14", 0x16),
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SW_PLUGGABLE("hdd15", 0x09),
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SW_PLUGGABLE("hdd16", 0xa),
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SW_PLUGGABLE("hdd17", 0x11),
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SW_PLUGGABLE("hdd18", 0x12),
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SW_PLUGGABLE("hdd19", 0x15),
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{ .etype = st_end },
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};
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static void zaius_get_slot_info(struct phb *phb, struct pci_device *pd)
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{
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const struct slot_table_entry *ent = NULL;
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if (!pd || pd->slot)
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return;
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/*
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* If we find a 9797 switch then assume it's the HDD Rack. This might
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* break if we have another 9797 in the system for some reason. This is
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* a really dumb hack, but until we get query the BMC about whether we
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* have a HDD rack or not we don't have much of a choice.
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*/
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if (pd->dev_type == PCIE_TYPE_SWITCH_DNPORT && pd->vdid == 0x979710b5)
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for (ent = hdd_bay_slots; ent->etype != st_end; ent++)
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if (ent->location == (pd->bdfn & 0xff))
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break;
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if (ent)
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slot_table_add_slot_info(pd, ent);
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else
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slot_table_get_slot_info(phb, pd);
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}
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static const struct platform_ocapi zaius_ocapi = {
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.i2c_engine = 1,
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.i2c_port = 4,
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.i2c_reset_addr = 0x20,
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.i2c_reset_brick2 = (1 << 1),
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.i2c_reset_brick3 = (1 << 6),
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.i2c_reset_brick4 = 0, /* unused */
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.i2c_reset_brick5 = 0, /* unused */
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.i2c_presence_addr = 0x20,
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.i2c_presence_brick2 = (1 << 2), /* bottom connector */
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.i2c_presence_brick3 = (1 << 7), /* top connector */
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.i2c_presence_brick4 = 0, /* unused */
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.i2c_presence_brick5 = 0, /* unused */
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.odl_phy_swap = true,
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};
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ST_PLUGGABLE(pe0_slot, "PE0");
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ST_PLUGGABLE(pe1_slot, "PE1");
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ST_PLUGGABLE(pe2_slot, "PE2");
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ST_PLUGGABLE(pe3_slot, "PE3");
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ST_PLUGGABLE(pe4_slot, "PE4");
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ST_PLUGGABLE(mezz_slot_a, "MEZZ A");
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ST_PLUGGABLE(mezz_slot_b, "MEZZ B");
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static const struct slot_table_entry zaius_phb_table[] = {
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ST_PHB_ENTRY(0, 0, pe1_slot), /* PE1 is on PHB0 */
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ST_PHB_ENTRY(0, 1, pe0_slot), /* PE0 is on PHB1 */
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/* ST_PHB_ENTRY(0, 2, builtin_sata), */
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ST_PHB_ENTRY(0, 3, pe2_slot), /* un-bifurcated 16x */
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ST_PHB_ENTRY(8, 0, pe3_slot),
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ST_PHB_ENTRY(8, 1, pe4_slot),
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/* ST_PHB_ENTRY(8, 2, builtin_usb), */
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/*
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* The MEZZ slot is kind of weird. Conceptually it's a 16x slot, but
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* physically it's two separate 8x slots (MEZZ A and B) which can be
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* used as a 16x slot if the PHB is un-bifurcated. The BMC detects what
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* to do based on the the presence detect bits of the MEZZ slots to
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* configure the correct bifurcation at IPL time.
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*
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* There's some additional weirdness too since MEZZ B can be used to
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* access the built-in BCM5719 and the BMC PCIe interface via a special
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* module that bridges MEZZ B to an adjacent connector.
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*
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* We should probably detect the bifurcation setting and set the slot
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* names appropriately, but this will do for now.
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*/
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ST_PHB_ENTRY(8, 3, mezz_slot_a),
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ST_PHB_ENTRY(8, 4, mezz_slot_b),
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/* ST_PHB_ENTRY(8, 5, builtin_bmc), */
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{ .etype = st_end },
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};
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#define NPU_BASE 0x5011000
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#define NPU_SIZE 0x2c
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#define NPU_INDIRECT0 0x8000000009010c3fUL /* OB0 - no OB3 on Zaius */
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/* OpenCAPI only */
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static void create_link(struct dt_node *npu, int group, int index)
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{
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struct dt_node *link;
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uint32_t lane_mask;
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char namebuf[32];
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snprintf(namebuf, sizeof(namebuf), "link@%x", index);
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link = dt_new(npu, namebuf);
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dt_add_property_string(link, "compatible", "ibm,npu-link");
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dt_add_property_cells(link, "ibm,npu-link-index", index);
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switch (index) {
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case 2:
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lane_mask = 0xf1e000; /* 0-3, 7-10 */
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break;
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case 3:
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lane_mask = 0x00078f; /* 13-16, 20-23 */
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break;
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default:
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assert(0);
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}
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dt_add_property_u64s(link, "ibm,npu-phy", NPU_INDIRECT0);
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dt_add_property_cells(link, "ibm,npu-lane-mask", lane_mask);
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dt_add_property_cells(link, "ibm,npu-group-id", group);
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dt_add_property_u64s(link, "ibm,link-speed", 25000000000ul);
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}
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/* FIXME: Get rid of this after we get NPU information properly via HDAT/MRW */
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static void zaius_create_npu(void)
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{
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struct dt_node *xscom, *npu;
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int npu_index = 0;
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int phb_index = 7;
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char namebuf[32];
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/* Abort if there's already an NPU in the device tree */
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if (dt_find_compatible_node(dt_root, NULL, "ibm,power9-npu"))
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return;
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prlog(PR_DEBUG, "OCAPI: Adding NPU device nodes\n");
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dt_for_each_compatible(dt_root, xscom, "ibm,xscom") {
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snprintf(namebuf, sizeof(namebuf), "npu@%x", NPU_BASE);
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npu = dt_new(xscom, namebuf);
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dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE);
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dt_add_property_strings(npu, "compatible", "ibm,power9-npu");
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dt_add_property_cells(npu, "ibm,npu-index", npu_index++);
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dt_add_property_cells(npu, "ibm,phb-index", phb_index++);
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dt_add_property_cells(npu, "ibm,npu-links", 2);
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create_link(npu, 1, 2);
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create_link(npu, 2, 3);
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}
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}
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/* FIXME: Get rid of this after we get NPU information properly via HDAT/MRW */
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static void zaius_create_ocapi_i2c_bus(void)
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{
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struct dt_node *xscom, *i2cm, *i2c_bus;
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prlog(PR_DEBUG, "OCAPI: Adding I2C bus device node for OCAPI reset\n");
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dt_for_each_compatible(dt_root, xscom, "ibm,xscom") {
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i2cm = dt_find_by_name(xscom, "i2cm@a1000");
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if (!i2cm) {
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prlog(PR_ERR, "OCAPI: Failed to add I2C bus device node\n");
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continue;
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}
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if (dt_find_by_name(i2cm, "i2c-bus@4"))
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continue;
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i2c_bus = dt_new_addr(i2cm, "i2c-bus", 4);
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dt_add_property_cells(i2c_bus, "reg", 4);
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dt_add_property_cells(i2c_bus, "bus-frequency", 0x61a80);
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dt_add_property_strings(i2c_bus, "compatible",
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"ibm,opal-i2c", "ibm,power8-i2c-port",
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"ibm,power9-i2c-port");
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}
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}
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static bool zaius_probe(void)
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{
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if (!dt_node_is_compatible(dt_root, "ingrasys,zaius"))
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return false;
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/* Lot of common early inits here */
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astbmc_early_init();
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/* Setup UART for direct use by Linux */
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uart_set_console_policy(UART_CONSOLE_OS);
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zaius_create_npu();
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zaius_create_ocapi_i2c_bus();
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slot_table_init(zaius_phb_table);
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return true;
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}
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/* Extracted from zaius1-bmc */
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static const struct bmc_hw_config bmc_hw_zaius = {
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.scu_revision_id = 0x04030303,
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.mcr_configuration = 0x11000FD7,
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.mcr_scu_mpll = 0x000071C1,
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.mcr_scu_strap = 0x00000000,
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};
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static const struct bmc_sw_config bmc_sw_openbmc = {
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.ipmi_oem_partial_add_esel = IPMI_CODE(0x3a, 0xf0),
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.ipmi_oem_hiomap_cmd = IPMI_CODE(0x3a, 0x5a),
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};
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static const struct bmc_platform bmc_zaius_openbmc = {
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.name = "zaius:openbmc",
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.hw = &bmc_hw_zaius,
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.sw = &bmc_sw_openbmc,
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};
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DECLARE_PLATFORM(zaius) = {
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.name = "Zaius",
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.probe = zaius_probe,
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.init = astbmc_init,
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.start_preload_resource = flash_start_preload_resource,
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.resource_loaded = flash_resource_loaded,
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.bmc = &bmc_zaius_openbmc,
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.pci_get_slot_info = zaius_get_slot_info,
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.pci_probe_complete = check_all_slot_table,
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.cec_power_down = astbmc_ipmi_power_down,
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.cec_reboot = astbmc_ipmi_reboot,
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.elog_commit = ipmi_elog_commit,
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.exit = ipmi_wdt_final_reset,
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.terminate = ipmi_terminate,
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.ocapi = &zaius_ocapi,
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.npu2_device_detect = npu2_i2c_presence_detect,
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.op_display = op_display_lpc,
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};
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