168 lines
4.8 KiB
Text
168 lines
4.8 KiB
Text
/*
|
|
* Copyright (C) 2016 Amarula Solutions B.V.
|
|
* Copyright (C) 2016 Engicam S.r.l.
|
|
*
|
|
* This file is dual-licensed: you can use it either under the terms
|
|
* of the GPL or the X11 license, at your option. Note that this dual
|
|
* licensing only applies to this file, and not this project as a
|
|
* whole.
|
|
*
|
|
* a) This file is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License
|
|
* version 2 as published by the Free Software Foundation.
|
|
*
|
|
* This file is distributed in the hope that it will be useful
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* Or, alternatively
|
|
*
|
|
* b) Permission is hereby granted, free of charge, to any person
|
|
* obtaining a copy of this software and associated documentation
|
|
* files (the "Software"), to deal in the Software without
|
|
* restriction, including without limitation the rights to use
|
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
|
* sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following
|
|
* conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be
|
|
* included in all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
|
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
|
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
#include "imx6ul.dtsi"
|
|
|
|
/ {
|
|
model = "Engicam GEAM6UL";
|
|
compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
|
|
|
|
memory {
|
|
reg = <0x80000000 0x08000000>;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = &uart1;
|
|
};
|
|
};
|
|
|
|
&fec1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_enet1>;
|
|
phy-mode = "rmii";
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c1 {
|
|
clock-frequency = <100000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c2 {
|
|
clock_frequency = <100000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c2>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc1 {
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
|
|
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
|
|
bus-width = <4>;
|
|
cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
|
|
no-1-8-v;
|
|
status = "okay";
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_enet1: enet1grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
|
|
MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
|
|
MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
|
|
MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
|
|
MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
|
|
MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
|
|
MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
|
|
MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
|
|
MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
|
|
MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
|
|
MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
|
|
MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
|
|
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
|
|
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
|
|
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
|
|
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
|
|
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
|
|
fsl,pins = <
|
|
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
|
|
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
|
|
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
|
|
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
|
|
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
|
|
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
|
|
fsl,pins = <
|
|
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
|
|
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
|
|
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
|
|
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
|
|
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
|
|
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
|
|
>;
|
|
};
|
|
};
|