182 lines
3.8 KiB
C
182 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/mach-imx/rdc-sema.h>
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#include <asm/arch/imx-rdc.h>
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#include <linux/errno.h>
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/*
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* Check if the RDC Semaphore is required for this peripheral.
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*/
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static inline int imx_rdc_check_sema_required(int per_id)
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{
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struct rdc_regs *imx_rdc = (struct rdc_regs *)RDC_BASE_ADDR;
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u32 reg;
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reg = readl(&imx_rdc->pdap[per_id]);
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/*
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* No semaphore:
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* Intial value or this peripheral is assigned to only one domain
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*/
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if (!(reg & RDC_PDAP_SREQ_MASK))
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return -ENOENT;
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return 0;
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}
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/*
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* Check the peripheral read / write access permission on Domain [dom_id].
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*/
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int imx_rdc_check_permission(int per_id, int dom_id)
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{
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struct rdc_regs *imx_rdc = (struct rdc_regs *)RDC_BASE_ADDR;
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u32 reg;
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reg = readl(&imx_rdc->pdap[per_id]);
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if (!(reg & RDC_PDAP_DRW_MASK(dom_id)))
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return -EACCES; /*No access*/
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return 0;
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}
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/*
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* Lock up the RDC semaphore for this peripheral if semaphore is required.
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*/
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int imx_rdc_sema_lock(int per_id)
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{
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struct rdc_sema_regs *imx_rdc_sema;
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int ret;
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u8 reg;
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ret = imx_rdc_check_sema_required(per_id);
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if (ret)
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return ret;
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if (per_id < SEMA_GATES_NUM)
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imx_rdc_sema = (struct rdc_sema_regs *)SEMAPHORE1_BASE_ADDR;
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else
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imx_rdc_sema = (struct rdc_sema_regs *)SEMAPHORE2_BASE_ADDR;
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do {
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writeb(RDC_SEMA_PROC_ID,
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&imx_rdc_sema->gate[per_id % SEMA_GATES_NUM]);
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reg = readb(&imx_rdc_sema->gate[per_id % SEMA_GATES_NUM]);
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if ((reg & RDC_SEMA_GATE_GTFSM_MASK) == RDC_SEMA_PROC_ID)
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break; /* Get the Semaphore*/
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} while (1);
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return 0;
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}
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/*
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* Unlock the RDC semaphore for this peripheral if main CPU is the
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* semaphore owner.
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*/
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int imx_rdc_sema_unlock(int per_id)
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{
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struct rdc_sema_regs *imx_rdc_sema;
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int ret;
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u8 reg;
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ret = imx_rdc_check_sema_required(per_id);
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if (ret)
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return ret;
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if (per_id < SEMA_GATES_NUM)
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imx_rdc_sema = (struct rdc_sema_regs *)SEMAPHORE1_BASE_ADDR;
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else
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imx_rdc_sema = (struct rdc_sema_regs *)SEMAPHORE2_BASE_ADDR;
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reg = readb(&imx_rdc_sema->gate[per_id % SEMA_GATES_NUM]);
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if ((reg & RDC_SEMA_GATE_GTFSM_MASK) != RDC_SEMA_PROC_ID)
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return -EACCES; /*Not the semaphore owner */
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writeb(0x0, &imx_rdc_sema->gate[per_id % SEMA_GATES_NUM]);
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return 0;
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}
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/*
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* Setup RDC setting for one peripheral
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*/
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int imx_rdc_setup_peri(rdc_peri_cfg_t p)
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{
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struct rdc_regs *imx_rdc = (struct rdc_regs *)RDC_BASE_ADDR;
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u32 reg = 0;
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u32 share_count = 0;
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u32 peri_id = p & RDC_PERI_MASK;
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u32 domain = (p & RDC_DOMAIN_MASK) >> RDC_DOMAIN_SHIFT_BASE;
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/* No domain assigned */
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if (domain == 0)
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return -EINVAL;
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reg |= domain;
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share_count = (domain & 0x3)
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+ ((domain >> 2) & 0x3)
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+ ((domain >> 4) & 0x3)
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+ ((domain >> 6) & 0x3);
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if (share_count > 0x3)
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reg |= RDC_PDAP_SREQ_MASK;
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writel(reg, &imx_rdc->pdap[peri_id]);
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return 0;
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}
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/*
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* Setup RDC settings for multiple peripherals
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*/
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int imx_rdc_setup_peripherals(rdc_peri_cfg_t const *peripherals_list,
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unsigned count)
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{
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rdc_peri_cfg_t const *p = peripherals_list;
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int i, ret;
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for (i = 0; i < count; i++) {
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ret = imx_rdc_setup_peri(*p);
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if (ret)
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return ret;
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p++;
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}
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return 0;
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}
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/*
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* Setup RDC setting for one master
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*/
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int imx_rdc_setup_ma(rdc_ma_cfg_t p)
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{
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struct rdc_regs *imx_rdc = (struct rdc_regs *)RDC_BASE_ADDR;
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u32 master_id = (p & RDC_MASTER_MASK) >> RDC_MASTER_SHIFT;
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u32 domain = (p & RDC_DOMAIN_MASK) >> RDC_DOMAIN_SHIFT_BASE;
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writel((domain & RDC_MDA_DID_MASK), &imx_rdc->mda[master_id]);
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return 0;
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}
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/*
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* Setup RDC settings for multiple masters
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*/
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int imx_rdc_setup_masters(rdc_ma_cfg_t const *masters_list, unsigned count)
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{
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rdc_ma_cfg_t const *p = masters_list;
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int i, ret;
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for (i = 0; i < count; i++) {
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ret = imx_rdc_setup_ma(*p);
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if (ret)
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return ret;
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p++;
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}
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return 0;
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}
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