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dyncom: Make translation-unit functions and variables static

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Lioncash 2015-05-14 11:58:05 -04:00
parent f3c4de4ce4
commit 0530fd2499
1 changed files with 64 additions and 66 deletions
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130
src/core/arm/dyncom/arm_dyncom_interpreter.cpp
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@ -68,6 +68,67 @@ static void remove_exclusive(ARMul_State* state, ARMword addr){
state->exclusive_tag = 0xFFFFFFFF; state->exclusive_tag = 0xFFFFFFFF;
} }
static int CondPassed(ARMul_State* cpu, unsigned int cond) {
#define NFLAG cpu->NFlag
#define ZFLAG cpu->ZFlag
#define CFLAG cpu->CFlag
#define VFLAG cpu->VFlag
int temp = 0;
switch (cond) {
case 0x0:
temp = ZFLAG;
break;
case 0x1: // NE
temp = !ZFLAG;
break;
case 0x2: // CS
temp = CFLAG;
break;
case 0x3: // CC
temp = !CFLAG;
break;
case 0x4: // MI
temp = NFLAG;
break;
case 0x5: // PL
temp = !NFLAG;
break;
case 0x6: // VS
temp = VFLAG;
break;
case 0x7: // VC
temp = !VFLAG;
break;
case 0x8: // HI
temp = (CFLAG && !ZFLAG);
break;
case 0x9: // LS
temp = (!CFLAG || ZFLAG);
break;
case 0xa: // GE
temp = ((!NFLAG && !VFLAG) || (NFLAG && VFLAG));
break;
case 0xb: // LT
temp = ((NFLAG && !VFLAG) || (!NFLAG && VFLAG));
break;
case 0xc: // GT
temp = ((!NFLAG && !VFLAG && !ZFLAG) || (NFLAG && VFLAG && !ZFLAG));
break;
case 0xd: // LE
temp = ((NFLAG && !VFLAG) || (!NFLAG && VFLAG)) || ZFLAG;
break;
case 0xe: // AL
temp = 1;
break;
case 0xf:
temp = 1;
break;
}
return temp;
}
static unsigned int DPO(Immediate)(ARMul_State* cpu, unsigned int sht_oper) { static unsigned int DPO(Immediate)(ARMul_State* cpu, unsigned int sht_oper) {
unsigned int immed_8 = BITS(sht_oper, 0, 7); unsigned int immed_8 = BITS(sht_oper, 0, 7);
unsigned int rotate_imm = BITS(sht_oper, 8, 11); unsigned int rotate_imm = BITS(sht_oper, 8, 11);
@ -230,8 +291,6 @@ struct ldst_inst {
}; };
#define DEBUG_MSG LOG_DEBUG(Core_ARM11, "inst is %x", inst); CITRA_IGNORE_EXIT(0) #define DEBUG_MSG LOG_DEBUG(Core_ARM11, "inst is %x", inst); CITRA_IGNORE_EXIT(0)
int CondPassed(ARMul_State* cpu, unsigned int cond);
#define LnSWoUB(s) glue(LnSWoUB, s) #define LnSWoUB(s) glue(LnSWoUB, s)
#define MLnS(s) glue(MLnS, s) #define MLnS(s) glue(MLnS, s)
#define LdnStM(s) glue(LdnStM, s) #define LdnStM(s) glue(LdnStM, s)
@ -1108,9 +1167,9 @@ struct pkh_inst {
typedef arm_inst * ARM_INST_PTR; typedef arm_inst * ARM_INST_PTR;
#define CACHE_BUFFER_SIZE (64 * 1024 * 2000) #define CACHE_BUFFER_SIZE (64 * 1024 * 2000)
char inst_buf[CACHE_BUFFER_SIZE]; static char inst_buf[CACHE_BUFFER_SIZE];
int top = 0; static int top = 0;
inline void *AllocBuffer(unsigned int size) { static inline void *AllocBuffer(unsigned int size) {
int start = top; int start = top;
top += size; top += size;
if (top > CACHE_BUFFER_SIZE) { if (top > CACHE_BUFFER_SIZE) {
@ -1120,67 +1179,6 @@ inline void *AllocBuffer(unsigned int size) {
return (void *)&inst_buf[start]; return (void *)&inst_buf[start];
} }
int CondPassed(ARMul_State* cpu, unsigned int cond) {
#define NFLAG cpu->NFlag
#define ZFLAG cpu->ZFlag
#define CFLAG cpu->CFlag
#define VFLAG cpu->VFlag
int temp = 0;
switch (cond) {
case 0x0:
temp = ZFLAG;
break;
case 0x1: // NE
temp = !ZFLAG;
break;
case 0x6: // VS
temp = VFLAG;
break;
case 0x7: // VC
temp = !VFLAG;
break;
case 0x4: // MI
temp = NFLAG;
break;
case 0x5: // PL
temp = !NFLAG;
break;
case 0x2: // CS
temp = CFLAG;
break;
case 0x3: // CC
temp = !CFLAG;
break;
case 0x8: // HI
temp = (CFLAG && !ZFLAG);
break;
case 0x9: // LS
temp = (!CFLAG || ZFLAG);
break;
case 0xa: // GE
temp = ((!NFLAG && !VFLAG) || (NFLAG && VFLAG));
break;
case 0xb: // LT
temp = ((NFLAG && !VFLAG) || (!NFLAG && VFLAG));
break;
case 0xc: // GT
temp = ((!NFLAG && !VFLAG && !ZFLAG) || (NFLAG && VFLAG && !ZFLAG));
break;
case 0xd: // LE
temp = ((NFLAG && !VFLAG) || (!NFLAG && VFLAG)) || ZFLAG;
break;
case 0xe: // AL
temp = 1;
break;
case 0xf:
temp = 1;
break;
}
return temp;
}
enum DECODE_STATUS { enum DECODE_STATUS {
DECODE_SUCCESS, DECODE_SUCCESS,
DECODE_FAILURE DECODE_FAILURE