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GPU: Clarify display transfer code.
Also makes the illogical component order more obvious.
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1 changed files with 15 additions and 12 deletions
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@ -157,17 +157,19 @@ inline void Write(u32 addr, const T data) {
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for (int y = 0; y < config.output_height; ++y) {
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// TODO: Why does the register seem to hold twice the framebuffer width?
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for (int x = 0; x < config.output_width / 2; ++x) {
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int source[4] = { 0, 0, 0, 0}; // rgba;
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struct {
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int r, g, b, a;
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} source_color = { 0, 0, 0, 0 };
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switch (config.input_format) {
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case Regs::FramebufferFormat::RGBA8:
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{
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// TODO: Most likely got the component order messed up.
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u8* srcptr = source_pointer + x * 4 + y * config.input_width * 4 / 2;
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source[0] = srcptr[0]; // blue
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source[1] = srcptr[1]; // green
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source[2] = srcptr[2]; // red
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source[3] = srcptr[3]; // alpha
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source_color.r = srcptr[0]; // blue
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source_color.g = srcptr[1]; // green
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source_color.b = srcptr[2]; // red
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source_color.a = srcptr[3]; // alpha
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break;
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}
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@ -181,19 +183,20 @@ inline void Write(u32 addr, const T data) {
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{
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// TODO: Untested
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u8* dstptr = (u32*)(dest_pointer + x * 4 + y * config.output_width * 4);
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dstptr[0] = source[0];
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dstptr[1] = source[1];
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dstptr[2] = source[2];
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dstptr[3] = source[3];
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dstptr[0] = source_color.r;
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dstptr[1] = source_color.g;
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dstptr[2] = source_color.b;
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dstptr[3] = source_color.a;
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break;
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}*/
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case Regs::FramebufferFormat::RGB8:
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{
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// TODO: Most likely got the component order messed up.
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u8* dstptr = dest_pointer + x * 3 + y * config.output_width * 3 / 2;
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dstptr[0] = source[0]; // blue
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dstptr[1] = source[1]; // green
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dstptr[2] = source[2]; // red
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dstptr[0] = source_color.r; // blue
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dstptr[1] = source_color.g; // green
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dstptr[2] = source_color.b; // red
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break;
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}
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