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Merge pull request #293 from lioncash/sops

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armemu: Fix SADD16
This commit is contained in:
bunnei 2014-12-17 14:54:24 -05:00
commit e6f440ea7f
1 changed files with 9 additions and 8 deletions
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17
src/core/arm/interpreter/armemu.cpp
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@ -5811,14 +5811,15 @@ L_stm_s_takeabort:
state->Reg[tar] = ((a1 - a2) & 0xFFFF) | (((b1 - b2) & 0xFFFF) << 0x10); state->Reg[tar] = ((a1 - a2) & 0xFFFF) | (((b1 - b2) & 0xFFFF) << 0x10);
return 1; return 1;
} else if ((instr & 0xFF0) == 0xf10) { //sadd16 } else if ((instr & 0xFF0) == 0xf10) { //sadd16
u8 tar = BITS(12, 15); const u8 rd_idx = BITS(12, 15);
u8 src1 = BITS(16, 19); const u8 rm_idx = BITS(0, 3);
u8 src2 = BITS(0, 3); const u8 rn_idx = BITS(16, 19);
s16 a1 = (state->Reg[src1] & 0xFFFF); const s16 rm_lo = (state->Reg[rm_idx] & 0xFFFF);
s16 a2 = ((state->Reg[src1] >> 0x10) & 0xFFFF); const s16 rm_hi = ((state->Reg[rm_idx] >> 16) & 0xFFFF);
s16 b1 = (state->Reg[src2] & 0xFFFF); const s16 rn_lo = (state->Reg[rn_idx] & 0xFFFF);
s16 b2 = ((state->Reg[src2] >> 0x10) & 0xFFFF); const s16 rn_hi = ((state->Reg[rn_idx] >> 16) & 0xFFFF);
state->Reg[tar] = ((a1 + a2) & 0xFFFF) | (((b1 + b2) & 0xFFFF) << 0x10);
state->Reg[rd_idx] = ((rn_lo + rm_lo) & 0xFFFF) | (((rn_hi + rm_hi) & 0xFFFF) << 16);
return 1; return 1;
} else if ((instr & 0xFF0) == 0xf50) { //ssax } else if ((instr & 0xFF0) == 0xf50) { //ssax
u8 tar = BITS(12, 15); u8 tar = BITS(12, 15);