Commit graph

348 commits

Author SHA1 Message Date
Lioncash
8810dfe1de dyncom: Minor cleanup
Removes some unused macros and cleans up indentation inconsistencies
2015-01-22 09:39:41 -05:00
Lioncash
8c6edc680c dyncom: Clarify precedence for ternary statements 2015-01-19 20:35:55 -05:00
Chin
fa8e6272c8 Cleanup: Logging in Core 2015-01-19 16:01:06 -05:00
Lioncash
a873f157d0 dyncom: Implement missing shifts in ScaledRegisterPostIndexed, etc 2015-01-18 18:32:02 -05:00
Lioncash
8575010a68 dyncom: Handle the ARM A2 encoding of STRT/LDRT
These were also missing the shifted register case.
2015-01-17 13:53:35 -05:00
Lioncash
0a5d450e94 dyncom: Handle the ARM A2 encoding of LDRBT/STRBT. 2015-01-16 21:05:27 -05:00
Lioncash
9288893d29 vfp: Remove dead code 2015-01-12 15:24:57 -05:00
Lioncash
f7770b83d4 dyncom: Fix 32-bit ASR shifts for immediates 2015-01-12 14:15:24 -05:00
Lioncash
e16b35eb53 dyncom: Remove unused flag macros 2015-01-12 12:57:15 -05:00
Lioncash
2843d1b98b dyncom: Get rid of unnecessary outer-scope variables in InterpreterMainLoop 2015-01-12 01:11:46 -05:00
Lioncash
3ace75a49f dyncom: Fix overflow flag setting for ADD/RSB/RSC/SUB/SBC
Also cleans up CMN, and CMP.
2015-01-12 01:03:58 -05:00
Lioncash
9c2c89b7e1 dyncom: Add a helper function for addition with a carry 2015-01-12 00:44:28 -05:00
Lioncash
d2a05bbbc6 dyncom: Fix ADC overflow flag setting 2015-01-11 22:27:09 -05:00
Lioncash
eabfa5cf43 dyncom: Fix conditional execution of MSR 2015-01-11 18:45:45 -05:00
Yuri Kunde Schlesner
7b3452c730 Move ThreadContext to core/core.h and deal with the fallout 2015-01-09 03:51:55 -02:00
Subv
fc842963c8 DynCom: Add a comment to GetTicks. 2015-01-08 19:46:00 -05:00
Subv
620d77b7e3 Timing: Use CoreTiming::GetTicks to keep track of ticks.
This will keep track of idle ticks for us, and fixes some tickcount-related issues
2015-01-08 19:39:14 -05:00
Lioncash
1cef6e92d5 dyncom: Fix UMAAL
These need to be done as a 64-bit operation.
2015-01-08 11:09:21 -05:00
bunnei
4c583732f2 Merge pull request #442 from lioncash/smul
dyncom: Fix SMULWB/SMULWT
2015-01-07 16:49:30 -05:00
Lioncash
df5e0f9f28 dyncom: Fix SMULWB/SMULWT
Wasn't doing proper sign-extension
2015-01-07 16:41:08 -05:00
bunnei
3eca33c6a4 Merge pull request #425 from Subv/coretiming
Ported the CoreTiming namespace from PPSSPP
2015-01-07 15:30:46 -05:00
Subv
9bf82beb4c CoreTiming: Ported the CoreTiming namespace from PPSSPP
Implemented the required calls to make it work.

CoreTiming: Added a new logging class Core_Timing.
2015-01-07 15:08:35 -05:00
bunnei
317fe1e528 Merge pull request #438 from lioncash/swp
dyncom: Fix SWPB
2015-01-07 09:53:29 -05:00
Lioncash
75c211c10f dyncom: Fix SWPB 2015-01-07 09:36:06 -05:00
Lioncash
511e13f3e3 dyncom: Move over SMLALXY 2015-01-07 00:53:56 -05:00
bunnei
89bb0ecbd5 Merge pull request #417 from kevinhartman/exclusive-tag-fix
Added exclusive reservation granule from ARMv7 spec to dyncom...
2015-01-06 12:42:10 -05:00
Kevin Hartman
8132c01830 Added exclusive reservation granule from ARMv7 spec to dyncom to protect LDR/STREX. 2015-01-05 22:29:51 -05:00
Lioncash
f75def619c dyncom: Partially emulate BXJ
Just in case some game studio let the intern write inline assembly or something.
2015-01-05 15:55:09 -05:00
Lioncash
e08a39a2f4 dyncom: Actually set the Q flag for SMLABB/SMLABT/SMLATB/SMLATT
Easy skyeye todo fix.
2015-01-05 10:41:02 -05:00
bunnei
8b1ec1a82a Merge pull request #418 from lioncash/qd
dyncom: Implement QADD/QSUB/QDADD/QDSUB
2015-01-05 09:59:12 -05:00
Lioncash
d00c22c706 dyncom: Implement QADD/QSUB/QDADD/QDSUB 2015-01-05 09:13:41 -05:00
Lioncash
41e1cb12e5 skyeye: Remove duplicate typedefs
citra already has its own typedefs like this.
2015-01-04 12:34:02 -05:00
bunnei
caa6d431ee Merge pull request #398 from lioncash/sm
dyncom: Implement SMLAW
2015-01-03 11:47:01 -05:00
Lioncash
6adc0a4622 dyncom: Implement SMLAW 2015-01-03 03:13:49 -05:00
bunnei
b11518c272 VFP: Minor cleanup, functionally the same. 2015-01-03 01:22:38 -05:00
bunnei
dd21f986b8 Merge pull request #395 from lioncash/rev
dyncom: Implement REVSH
2015-01-02 22:44:39 -05:00
Lioncash
2f19acf064 dyncom: Implement REVSH
Also joins the REV ops into one common place.
2015-01-02 22:40:43 -05:00
Lioncash
e0e54f55d7 dyncom: Implement SMLALD/SMLSLD 2015-01-02 22:08:26 -05:00
bunnei
3e230d6c9e Merge pull request #392 from lioncash/sm
dyncom: Implement SMMLA/SMMUL/SMMLS
2015-01-02 21:47:53 -05:00
Lioncash
64161bcb41 dyncom: Implement SMMLA/SMMUL/SMMLS 2015-01-02 21:40:29 -05:00
bunnei
dd8a57cb80 dyncom: Implemented LDREXD/STREXD/LDREXH/STREXH 2015-01-02 20:51:54 -05:00
bunnei
3b2da87080 Merge pull request #390 from lioncash/wut
dyncom: Remove dead function InterpreterInitInstLength
2015-01-02 20:40:29 -05:00
Lioncash
67187c15a0 dyncom: Remove dead function InterpreterInitInstLength
Technically eliminates two memory leaks as well.
2015-01-02 20:24:00 -05:00
Lioncash
bee4ff8454 armemu: Fix missing Q flag check for SMLSD. 2015-01-02 18:29:36 -05:00
Lioncash
3337b84620 dyncom: Implement SMLAD/SMUAD/SMLSD/SMUSD 2015-01-02 18:29:30 -05:00
Lioncash
48bf0f9996 dyncom: Implement SXTAB16 and SXTB16 2015-01-01 21:59:37 -05:00
bunnei
fa4cc502e7 Merge pull request #379 from lioncash/sh
dyncom: Implement SHADD8/SHADD16/SHSUB8/SHSUB16/SHASX/SHSAX
2015-01-01 20:43:04 -05:00
Lioncash
524da47698 dyncom: Implement SHADD8/SHADD16/SHSUB8/SHSUB16/SHASX/SHSAX 2015-01-01 10:34:20 -05:00
Lioncash
481a6c9652 Fix SADD8/SSUB8 in the armemu 2015-01-01 09:44:32 -05:00
Lioncash
4e2cb06b81 dyncom: Implement SADD8/SSUB8 2015-01-01 09:39:40 -05:00
bunnei
59bba04628 Merge pull request #375 from lioncash/uops
dyncom: Implement UADD8/UADD16/USUB8/USUB16/UASX/USAX
2014-12-31 10:14:37 -05:00
Lioncash
3cc4af99d1 dyncom: Implement UADD8/UADD16/USUB8/USUB16/UASX/USAX 2014-12-31 06:45:41 -05:00
bunnei
631f13e462 dyncom: Massive refactor 2014-12-30 23:56:45 -05:00
bunnei
29da5da951 Merge pull request #369 from darkf/mingw_
Fix MinGW build (2)
2014-12-30 23:54:02 -05:00
Lioncash
5894c407c2 vfp: Get rid of a few warnings 2014-12-30 13:08:56 -05:00
Lioncash
6ce4b7b666 vfp: Implement VMOVBRRSS 2014-12-30 11:04:22 -05:00
Lioncash
cc9f458ad3 dyncom: Implement USAT16/SSAT16 2014-12-30 09:43:24 -05:00
darkf
8ba9ac0f74 Fix merge conflicts 2014-12-29 19:47:41 -08:00
bunnei
021fb42075 dyncom: Implement USAT/SSAT 2014-12-29 22:15:15 -05:00
bunnei
aa49019afb dyncom: Various cleanups to match coding style, no functional changes. 2014-12-29 21:50:47 -05:00
bunnei
2d2aa2c0be Merge pull request #361 from lioncash/moreqops
dyncom/armemu: Implement QADD8/QSUB8.
2014-12-29 14:53:04 -05:00
Lioncash
d08d9f8747 dyncom: Fix SMLALXY's instruction labels
They were erroneously labeled as SMLAL.
2014-12-29 12:04:34 -05:00
Lioncash
e412c0fc46 dyncom: Implement QADD8/QSUB8 2014-12-29 00:54:48 -05:00
Lioncash
7ad400d5a7 armemu: Implement QADD8/QSUB8 2014-12-29 00:49:10 -05:00
Lioncash
5c198686ce dyncom: Implement UXTB16/UXTAB16 2014-12-28 22:45:04 -05:00
bunnei
df728cb4c2 Merge pull request #355 from lioncash/simp
armemu: Simplify some instructions.
2014-12-28 22:20:49 -05:00
Lioncash
9c7f2570f7 vfp: Actually make the code somewhat readable 2014-12-28 18:55:01 -05:00
bunnei
bf9b33aa9f dyncom: Implement PKHBT and PKHTB. 2014-12-28 16:50:08 -05:00
bunnei
58cb62fe7b armemu: Fix PKHTB to do an arithmetic shift and correctly decode immediate field. 2014-12-28 16:18:52 -05:00
Lioncash
7d322b5c6f dyncom: Implement USAD8/USADA8 2014-12-28 12:40:51 -05:00
Lioncash
6ce2a38ec4 armemu: Simplify SSAT/SSAT16/SXTB/SXTAB 2014-12-28 12:19:31 -05:00
Lioncash
9f5b53f9ff armemu: Simplify REV/REV16/SXTH/SXTAH 2014-12-28 12:13:13 -05:00
bunnei
762f16c4ad Merge pull request #354 from lioncash/usaduflow
armemu: Fix underflows in USAD8/USADA8
2014-12-28 11:57:25 -05:00
Lioncash
914ecfe04f armemu: Simplify USAT16/UXTB/UXTAB 2014-12-28 11:57:14 -05:00
Lioncash
5e16216afb armemu: Simplify REVSH/UXTH/UXTAH 2014-12-28 11:57:09 -05:00
Lioncash
059c65a27a armemu: Fix underflows in USAD8/USADA8
Initially reported by xdec.
2014-12-28 06:09:43 -05:00
Lioncash
af69b0840b dyncom: Implement UQADD8, UQADD16, UQSUB8, UQSUB16, UQASX, and UQSAX. 2014-12-27 17:24:34 -05:00
Lioncash
60523113a9 armemu: Implement UQADD8, UQADD16, UQSUB16, UQASX, and UQSAX 2014-12-27 17:06:19 -05:00
Lioncash
52d889d85d dyncom: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAX 2014-12-27 00:57:32 -05:00
Lioncash
84a0438cf5 armemu: Implement UHADD8, UHADD16, UHSUB8, UHSUB16, UHASX, and UHSAX 2014-12-26 23:55:39 -05:00
bunnei
e5ddbfee02 Merge pull request #339 from bunnei/fixup-gsp-synch
Fixup gsp synch
2014-12-25 22:52:40 -05:00
bunnei
4783133bbd ARM: Add a mechanism for faking CPU time elapsed during HLE.
- Also a few cleanups.
2014-12-25 22:46:44 -05:00
bunnei
9c8ec675d9 Merge pull request #343 from lioncash/smmla
armemu: Implement SMMUL, SMMLA, and SMMLS.
2014-12-25 21:57:31 -05:00
bunnei
254567056f Merge pull request #341 from lioncash/moresmops
armemu: Implement SMLALD/SMLSLD
2014-12-25 21:46:54 -05:00
Lioncash
35dbfc7ab0 armemu: Implement SMMUL, SMMLA, and SMMLS. 2014-12-25 13:52:46 -05:00
Lioncash
82c3962b95 armemu: Implement SMLALD/SMLSLD 2014-12-24 09:29:48 -05:00
Lioncash
6b7808e412 armemu: Fix GE/Q flag setting semantics 2014-12-24 07:56:57 -05:00
Lioncash
20fc5f2a35 armemu: Set the Q flag correctly for much of the other ops
They were setting the old S flag.
2014-12-23 09:59:37 -05:00
Lioncash
79a7a432c5 armemu: Set the Q flag properly for SMLAD/SMUAD 2014-12-23 09:58:21 -05:00
bunnei
d31a94f06b Merge pull request #334 from lioncash/cpsr
armemu: Fix retrieval of the CPSR in MRS instructions.
2014-12-23 09:44:04 -05:00
bunnei
53447da142 Merge pull request #335 from lioncash/cpsrcreate
armemu: Emulate the GE and Q flags.
2014-12-23 09:43:46 -05:00
Lioncash
6446331938 armemu: Properly set the Q flag for SSAT16/USAT16 upon saturation. 2014-12-22 23:52:05 -05:00
Lioncash
f66d356938 armemu: Fix SEL
Needs to use the updated state of the CPSR.
2014-12-22 23:52:05 -05:00
Lioncash
8e2accd974 armemu: Fix construction of the CPSR 2014-12-22 23:51:59 -05:00
Lioncash
8c72322422 armemu: Fix retrieval of the CPSR in MRS instructions. 2014-12-22 21:44:03 -05:00
Lioncash
97f3e884d2 dyncom: Move over QADD16/QASX/QSAX/QSUB16 2014-12-22 01:09:42 -05:00
bunnei
2188af4a65 Merge pull request #322 from chinhodado/master
More warning cleanups
2014-12-22 00:12:43 -05:00
Lioncash
245276c9cc dyncom: Move SEL over 2014-12-21 21:19:15 -05:00
bunnei
770b274c86 Merge pull request #324 from lioncash/dync
dyncom: Move over SASX/SSAX/SADD16/SSUB16
2014-12-21 20:33:14 -05:00
Lioncash
c6f27055c9 dyncom: Move over SASX/SSAX/SADD16/SSUB16 2014-12-21 19:50:36 -05:00
bunnei
0de6a08d75 Merge pull request #291 from purpasmart96/license
License change
2014-12-21 16:05:44 -05:00
Chin
0199a7d9ef More warning cleanups 2014-12-21 10:58:55 -05:00
purpasmart96
ebfd831ccb License change 2014-12-20 21:20:24 -08:00
Lioncash
855eda6f85 armemu: Implement SADD8/SSUB8 2014-12-20 23:10:35 -05:00
bunnei
0e9262885d Merge pull request #296 from lioncash/dyn
dyncom: Implement UMAAL
2014-12-20 16:24:12 -05:00
bunnei
993afd3bf0 Merge pull request #310 from lioncash/ssat16
armemu: Fix SSAT16.
2014-12-20 16:23:54 -05:00
Lioncash
2a097f0990 armemu: Should be using labs for USAD8/USADA8 2014-12-20 15:34:14 -05:00
bunnei
7095c4959b Merge pull request #311 from lioncash/usada
armemu: Implement USAD8 and USADA8
2014-12-20 15:21:25 -05:00
bunnei
52bc58283d Merge pull request #313 from lioncash/smlsd
armemu: Implement SMLSD
2014-12-20 15:18:52 -05:00
bunnei
1c50a036dd Merge pull request #314 from lioncash/qsax-qasx
armemu: Implement QASX and QSAX
2014-12-20 15:18:05 -05:00
bunnei
245abb4125 Merge pull request #294 from lioncash/var
armemu: Narrow the scope of some variables in handle_v6_insn
2014-12-19 16:46:56 -05:00
bunnei
dc5d1a9061 Merge pull request #305 from lioncash/paren
armemu: Get rid of bitwise parenthesis warnings
2014-12-19 16:46:36 -05:00
Lioncash
4b506cec01 armemu: Implement QASX and QSAX 2014-12-19 14:09:18 -05:00
Lioncash
0f3a6a161c armemu: Implement SMLSD 2014-12-19 09:53:54 -05:00
Lioncash
4a646ace1f dyncom: Implement UMAAL 2014-12-19 04:02:14 -05:00
Lioncash
00e8ec4a9e armemu: Implement USAD8 and USADA8 2014-12-18 23:38:57 -05:00
Lioncash
92c53fe522 armemu: Fix SSAT16
The lower-bound would never be negative like it should
2014-12-18 20:35:14 -05:00
Lioncash
b9fc0b4b80 armemu: Clean up naming and formatting for SSAT16 2014-12-18 20:34:22 -05:00
bunnei
24b5e87279 Merge pull request #304 from lioncash/sflags
armemu: Set GE flags properly for SSUB16, SADD16, SSAX, and SASX.
2014-12-18 17:46:10 -05:00
Lioncash
e683f654ce armemu: Fix lower-bounds clamping for USAT16 2014-12-18 16:54:01 -05:00
Lioncash
6b632bbe37 armemu: More concise names for USAT16-related variables 2014-12-18 14:25:07 -05:00
Lioncash
eaae0ad502 armemu: Get rid of bitwise parenthesis warnings 2014-12-18 12:07:18 -05:00
Lioncash
4dc8eb40be armemu: Set GE flags correctly for SSUB16, SADD16, SSAX, and SASX. 2014-12-18 11:45:40 -05:00
bunnei
8ac22e7efc Merge pull request #299 from lioncash/join
Combine SSUB16, SADD16, SASX, and SSAX.
2014-12-18 10:04:31 -05:00
bunnei
797efbde1a Merge pull request #298 from lioncash/flags
armemu: Unset GE flags for UADD8 if results are < 0x100
2014-12-17 22:06:27 -05:00
bunnei
a968adf50e Merge pull request #295 from lioncash/umaal
armemu: Implement UMAAL
2014-12-17 21:44:13 -05:00
Lioncash
85c318078d armemu: Combine SSUB16, SADD16, SASX, and SSAX. 2014-12-17 21:17:54 -05:00
bunnei
075126247f Merge pull request #292 from lioncash/backports
Backport more skyeye fixes from 3dmoo
2014-12-17 20:58:00 -05:00
Lioncash
41fee1c940 armemu: Unset GE flags for UADD8 if results are < 0x100
Reference manual states these must be set to zero if this case is true.
2014-12-17 17:54:49 -05:00
Lioncash
58dc554733 armemu: Fix SSUB16
Broken from the same reason SADD16 was.

The lo part of the result should only be constructed from the lo halfwords of rm and rn.
The hi part of the result should only be constructed from the hi halfwords of rm and rn.
2014-12-17 15:40:10 -05:00
bunnei
e6f440ea7f Merge pull request #293 from lioncash/sops
armemu: Fix SADD16
2014-12-17 14:54:24 -05:00
bunnei
3e9d4a7917 Merge pull request #287 from lioncash/qaddsub16
armemu: Join QADD16/QSUB16 and fix saturation clamping.
2014-12-17 12:34:52 -05:00
Lioncash
5820dba6b7 armemu: Implement UMAAL 2014-12-17 12:21:21 -05:00
Lioncash
2d91164bb9 armemu: Narrow the scope of some variables in handle_v6_insn
There's no reason to have these in the outer-most scope.
2014-12-17 10:26:20 -05:00
Lioncash
5289a496a7 armemu: Fix SADD16
The lo and hi parts of the result were being constructed as a result of hi and lo halfword intermixing from the rm and rn regs. However the lo part of the result should be constructed only from the lo halfwords of rm and rn, and the hi part of the result should only be constructed from the hi halfwords of rm and rn.
2014-12-17 09:36:25 -05:00
Normmatt
73211dc8fe armemu: Fix PKHTB 2014-12-17 03:26:12 -05:00
Normmatt
8045df14d2 armemu: Implement REVSH 2014-12-17 03:26:01 -05:00
Normmatt
bc81cc9490 armemu: Fix UXTAB/UXTAH 2014-12-17 03:24:25 -05:00
Normmatt
b5dbd6f2a2 armemu: Fix SXTAB 2014-12-17 03:17:44 -05:00
Normmatt
efebd5589a armemu: Fix SXTAH 2014-12-17 03:16:40 -05:00
bunnei
fdb4ef5210 Merge pull request #289 from lioncash/smops
Join SMUAD, SMUSD, and SMLAD ops. Also fix them as well.
2014-12-17 00:08:43 -05:00
bunnei
ec9ac2f51a Merge pull request #290 from lioncash/vsub
armemu: Backport some VFP fixes from 3dmoo.
2014-12-16 23:22:58 -05:00
Normmatt
9c127f4a01 armemu: Fix FTOUI NaN sign. 2014-12-16 05:56:06 -05:00
Normmatt
2ed03c10e0 armemu: Fix FSUBS bug where NaN shouldn't be negated 2014-12-16 05:54:00 -05:00
Lioncash
d5bcddb77c armemu: Fix SMUAD, SMUSD, and SMLAD
Wrong values were being multiplied together.
2014-12-16 03:13:06 -05:00
Lioncash
0f9e3baf39 armemu: Join SMUAD, SMUSD, and SMLAD 2014-12-16 03:11:50 -05:00
Lioncash
4c53799229 armemu: Fix lower-bound signed saturation clamping for QADD16/QSUB16. 2014-12-16 00:11:51 -05:00
Lioncash
49817e89d9 armemu: Join QADD16 and QSUB16 together.
The only difference between these ops is one adds and one subtracts. Everything is literally the same.
2014-12-16 00:11:19 -05:00
Lioncash
1c7f77334c armemu: Implement UXTAB16 2014-12-15 20:47:27 -05:00
Lioncash
2b0acd36e1 armemu: Fix UXTB16
Rotation bits are 10 and 11, not 9 and 10.
2014-12-14 23:00:31 -05:00