mirror of
https://github.com/Lime3DS/Lime3DS
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319 lines
9.4 KiB
C++
319 lines
9.4 KiB
C++
// Copyright 2016 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <cstring>
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#include <dynarmic/A32/a32.h>
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#include <dynarmic/A32/context.h>
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#include "common/assert.h"
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#include "common/microprofile.h"
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#include "core/arm/dynarmic/arm_dynarmic.h"
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#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
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#include "core/arm/dyncom/arm_dyncom_interpreter.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/gdbstub/gdbstub.h"
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#include "core/hle/kernel/svc.h"
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#include "core/memory.h"
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class DynarmicThreadContext final : public ARM_Interface::ThreadContext {
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public:
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DynarmicThreadContext() {
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Reset();
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}
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~DynarmicThreadContext() override = default;
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void Reset() override {
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ctx.Regs() = {};
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ctx.SetCpsr(0);
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ctx.ExtRegs() = {};
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ctx.SetFpscr(0);
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fpexc = 0;
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}
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u32 GetCpuRegister(std::size_t index) const override {
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return ctx.Regs()[index];
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}
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void SetCpuRegister(std::size_t index, u32 value) override {
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ctx.Regs()[index] = value;
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}
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u32 GetCpsr() const override {
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return ctx.Cpsr();
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}
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void SetCpsr(u32 value) override {
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ctx.SetCpsr(value);
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}
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u32 GetFpuRegister(std::size_t index) const override {
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return ctx.ExtRegs()[index];
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}
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void SetFpuRegister(std::size_t index, u32 value) override {
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ctx.ExtRegs()[index] = value;
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}
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u32 GetFpscr() const override {
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return ctx.Fpscr();
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}
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void SetFpscr(u32 value) override {
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ctx.SetFpscr(value);
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}
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u32 GetFpexc() const override {
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return fpexc;
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}
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void SetFpexc(u32 value) override {
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fpexc = value;
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}
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private:
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friend class ARM_Dynarmic;
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Dynarmic::A32::Context ctx;
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u32 fpexc;
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};
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class DynarmicUserCallbacks final : public Dynarmic::A32::UserCallbacks {
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public:
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explicit DynarmicUserCallbacks(ARM_Dynarmic& parent)
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: parent(parent), timing(parent.system.CoreTiming()), svc_context(parent.system),
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memory(parent.memory) {}
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~DynarmicUserCallbacks() = default;
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std::uint8_t MemoryRead8(VAddr vaddr) override {
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return memory.Read8(vaddr);
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}
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std::uint16_t MemoryRead16(VAddr vaddr) override {
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return memory.Read16(vaddr);
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}
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std::uint32_t MemoryRead32(VAddr vaddr) override {
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return memory.Read32(vaddr);
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}
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std::uint64_t MemoryRead64(VAddr vaddr) override {
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return memory.Read64(vaddr);
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}
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void MemoryWrite8(VAddr vaddr, std::uint8_t value) override {
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memory.Write8(vaddr, value);
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}
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void MemoryWrite16(VAddr vaddr, std::uint16_t value) override {
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memory.Write16(vaddr, value);
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}
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void MemoryWrite32(VAddr vaddr, std::uint32_t value) override {
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memory.Write32(vaddr, value);
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}
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void MemoryWrite64(VAddr vaddr, std::uint64_t value) override {
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memory.Write64(vaddr, value);
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}
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void InterpreterFallback(VAddr pc, std::size_t num_instructions) override {
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parent.interpreter_state->Reg = parent.jit->Regs();
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parent.interpreter_state->Cpsr = parent.jit->Cpsr();
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parent.interpreter_state->Reg[15] = pc;
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parent.interpreter_state->ExtReg = parent.jit->ExtRegs();
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parent.interpreter_state->VFP[VFP_FPSCR] = parent.jit->Fpscr();
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parent.interpreter_state->NumInstrsToExecute = num_instructions;
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InterpreterMainLoop(parent.interpreter_state.get());
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bool is_thumb = (parent.interpreter_state->Cpsr & (1 << 5)) != 0;
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parent.interpreter_state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
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parent.jit->Regs() = parent.interpreter_state->Reg;
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parent.jit->SetCpsr(parent.interpreter_state->Cpsr);
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parent.jit->ExtRegs() = parent.interpreter_state->ExtReg;
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parent.jit->SetFpscr(parent.interpreter_state->VFP[VFP_FPSCR]);
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parent.interpreter_state->ServeBreak();
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}
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void CallSVC(std::uint32_t swi) override {
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svc_context.CallSVC(swi);
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}
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void ExceptionRaised(VAddr pc, Dynarmic::A32::Exception exception) override {
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switch (exception) {
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case Dynarmic::A32::Exception::UndefinedInstruction:
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case Dynarmic::A32::Exception::UnpredictableInstruction:
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break;
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case Dynarmic::A32::Exception::Breakpoint:
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if (GDBStub::IsConnected()) {
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parent.jit->HaltExecution();
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parent.SetPC(pc);
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Kernel::Thread* thread =
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parent.system.Kernel().GetThreadManager().GetCurrentThread();
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parent.SaveContext(thread->context);
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GDBStub::Break();
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GDBStub::SendTrap(thread, 5);
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return;
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}
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break;
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}
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ASSERT_MSG(false, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})",
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static_cast<std::size_t>(exception), pc, MemoryReadCode(pc));
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}
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void AddTicks(std::uint64_t ticks) override {
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timing.AddTicks(ticks);
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}
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std::uint64_t GetTicksRemaining() override {
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s64 ticks = timing.GetDowncount();
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return static_cast<u64>(ticks <= 0 ? 0 : ticks);
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}
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ARM_Dynarmic& parent;
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Core::Timing& timing;
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Kernel::SVCContext svc_context;
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Memory::MemorySystem& memory;
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};
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ARM_Dynarmic::ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory,
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PrivilegeMode initial_mode)
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: system(*system), memory(memory), cb(std::make_unique<DynarmicUserCallbacks>(*this)) {
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interpreter_state = std::make_shared<ARMul_State>(system, memory, initial_mode);
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SetPageTable(memory.GetCurrentPageTable());
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}
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ARM_Dynarmic::~ARM_Dynarmic() = default;
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MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64));
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void ARM_Dynarmic::Run() {
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ASSERT(memory.GetCurrentPageTable() == current_page_table);
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MICROPROFILE_SCOPE(ARM_Jit);
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jit->Run();
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}
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void ARM_Dynarmic::Step() {
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cb->InterpreterFallback(jit->Regs()[15], 1);
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}
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void ARM_Dynarmic::SetPC(u32 pc) {
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jit->Regs()[15] = pc;
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}
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u32 ARM_Dynarmic::GetPC() const {
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return jit->Regs()[15];
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}
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u32 ARM_Dynarmic::GetReg(int index) const {
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return jit->Regs()[index];
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}
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void ARM_Dynarmic::SetReg(int index, u32 value) {
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jit->Regs()[index] = value;
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}
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u32 ARM_Dynarmic::GetVFPReg(int index) const {
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return jit->ExtRegs()[index];
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}
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void ARM_Dynarmic::SetVFPReg(int index, u32 value) {
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jit->ExtRegs()[index] = value;
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}
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u32 ARM_Dynarmic::GetVFPSystemReg(VFPSystemRegister reg) const {
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if (reg == VFP_FPSCR) {
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return jit->Fpscr();
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}
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// Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
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return interpreter_state->VFP[reg];
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}
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void ARM_Dynarmic::SetVFPSystemReg(VFPSystemRegister reg, u32 value) {
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if (reg == VFP_FPSCR) {
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jit->SetFpscr(value);
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}
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// Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
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interpreter_state->VFP[reg] = value;
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}
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u32 ARM_Dynarmic::GetCPSR() const {
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return jit->Cpsr();
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}
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void ARM_Dynarmic::SetCPSR(u32 cpsr) {
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jit->SetCpsr(cpsr);
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}
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u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) const {
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return interpreter_state->CP15[reg];
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}
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void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
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interpreter_state->CP15[reg] = value;
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}
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std::unique_ptr<ARM_Interface::ThreadContext> ARM_Dynarmic::NewContext() const {
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return std::make_unique<DynarmicThreadContext>();
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}
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void ARM_Dynarmic::SaveContext(const std::unique_ptr<ThreadContext>& arg) {
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DynarmicThreadContext* ctx = dynamic_cast<DynarmicThreadContext*>(arg.get());
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ASSERT(ctx);
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jit->SaveContext(ctx->ctx);
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ctx->fpexc = interpreter_state->VFP[VFP_FPEXC];
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}
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void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
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const DynarmicThreadContext* ctx = dynamic_cast<DynarmicThreadContext*>(arg.get());
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ASSERT(ctx);
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jit->LoadContext(ctx->ctx);
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interpreter_state->VFP[VFP_FPEXC] = ctx->fpexc;
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}
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void ARM_Dynarmic::PrepareReschedule() {
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if (jit->IsExecuting()) {
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jit->HaltExecution();
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}
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}
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void ARM_Dynarmic::ClearInstructionCache() {
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// TODO: Clear interpreter cache when appropriate.
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for (const auto& j : jits) {
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j.second->ClearCache();
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}
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interpreter_state->instruction_cache.clear();
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}
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void ARM_Dynarmic::InvalidateCacheRange(u32 start_address, std::size_t length) {
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jit->InvalidateCacheRange(start_address, length);
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}
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std::shared_ptr<Memory::PageTable> ARM_Dynarmic::GetPageTable() const {
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return current_page_table;
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}
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void ARM_Dynarmic::SetPageTable(const std::shared_ptr<Memory::PageTable>& page_table) {
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current_page_table = page_table;
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Dynarmic::A32::Context ctx{};
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if (jit) {
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jit->SaveContext(ctx);
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}
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auto iter = jits.find(current_page_table);
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if (iter != jits.end()) {
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jit = iter->second.get();
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jit->LoadContext(ctx);
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return;
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}
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auto new_jit = MakeJit();
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jit = new_jit.get();
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jit->LoadContext(ctx);
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jits.emplace(current_page_table, std::move(new_jit));
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}
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std::unique_ptr<Dynarmic::A32::Jit> ARM_Dynarmic::MakeJit() {
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Dynarmic::A32::UserConfig config;
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config.callbacks = cb.get();
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config.page_table = ¤t_page_table->GetPointerArray();
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config.coprocessors[15] = std::make_shared<DynarmicCP15>(interpreter_state);
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config.define_unpredictable_behaviour = true;
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return std::make_unique<Dynarmic::A32::Jit>(config);
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}
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void ARM_Dynarmic::PurgeState() {
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ClearInstructionCache();
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}
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