2022-04-23 03:59:50 -05:00
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// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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2018-02-07 20:54:35 -06:00
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2021-09-08 20:43:02 -05:00
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#include <algorithm>
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2018-04-23 10:57:12 -05:00
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#include "common/alignment.h"
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#include "common/assert.h"
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#include "common/logging/log.h"
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2019-07-09 00:19:27 -05:00
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#include "core/core.h"
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#include "core/hle/kernel/k_page_table.h"
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#include "core/hle/kernel/k_process.h"
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#include "core/memory.h"
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#include "video_core/memory_manager.h"
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#include "video_core/rasterizer_interface.h"
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#include "video_core/renderer_base.h"
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2018-02-11 22:44:12 -06:00
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namespace Tegra {
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MemoryManager::MemoryManager(Core::System& system_, u64 address_space_bits_, u64 page_bits_)
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: system{system_}, address_space_bits{address_space_bits_}, page_bits{page_bits_}, entries{},
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page_table{address_space_bits, address_space_bits + page_bits - 38, page_bits} {
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address_space_size = 1ULL << address_space_bits;
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allocate_start = address_space_bits > 32 ? 1ULL << 32 : 0;
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page_size = 1ULL << page_bits;
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page_mask = page_size - 1ULL;
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const u64 page_table_bits = address_space_bits - cpu_page_bits;
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const u64 page_table_size = 1ULL << page_table_bits;
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page_table_mask = page_table_size - 1;
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entries.resize(page_table_size / 32, 0);
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}
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MemoryManager::~MemoryManager() = default;
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MemoryManager::EntryType MemoryManager::GetEntry(size_t position) const {
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position = position >> page_bits;
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const u64 entry_mask = entries[position / 32];
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const size_t sub_index = position % 32;
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return static_cast<EntryType>((entry_mask >> (2 * sub_index)) & 0x03ULL);
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}
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void MemoryManager::SetEntry(size_t position, MemoryManager::EntryType entry) {
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position = position >> page_bits;
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const u64 entry_mask = entries[position / 32];
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const size_t sub_index = position % 32;
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entries[position / 32] =
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(~(3ULL << sub_index * 2) & entry_mask) | (static_cast<u64>(entry) << sub_index * 2);
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}
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template <MemoryManager::EntryType entry_type>
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GPUVAddr MemoryManager::PageTableOp(GPUVAddr gpu_addr, [[maybe_unused]] VAddr cpu_addr,
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size_t size) {
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u64 remaining_size{size};
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if constexpr (entry_type == EntryType::Mapped) {
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page_table.ReserveRange(gpu_addr, size);
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}
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for (u64 offset{}; offset < size; offset += page_size) {
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const GPUVAddr current_gpu_addr = gpu_addr + offset;
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SetEntry(current_gpu_addr, entry_type);
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if constexpr (entry_type == EntryType::Mapped) {
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const VAddr current_cpu_addr = cpu_addr + offset;
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const auto index = PageEntryIndex(current_gpu_addr);
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page_table[index] = static_cast<u32>(current_cpu_addr >> 12ULL);
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}
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remaining_size -= page_size;
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}
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return gpu_addr;
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}
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void MemoryManager::BindRasterizer(VideoCore::RasterizerInterface* rasterizer_) {
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rasterizer = rasterizer_;
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}
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GPUVAddr MemoryManager::Map(VAddr cpu_addr, GPUVAddr gpu_addr, std::size_t size) {
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return PageTableOp<EntryType::Mapped>(gpu_addr, cpu_addr, size);
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}
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GPUVAddr MemoryManager::MapAllocate(VAddr cpu_addr, std::size_t size, std::size_t align) {
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return Map(cpu_addr, *FindFreeRange(size, align), size);
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}
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GPUVAddr MemoryManager::MapAllocate32(VAddr cpu_addr, std::size_t size) {
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const std::optional<GPUVAddr> gpu_addr = FindFreeRange(size, 1, true);
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ASSERT(gpu_addr);
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return Map(cpu_addr, *gpu_addr, size);
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}
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void MemoryManager::Unmap(GPUVAddr gpu_addr, std::size_t size) {
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if (size == 0) {
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return;
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}
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const auto submapped_ranges = GetSubmappedRange(gpu_addr, size);
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for (const auto& [map_addr, map_size] : submapped_ranges) {
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// Flush and invalidate through the GPU interface, to be asynchronous if possible.
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const std::optional<VAddr> cpu_addr = GpuToCpuAddress(map_addr);
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ASSERT(cpu_addr);
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rasterizer->UnmapMemory(*cpu_addr, map_size);
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}
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PageTableOp<EntryType::Free>(gpu_addr, 0, size);
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}
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std::optional<GPUVAddr> MemoryManager::AllocateFixed(GPUVAddr gpu_addr, std::size_t size) {
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for (u64 offset{}; offset < size; offset += page_size) {
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if (GetEntry(gpu_addr + offset) != EntryType::Free) {
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return std::nullopt;
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}
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}
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return PageTableOp<EntryType::Reserved>(gpu_addr, 0, size);
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}
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GPUVAddr MemoryManager::Allocate(std::size_t size, std::size_t align) {
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return *AllocateFixed(*FindFreeRange(size, align), size);
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}
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std::optional<GPUVAddr> MemoryManager::FindFreeRange(std::size_t size, std::size_t align,
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bool start_32bit_address) const {
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if (!align) {
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align = page_size;
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} else {
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align = Common::AlignUp(align, page_size);
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}
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u64 available_size{};
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GPUVAddr gpu_addr{allocate_start};
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while (gpu_addr + available_size < address_space_size) {
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if (GetEntry(gpu_addr + available_size) == EntryType::Free) {
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available_size += page_size;
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if (available_size >= size) {
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return gpu_addr;
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}
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} else {
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gpu_addr += available_size + page_size;
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available_size = 0;
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const auto remainder{gpu_addr % align};
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if (remainder) {
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gpu_addr = (gpu_addr - remainder) + align;
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}
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}
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}
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return std::nullopt;
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}
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std::optional<VAddr> MemoryManager::GpuToCpuAddress(GPUVAddr gpu_addr) const {
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if (GetEntry(gpu_addr) != EntryType::Mapped) {
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return std::nullopt;
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}
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const VAddr cpu_addr_base = static_cast<VAddr>(page_table[PageEntryIndex(gpu_addr)]) << 12ULL;
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return cpu_addr_base + (gpu_addr & page_mask);
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}
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std::optional<VAddr> MemoryManager::GpuToCpuAddress(GPUVAddr addr, std::size_t size) const {
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size_t page_index{addr >> page_bits};
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const size_t page_last{(addr + size + page_size - 1) >> page_bits};
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while (page_index < page_last) {
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const auto page_addr{GpuToCpuAddress(page_index << page_bits)};
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if (page_addr && *page_addr != 0) {
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return page_addr;
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}
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++page_index;
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}
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return std::nullopt;
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}
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template <typename T>
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T MemoryManager::Read(GPUVAddr addr) const {
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if (auto page_pointer{GetPointer(addr)}; page_pointer) {
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// NOTE: Avoid adding any extra logic to this fast-path block
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T value;
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std::memcpy(&value, page_pointer, sizeof(T));
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return value;
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}
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ASSERT(false);
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return {};
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}
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template <typename T>
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void MemoryManager::Write(GPUVAddr addr, T data) {
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if (auto page_pointer{GetPointer(addr)}; page_pointer) {
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// NOTE: Avoid adding any extra logic to this fast-path block
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std::memcpy(page_pointer, &data, sizeof(T));
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return;
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}
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ASSERT(false);
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}
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template u8 MemoryManager::Read<u8>(GPUVAddr addr) const;
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template u16 MemoryManager::Read<u16>(GPUVAddr addr) const;
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template u32 MemoryManager::Read<u32>(GPUVAddr addr) const;
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template u64 MemoryManager::Read<u64>(GPUVAddr addr) const;
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template void MemoryManager::Write<u8>(GPUVAddr addr, u8 data);
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template void MemoryManager::Write<u16>(GPUVAddr addr, u16 data);
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template void MemoryManager::Write<u32>(GPUVAddr addr, u32 data);
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template void MemoryManager::Write<u64>(GPUVAddr addr, u64 data);
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u8* MemoryManager::GetPointer(GPUVAddr gpu_addr) {
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const auto address{GpuToCpuAddress(gpu_addr)};
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if (!address) {
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return {};
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}
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return system.Memory().GetPointer(*address);
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}
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const u8* MemoryManager::GetPointer(GPUVAddr gpu_addr) const {
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const auto address{GpuToCpuAddress(gpu_addr)};
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if (!address) {
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return {};
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}
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return system.Memory().GetPointer(*address);
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}
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void MemoryManager::ReadBlockImpl(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size,
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bool is_safe) const {
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std::size_t remaining_size{size};
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std::size_t page_index{gpu_src_addr >> page_bits};
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std::size_t page_offset{gpu_src_addr & page_mask};
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while (remaining_size > 0) {
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const std::size_t copy_amount{
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std::min(static_cast<std::size_t>(page_size) - page_offset, remaining_size)};
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const auto page_addr{GpuToCpuAddress(page_index << page_bits)};
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if (page_addr) {
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const auto src_addr{*page_addr + page_offset};
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if (is_safe) {
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// Flush must happen on the rasterizer interface, such that memory is always
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// synchronous when it is read (even when in asynchronous GPU mode).
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// Fixes Dead Cells title menu.
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rasterizer->FlushRegion(src_addr, copy_amount);
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}
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system.Memory().ReadBlockUnsafe(src_addr, dest_buffer, copy_amount);
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} else {
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std::memset(dest_buffer, 0, copy_amount);
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}
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page_index++;
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page_offset = 0;
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dest_buffer = static_cast<u8*>(dest_buffer) + copy_amount;
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remaining_size -= copy_amount;
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}
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}
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2019-03-28 20:58:28 -05:00
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void MemoryManager::ReadBlock(GPUVAddr gpu_src_addr, void* dest_buffer, std::size_t size) const {
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ReadBlockImpl(gpu_src_addr, dest_buffer, size, true);
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}
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2020-06-19 21:02:56 -05:00
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void MemoryManager::ReadBlockUnsafe(GPUVAddr gpu_src_addr, void* dest_buffer,
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const std::size_t size) const {
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ReadBlockImpl(gpu_src_addr, dest_buffer, size, false);
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2019-04-15 22:01:35 -05:00
|
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|
}
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|
|
|
2021-12-30 22:36:00 -06:00
|
|
|
void MemoryManager::WriteBlockImpl(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size,
|
|
|
|
bool is_safe) {
|
2019-03-28 20:58:28 -05:00
|
|
|
std::size_t remaining_size{size};
|
2020-06-19 21:02:56 -05:00
|
|
|
std::size_t page_index{gpu_dest_addr >> page_bits};
|
|
|
|
std::size_t page_offset{gpu_dest_addr & page_mask};
|
2019-03-28 20:58:28 -05:00
|
|
|
|
|
|
|
while (remaining_size > 0) {
|
|
|
|
const std::size_t copy_amount{
|
|
|
|
std::min(static_cast<std::size_t>(page_size) - page_offset, remaining_size)};
|
2021-12-31 01:07:59 -06:00
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|
|
const auto page_addr{GpuToCpuAddress(page_index << page_bits)};
|
2021-11-11 14:24:40 -06:00
|
|
|
if (page_addr) {
|
2020-07-25 23:16:21 -05:00
|
|
|
const auto dest_addr{*page_addr + page_offset};
|
|
|
|
|
2021-12-30 22:36:00 -06:00
|
|
|
if (is_safe) {
|
|
|
|
// Invalidate must happen on the rasterizer interface, such that memory is always
|
|
|
|
// synchronous when it is written (even when in asynchronous GPU mode).
|
|
|
|
rasterizer->InvalidateRegion(dest_addr, copy_amount);
|
|
|
|
}
|
2020-07-25 23:16:21 -05:00
|
|
|
system.Memory().WriteBlockUnsafe(dest_addr, src_buffer, copy_amount);
|
|
|
|
}
|
2019-03-28 20:58:28 -05:00
|
|
|
|
|
|
|
page_index++;
|
|
|
|
page_offset = 0;
|
|
|
|
src_buffer = static_cast<const u8*>(src_buffer) + copy_amount;
|
|
|
|
remaining_size -= copy_amount;
|
|
|
|
}
|
2019-03-03 22:54:16 -06:00
|
|
|
}
|
|
|
|
|
2021-12-30 22:36:00 -06:00
|
|
|
void MemoryManager::WriteBlock(GPUVAddr gpu_dest_addr, const void* src_buffer, std::size_t size) {
|
|
|
|
WriteBlockImpl(gpu_dest_addr, src_buffer, size, true);
|
|
|
|
}
|
|
|
|
|
2020-06-19 21:02:56 -05:00
|
|
|
void MemoryManager::WriteBlockUnsafe(GPUVAddr gpu_dest_addr, const void* src_buffer,
|
2020-07-25 23:16:21 -05:00
|
|
|
std::size_t size) {
|
2021-12-30 22:36:00 -06:00
|
|
|
WriteBlockImpl(gpu_dest_addr, src_buffer, size, false);
|
2019-04-15 22:01:35 -05:00
|
|
|
}
|
|
|
|
|
2021-01-21 16:08:15 -06:00
|
|
|
void MemoryManager::FlushRegion(GPUVAddr gpu_addr, size_t size) const {
|
|
|
|
size_t remaining_size{size};
|
|
|
|
size_t page_index{gpu_addr >> page_bits};
|
|
|
|
size_t page_offset{gpu_addr & page_mask};
|
|
|
|
while (remaining_size > 0) {
|
|
|
|
const size_t num_bytes{std::min(page_size - page_offset, remaining_size)};
|
|
|
|
if (const auto page_addr{GpuToCpuAddress(page_index << page_bits)}; page_addr) {
|
|
|
|
rasterizer->FlushRegion(*page_addr + page_offset, num_bytes);
|
|
|
|
}
|
|
|
|
++page_index;
|
|
|
|
page_offset = 0;
|
|
|
|
remaining_size -= num_bytes;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-07-25 23:16:21 -05:00
|
|
|
void MemoryManager::CopyBlock(GPUVAddr gpu_dest_addr, GPUVAddr gpu_src_addr, std::size_t size) {
|
2020-04-08 11:08:06 -05:00
|
|
|
std::vector<u8> tmp_buffer(size);
|
2020-06-19 21:02:56 -05:00
|
|
|
ReadBlock(gpu_src_addr, tmp_buffer.data(), size);
|
2021-01-21 16:08:43 -06:00
|
|
|
|
|
|
|
// The output block must be flushed in case it has data modified from the GPU.
|
|
|
|
// Fixes NPC geometry in Zombie Panic in Wonderland DX
|
|
|
|
FlushRegion(gpu_dest_addr, size);
|
2020-06-19 21:02:56 -05:00
|
|
|
WriteBlock(gpu_dest_addr, tmp_buffer.data(), size);
|
2018-10-12 20:52:16 -05:00
|
|
|
}
|
|
|
|
|
2020-08-23 23:37:54 -05:00
|
|
|
bool MemoryManager::IsGranularRange(GPUVAddr gpu_addr, std::size_t size) const {
|
2020-07-25 23:16:21 -05:00
|
|
|
const auto cpu_addr{GpuToCpuAddress(gpu_addr)};
|
|
|
|
if (!cpu_addr) {
|
2020-08-23 23:37:54 -05:00
|
|
|
return false;
|
2019-03-03 22:54:16 -06:00
|
|
|
}
|
2022-08-18 18:28:55 -05:00
|
|
|
const std::size_t page{(*cpu_addr & Core::Memory::YUZU_PAGEMASK) + size};
|
|
|
|
return page <= Core::Memory::YUZU_PAGESIZE;
|
2018-02-07 20:54:35 -06:00
|
|
|
}
|
|
|
|
|
2021-06-12 20:34:06 -05:00
|
|
|
bool MemoryManager::IsContinousRange(GPUVAddr gpu_addr, std::size_t size) const {
|
|
|
|
size_t page_index{gpu_addr >> page_bits};
|
|
|
|
const size_t page_last{(gpu_addr + size + page_size - 1) >> page_bits};
|
|
|
|
std::optional<VAddr> old_page_addr{};
|
|
|
|
while (page_index != page_last) {
|
|
|
|
const auto page_addr{GpuToCpuAddress(page_index << page_bits)};
|
|
|
|
if (!page_addr || *page_addr == 0) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
if (old_page_addr) {
|
|
|
|
if (*old_page_addr + page_size != *page_addr) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
old_page_addr = page_addr;
|
|
|
|
++page_index;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool MemoryManager::IsFullyMappedRange(GPUVAddr gpu_addr, std::size_t size) const {
|
|
|
|
size_t page_index{gpu_addr >> page_bits};
|
|
|
|
const size_t page_last{(gpu_addr + size + page_size - 1) >> page_bits};
|
|
|
|
while (page_index < page_last) {
|
2021-11-11 14:24:40 -06:00
|
|
|
if (GetEntry(page_index << page_bits) == EntryType::Free) {
|
2021-06-12 20:34:06 -05:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
++page_index;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
std::vector<std::pair<GPUVAddr, std::size_t>> MemoryManager::GetSubmappedRange(
|
|
|
|
GPUVAddr gpu_addr, std::size_t size) const {
|
|
|
|
std::vector<std::pair<GPUVAddr, std::size_t>> result{};
|
|
|
|
size_t page_index{gpu_addr >> page_bits};
|
|
|
|
size_t remaining_size{size};
|
|
|
|
size_t page_offset{gpu_addr & page_mask};
|
|
|
|
std::optional<std::pair<GPUVAddr, std::size_t>> last_segment{};
|
|
|
|
std::optional<VAddr> old_page_addr{};
|
2021-11-11 14:24:40 -06:00
|
|
|
const auto extend_size = [this, &last_segment, &page_index, &page_offset](std::size_t bytes) {
|
2021-06-12 20:34:06 -05:00
|
|
|
if (!last_segment) {
|
2021-12-31 01:07:59 -06:00
|
|
|
const GPUVAddr new_base_addr = (page_index << page_bits) + page_offset;
|
2021-06-12 20:34:06 -05:00
|
|
|
last_segment = {new_base_addr, bytes};
|
|
|
|
} else {
|
|
|
|
last_segment->second += bytes;
|
|
|
|
}
|
|
|
|
};
|
2021-12-31 01:07:59 -06:00
|
|
|
const auto split = [&last_segment, &result] {
|
2021-06-12 20:34:06 -05:00
|
|
|
if (last_segment) {
|
|
|
|
result.push_back(*last_segment);
|
|
|
|
last_segment = std::nullopt;
|
|
|
|
}
|
|
|
|
};
|
|
|
|
while (remaining_size > 0) {
|
|
|
|
const size_t num_bytes{std::min(page_size - page_offset, remaining_size)};
|
|
|
|
const auto page_addr{GpuToCpuAddress(page_index << page_bits)};
|
2021-12-31 01:07:59 -06:00
|
|
|
if (!page_addr || *page_addr == 0) {
|
2021-06-12 20:34:06 -05:00
|
|
|
split();
|
|
|
|
} else if (old_page_addr) {
|
|
|
|
if (*old_page_addr + page_size != *page_addr) {
|
|
|
|
split();
|
|
|
|
}
|
|
|
|
extend_size(num_bytes);
|
|
|
|
} else {
|
|
|
|
extend_size(num_bytes);
|
|
|
|
}
|
|
|
|
++page_index;
|
|
|
|
page_offset = 0;
|
|
|
|
remaining_size -= num_bytes;
|
2021-08-19 15:57:22 -05:00
|
|
|
old_page_addr = page_addr;
|
2021-06-12 20:34:06 -05:00
|
|
|
}
|
|
|
|
split();
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2018-02-11 22:44:12 -06:00
|
|
|
} // namespace Tegra
|