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https://git.suyu.dev/suyu/suyu
synced 2024-12-24 18:32:49 -06:00
Use standard UBO and fix/stylize the code
This commit is contained in:
parent
17315cee16
commit
59a004f915
8 changed files with 51 additions and 91 deletions
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@ -323,8 +323,6 @@ void RasterizerOpenGL::SetupShaders(GLenum primitive_mode) {
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current_texture_bindpoint = SetupTextures(static_cast<Maxwell::ShaderStage>(stage), shader,
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current_texture_bindpoint = SetupTextures(static_cast<Maxwell::ShaderStage>(stage), shader,
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primitive_mode, current_texture_bindpoint);
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primitive_mode, current_texture_bindpoint);
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SetupAlphaTesting(shader);
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// When VertexA is enabled, we have dual vertex shaders
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// When VertexA is enabled, we have dual vertex shaders
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if (program == Maxwell::ShaderProgram::VertexA) {
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if (program == Maxwell::ShaderProgram::VertexA) {
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// VertexB was combined with VertexA, so we skip the VertexB iteration
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// VertexB was combined with VertexA, so we skip the VertexB iteration
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@ -882,19 +880,6 @@ u32 RasterizerOpenGL::SetupTextures(Maxwell::ShaderStage stage, Shader& shader,
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return current_unit + static_cast<u32>(entries.size());
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return current_unit + static_cast<u32>(entries.size());
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}
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}
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void RasterizerOpenGL::SetupAlphaTesting(Shader& shader) {
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const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
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u32 func = static_cast<u32>(regs.alpha_test_func);
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// Normalize the gl variants of opCompare to be the same as the normal variants
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u32 op = static_cast<u32>(Tegra::Engines::Maxwell3D::Regs::ComparisonOp::Never);
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if (func >= op) {
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func = func - op + 1U;
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}
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shader->SetAlphaTesting(regs.alpha_test_enabled == 1, regs.alpha_test_ref, func);
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}
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void RasterizerOpenGL::SyncViewport() {
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void RasterizerOpenGL::SyncViewport() {
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const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
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const auto& regs = Core::System::GetInstance().GPU().Maxwell3D().regs;
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const MathUtil::Rectangle<s32> viewport_rect{regs.viewport_transform[0].GetRect()};
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const MathUtil::Rectangle<s32> viewport_rect{regs.viewport_transform[0].GetRect()};
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@ -132,9 +132,6 @@ private:
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u32 SetupTextures(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage, Shader& shader,
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u32 SetupTextures(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage, Shader& shader,
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GLenum primitive_mode, u32 current_unit);
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GLenum primitive_mode, u32 current_unit);
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/// Syncs the alpha test state to match the guest state
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void SetupAlphaTesting(Shader& shader);
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/// Syncs the viewport to match the guest state
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/// Syncs the viewport to match the guest state
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void SyncViewport();
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void SyncViewport();
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@ -94,10 +94,6 @@ CachedShader::CachedShader(VAddr addr, Maxwell::ShaderProgram program_type)
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// Store shader's code to lazily build it on draw
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// Store shader's code to lazily build it on draw
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geometry_programs.code = program_result.first;
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geometry_programs.code = program_result.first;
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}
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}
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if (program_type == Maxwell::ShaderProgram::Fragment) {
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SaveAlphaTestingLocations();
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}
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}
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}
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GLuint CachedShader::GetProgramResourceIndex(const GLShader::ConstBufferEntry& buffer) {
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GLuint CachedShader::GetProgramResourceIndex(const GLShader::ConstBufferEntry& buffer) {
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@ -138,22 +134,6 @@ GLuint CachedShader::LazyGeometryProgram(OGLProgram& target_program,
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return target_program.handle;
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return target_program.handle;
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};
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};
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void CachedShader::SetAlphaTesting(const bool enable, const float ref, const u32 func) {
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if (program_type == Maxwell::ShaderProgram::Fragment) {
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glProgramUniform1ui(program.handle, alpha_test.enable_loc,
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(enable ? 1 : 0));
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glProgramUniform1f(program.handle, alpha_test.ref_loc,
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ref);
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glProgramUniform1ui(program.handle, alpha_test.func_loc, func);
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}
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}
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void CachedShader::SaveAlphaTestingLocations() {
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alpha_test.enable_loc = glGetUniformLocation(program.handle, "alpha_testing_enable");
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alpha_test.ref_loc = glGetUniformLocation(program.handle, "alpha_testing_ref");
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alpha_test.func_loc = glGetUniformLocation(program.handle, "alpha_testing_func");
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}
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Shader ShaderCacheOpenGL::GetStageProgram(Maxwell::ShaderProgram program) {
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Shader ShaderCacheOpenGL::GetStageProgram(Maxwell::ShaderProgram program) {
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const VAddr program_addr{GetShaderAddress(program)};
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const VAddr program_addr{GetShaderAddress(program)};
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@ -73,15 +73,11 @@ public:
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/// Gets the GL uniform location for the specified resource, caching as needed
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/// Gets the GL uniform location for the specified resource, caching as needed
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GLint GetUniformLocation(const GLShader::SamplerEntry& sampler);
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GLint GetUniformLocation(const GLShader::SamplerEntry& sampler);
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void SetAlphaTesting(const bool enable, const float ref, const u32 func);
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private:
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private:
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/// Generates a geometry shader or returns one that already exists.
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/// Generates a geometry shader or returns one that already exists.
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GLuint LazyGeometryProgram(OGLProgram& target_program, const std::string& glsl_topology,
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GLuint LazyGeometryProgram(OGLProgram& target_program, const std::string& glsl_topology,
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const std::string& debug_name);
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const std::string& debug_name);
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void SaveAlphaTestingLocations();
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VAddr addr;
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VAddr addr;
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Maxwell::ShaderProgram program_type;
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Maxwell::ShaderProgram program_type;
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GLShader::ShaderSetup setup;
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GLShader::ShaderSetup setup;
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@ -102,12 +98,6 @@ private:
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OGLProgram triangles_adjacency;
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OGLProgram triangles_adjacency;
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} geometry_programs;
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} geometry_programs;
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struct {
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GLint enable_loc;
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GLint ref_loc;
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GLint func_loc;
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} alpha_test;
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std::map<u32, GLuint> resource_cache;
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std::map<u32, GLuint> resource_cache;
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std::map<u32, GLint> uniform_cache;
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std::map<u32, GLint> uniform_cache;
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};
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};
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@ -643,13 +643,6 @@ private:
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';');
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';');
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}
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}
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declarations.AddNewLine();
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declarations.AddNewLine();
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if (stage == Maxwell3D::Regs::ShaderStage::Fragment) {
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declarations.AddLine("uniform bool alpha_testing_active;");
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declarations.AddLine("uniform float alpha_testing_ref;");
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declarations.AddLine("uniform uint alpha_testing_func;");
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}
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declarations.AddNewLine();
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}
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}
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/// Generates declarations used for geometry shaders.
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/// Generates declarations used for geometry shaders.
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@ -1271,17 +1264,20 @@ private:
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ASSERT_MSG(header.ps.omap.sample_mask == 0, "Samplemask write is unimplemented");
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ASSERT_MSG(header.ps.omap.sample_mask == 0, "Samplemask write is unimplemented");
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shader.AddLine("if (alpha_testing_active) {");
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shader.AddLine("if (alpha_test[0] != 0) {");
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++shader.scope;
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++shader.scope;
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// We start on the register containing the alpha value in the first RT.
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u32 current_reg = 3;
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u32 current_reg = 3;
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for (u32 render_target = 0; render_target < Maxwell3D::Regs::NumRenderTargets;
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for (u32 render_target = 0; render_target < Maxwell3D::Regs::NumRenderTargets;
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++render_target) {
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++render_target) {
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// TODO(Blinkhawk): verify the behavior of alpha testing on hardware when
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// multiple render targets are used.
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if (header.ps.IsColorComponentOutputEnabled(render_target, 0) ||
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if (header.ps.IsColorComponentOutputEnabled(render_target, 0) ||
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header.ps.IsColorComponentOutputEnabled(render_target, 1) ||
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header.ps.IsColorComponentOutputEnabled(render_target, 1) ||
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header.ps.IsColorComponentOutputEnabled(render_target, 2) ||
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header.ps.IsColorComponentOutputEnabled(render_target, 2) ||
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header.ps.IsColorComponentOutputEnabled(render_target, 3)) {
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header.ps.IsColorComponentOutputEnabled(render_target, 3)) {
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shader.AddLine(fmt::format(
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shader.AddLine(fmt::format(
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"if (AlphaFunc({}, alpha_testing_ref, alpha_testing_func)) discard;",
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"if (AlphaFunc({})) discard;",
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regs.GetRegisterAsFloat(current_reg)));
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regs.GetRegisterAsFloat(current_reg)));
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current_reg += 4;
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current_reg += 4;
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}
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}
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@ -3506,38 +3502,6 @@ private:
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declarations.AddLine("bool " + pred + " = false;");
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declarations.AddLine("bool " + pred + " = false;");
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}
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}
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declarations.AddNewLine();
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declarations.AddNewLine();
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GenerateFunctionDeclarations();
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}
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void GenerateFunctionDeclarations() {
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if (stage == Maxwell3D::Regs::ShaderStage::Fragment) {
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declarations.AddLine("bool AlphaFunc(in float value, in float ref, in uint func) {");
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declarations.scope++;
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declarations.AddLine("switch (func) {");
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declarations.scope++;
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declarations.AddLine("case 1:");
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declarations.AddLine("return false;");
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declarations.AddLine("case 2:");
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declarations.AddLine("return value < ref;");
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declarations.AddLine("case 3:");
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declarations.AddLine("return value == ref;");
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declarations.AddLine("case 4:");
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declarations.AddLine("return value <= ref;");
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declarations.AddLine("case 5:");
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declarations.AddLine("return value > ref;");
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declarations.AddLine("case 6:");
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declarations.AddLine("return value != ref;");
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declarations.AddLine("case 7:");
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declarations.AddLine("return value >= ref;");
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declarations.AddLine("case 8:");
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declarations.AddLine("return true;");
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declarations.AddLine("default:");
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declarations.AddLine("return false;");
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declarations.scope--;
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declarations.AddLine('}');
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declarations.scope--;
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declarations.AddLine('}');
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}
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}
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}
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private:
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private:
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@ -29,6 +29,7 @@ layout(std140) uniform vs_config {
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vec4 viewport_flip;
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vec4 viewport_flip;
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uvec4 instance_id;
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uvec4 instance_id;
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uvec4 flip_stage;
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uvec4 flip_stage;
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uvec4 alpha_test;
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};
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};
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)";
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)";
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@ -105,6 +106,7 @@ layout (std140) uniform gs_config {
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vec4 viewport_flip;
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vec4 viewport_flip;
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uvec4 instance_id;
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uvec4 instance_id;
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uvec4 flip_stage;
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uvec4 flip_stage;
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uvec4 alpha_test;
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};
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};
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void main() {
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void main() {
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@ -142,8 +144,33 @@ layout (std140) uniform fs_config {
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vec4 viewport_flip;
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vec4 viewport_flip;
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uvec4 instance_id;
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uvec4 instance_id;
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uvec4 flip_stage;
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uvec4 flip_stage;
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uvec4 alpha_test;
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};
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};
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bool AlphaFunc(in float value) {
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float ref = uintBitsToFloat(alpha_test[2]);
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switch (alpha_test[1]) {
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case 1:
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return false;
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case 2:
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return value < ref;
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case 3:
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return value == ref;
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case 4:
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return value <= ref;
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case 5:
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return value > ref;
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case 6:
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return value != ref;
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case 7:
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return value >= ref;
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case 8:
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return true;
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default:
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return false;
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}
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}
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void main() {
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void main() {
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exec_fragment();
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exec_fragment();
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}
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}
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@ -16,6 +16,17 @@ void MaxwellUniformData::SetFromRegs(const Maxwell3D::State::ShaderStageInfo& sh
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viewport_flip[0] = regs.viewport_transform[0].scale_x < 0.0 ? -1.0f : 1.0f;
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viewport_flip[0] = regs.viewport_transform[0].scale_x < 0.0 ? -1.0f : 1.0f;
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viewport_flip[1] = regs.viewport_transform[0].scale_y < 0.0 ? -1.0f : 1.0f;
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viewport_flip[1] = regs.viewport_transform[0].scale_y < 0.0 ? -1.0f : 1.0f;
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u32 func = static_cast<u32>(regs.alpha_test_func);
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// Normalize the gl variants of opCompare to be the same as the normal variants
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u32 op_gl_variant_base = static_cast<u32>(Tegra::Engines::Maxwell3D::Regs::ComparisonOp::Never);
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if (func >= op_gl_variant_base) {
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func = func - op_gl_variant_base + 1U;
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}
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alpha_test.enabled = regs.alpha_test_enabled;
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alpha_test.func = func;
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alpha_test.ref = regs.alpha_test_ref;
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// We only assign the instance to the first component of the vector, the rest is just padding.
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// We only assign the instance to the first component of the vector, the rest is just padding.
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instance_id[0] = state.current_instance;
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instance_id[0] = state.current_instance;
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@ -22,8 +22,14 @@ struct MaxwellUniformData {
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alignas(16) GLvec4 viewport_flip;
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alignas(16) GLvec4 viewport_flip;
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alignas(16) GLuvec4 instance_id;
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alignas(16) GLuvec4 instance_id;
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alignas(16) GLuvec4 flip_stage;
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alignas(16) GLuvec4 flip_stage;
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struct alignas(16) {
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GLuint enabled;
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GLuint func;
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GLfloat ref;
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GLuint padding;
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} alpha_test;
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};
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};
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static_assert(sizeof(MaxwellUniformData) == 48, "MaxwellUniformData structure size is incorrect");
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static_assert(sizeof(MaxwellUniformData) == 64, "MaxwellUniformData structure size is incorrect");
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static_assert(sizeof(MaxwellUniformData) < 16384,
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static_assert(sizeof(MaxwellUniformData) < 16384,
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"MaxwellUniformData structure must be less than 16kb as per the OpenGL spec");
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"MaxwellUniformData structure must be less than 16kb as per the OpenGL spec");
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