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https://git.suyu.dev/suyu/suyu
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spirv: Remove dependencies on Environment when generating SPIR-V
This commit is contained in:
parent
cb6039ccea
commit
675a82416d
5 changed files with 15 additions and 16 deletions
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@ -126,12 +126,12 @@ Id DefineMain(EmitContext& ctx, IR::Program& program) {
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return main;
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return main;
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}
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}
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void DefineEntryPoint(Environment& env, const IR::Program& program, EmitContext& ctx, Id main) {
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void DefineEntryPoint(const IR::Program& program, EmitContext& ctx, Id main) {
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const std::span interfaces(ctx.interfaces.data(), ctx.interfaces.size());
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const std::span interfaces(ctx.interfaces.data(), ctx.interfaces.size());
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spv::ExecutionModel execution_model{};
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spv::ExecutionModel execution_model{};
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switch (program.stage) {
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switch (program.stage) {
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case Shader::Stage::Compute: {
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case Shader::Stage::Compute: {
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const std::array<u32, 3> workgroup_size{env.WorkgroupSize()};
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const std::array<u32, 3> workgroup_size{program.workgroup_size};
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execution_model = spv::ExecutionModel::GLCompute;
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execution_model = spv::ExecutionModel::GLCompute;
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ctx.AddExecutionMode(main, spv::ExecutionMode::LocalSize, workgroup_size[0],
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ctx.AddExecutionMode(main, spv::ExecutionMode::LocalSize, workgroup_size[0],
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workgroup_size[1], workgroup_size[2]);
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workgroup_size[1], workgroup_size[2]);
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@ -148,7 +148,7 @@ void DefineEntryPoint(Environment& env, const IR::Program& program, EmitContext&
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}
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}
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break;
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break;
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default:
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default:
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throw NotImplementedException("Stage {}", env.ShaderStage());
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throw NotImplementedException("Stage {}", program.stage);
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}
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}
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ctx.AddEntryPoint(execution_model, main, "main", interfaces);
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ctx.AddEntryPoint(execution_model, main, "main", interfaces);
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}
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}
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@ -267,11 +267,10 @@ Id PhiArgDef(EmitContext& ctx, IR::Inst* inst, size_t index) {
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}
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}
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} // Anonymous namespace
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} // Anonymous namespace
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std::vector<u32> EmitSPIRV(const Profile& profile, Environment& env, IR::Program& program,
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std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program, u32& binding) {
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u32& binding) {
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EmitContext ctx{profile, program, binding};
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EmitContext ctx{profile, program, binding};
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const Id main{DefineMain(ctx, program)};
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const Id main{DefineMain(ctx, program)};
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DefineEntryPoint(env, program, ctx, main);
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DefineEntryPoint(program, ctx, main);
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if (profile.support_float_controls) {
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if (profile.support_float_controls) {
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ctx.AddExtension("SPV_KHR_float_controls");
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ctx.AddExtension("SPV_KHR_float_controls");
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SetupDenormControl(profile, program, ctx, main);
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SetupDenormControl(profile, program, ctx, main);
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@ -8,15 +8,14 @@
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "shader_recompiler/backend/spirv/emit_context.h"
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#include "shader_recompiler/backend/spirv/emit_context.h"
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#include "shader_recompiler/environment.h"
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#include "shader_recompiler/frontend/ir/microinstruction.h"
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#include "shader_recompiler/frontend/ir/microinstruction.h"
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#include "shader_recompiler/frontend/ir/program.h"
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#include "shader_recompiler/frontend/ir/program.h"
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#include "shader_recompiler/profile.h"
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#include "shader_recompiler/profile.h"
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namespace Shader::Backend::SPIRV {
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namespace Shader::Backend::SPIRV {
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[[nodiscard]] std::vector<u32> EmitSPIRV(const Profile& profile, Environment& env,
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[[nodiscard]] std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program,
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IR::Program& program, u32& binding);
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u32& binding);
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// Microinstruction emitters
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// Microinstruction emitters
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Id EmitPhi(EmitContext& ctx, IR::Inst* inst);
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Id EmitPhi(EmitContext& ctx, IR::Inst* inst);
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@ -4,6 +4,7 @@
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#pragma once
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#pragma once
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#include <array>
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#include <string>
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#include <string>
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#include <boost/container/small_vector.hpp>
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#include <boost/container/small_vector.hpp>
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@ -19,6 +20,7 @@ struct Program {
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BlockList post_order_blocks;
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BlockList post_order_blocks;
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Info info;
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Info info;
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Stage stage{};
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Stage stage{};
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std::array<u32, 3> workgroup_size{};
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};
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};
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[[nodiscard]] std::string DumpProgram(const Program& program);
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[[nodiscard]] std::string DumpProgram(const Program& program);
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@ -33,6 +33,9 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
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program.blocks = VisitAST(inst_pool, block_pool, env, cfg);
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program.blocks = VisitAST(inst_pool, block_pool, env, cfg);
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program.post_order_blocks = PostOrder(program.blocks);
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program.post_order_blocks = PostOrder(program.blocks);
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program.stage = env.ShaderStage();
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program.stage = env.ShaderStage();
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if (program.stage == Stage::Compute) {
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program.workgroup_size = env.WorkgroupSize();
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}
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RemoveUnreachableBlocks(program);
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RemoveUnreachableBlocks(program);
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// Replace instructions before the SSA rewrite
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// Replace instructions before the SSA rewrite
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@ -680,7 +680,6 @@ GraphicsPipeline PipelineCache::CreateGraphicsPipeline(ShaderPools& pools,
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std::array<vk::ShaderModule, Maxwell::MaxShaderStage> modules;
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std::array<vk::ShaderModule, Maxwell::MaxShaderStage> modules;
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u32 binding{0};
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u32 binding{0};
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env_index = 0;
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for (size_t index = 0; index < Maxwell::MaxShaderProgram; ++index) {
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for (size_t index = 0; index < Maxwell::MaxShaderProgram; ++index) {
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if (key.unique_hashes[index] == u128{}) {
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if (key.unique_hashes[index] == u128{}) {
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continue;
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continue;
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@ -691,11 +690,8 @@ GraphicsPipeline PipelineCache::CreateGraphicsPipeline(ShaderPools& pools,
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const size_t stage_index{index - 1};
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const size_t stage_index{index - 1};
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infos[stage_index] = &program.info;
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infos[stage_index] = &program.info;
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Shader::Environment& env{*envs[env_index]};
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const Shader::Profile profile{MakeProfile(key, program.stage)};
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++env_index;
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const std::vector<u32> code{EmitSPIRV(profile, program, binding)};
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const Shader::Profile profile{MakeProfile(key, env.ShaderStage())};
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const std::vector<u32> code{EmitSPIRV(profile, env, program, binding)};
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modules[stage_index] = BuildShader(device, code);
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modules[stage_index] = BuildShader(device, code);
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}
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}
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return GraphicsPipeline(maxwell3d, gpu_memory, scheduler, buffer_cache, texture_cache, device,
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return GraphicsPipeline(maxwell3d, gpu_memory, scheduler, buffer_cache, texture_cache, device,
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@ -753,7 +749,7 @@ ComputePipeline PipelineCache::CreateComputePipeline(ShaderPools& pools,
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Shader::Maxwell::Flow::CFG cfg{env, pools.flow_block, env.StartAddress()};
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Shader::Maxwell::Flow::CFG cfg{env, pools.flow_block, env.StartAddress()};
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Shader::IR::Program program{TranslateProgram(pools.inst, pools.block, env, cfg)};
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Shader::IR::Program program{TranslateProgram(pools.inst, pools.block, env, cfg)};
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u32 binding{0};
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u32 binding{0};
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std::vector<u32> code{EmitSPIRV(base_profile, env, program, binding)};
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std::vector<u32> code{EmitSPIRV(base_profile, program, binding)};
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return ComputePipeline{device, descriptor_pool, update_descriptor_queue, program.info,
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return ComputePipeline{device, descriptor_pool, update_descriptor_queue, program.info,
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BuildShader(device, code)};
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BuildShader(device, code)};
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}
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}
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