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core/memory: Amend address widths in asserts

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Addresses are 64-bit, these formatting specifiers are simply holdovers from citra. Adjust them to be the correct width.
This commit is contained in:
Lioncash 2018-04-25 12:17:25 -04:00
parent 59dae03dbe
commit 6d00780045
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 2 additions and 2 deletions
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src/core/memory.cpp
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@ -172,7 +172,7 @@ T Read(const VAddr vaddr) {
NGLOG_ERROR(HW_Memory, "Unmapped Read{} @ {:#010X}", sizeof(T) * 8, vaddr);
return 0;
case PageType::Memory:
ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
ASSERT_MSG(false, "Mapped memory page without a pointer @ %016" PRIX64, vaddr);
break;
case PageType::RasterizerCachedMemory: {
RasterizerFlushVirtualRegion(vaddr, sizeof(T), FlushMode::Flush);
@ -205,7 +205,7 @@ void Write(const VAddr vaddr, const T data) {
vaddr);
return;
case PageType::Memory:
ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
ASSERT_MSG(false, "Mapped memory page without a pointer @ %016" PRIX64, vaddr);
break;
case PageType::RasterizerCachedMemory: {
RasterizerFlushVirtualRegion(vaddr, sizeof(T), FlushMode::Invalidate);