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SVC/ARM: Correct svcSendSyncRequest and cache ticks on arm interface.
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parent
f2ade343e2
commit
87c49aa7be
3 changed files with 20 additions and 5 deletions
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@ -72,17 +72,23 @@ public:
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}
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void AddTicks(u64 ticks) override {
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/// We are using host timing, NOP
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this->ticks -= ticks;
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}
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u64 GetTicksRemaining() override {
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if (!parent.interrupt_handler.IsInterrupted()) {
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return 1000ULL;
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return std::max<s64>(ticks, 0);
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}
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return 0ULL;
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}
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void ResetTicks() {
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ticks = 1000LL;
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}
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ARM_Dynarmic_32& parent;
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std::size_t num_interpreted_instructions{};
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s64 ticks{};
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};
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std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable& page_table,
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@ -97,6 +103,7 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable&
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}
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void ARM_Dynarmic_32::Run() {
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cb->ResetTicks();
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jit->Run();
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}
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@ -124,22 +124,29 @@ public:
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}
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void AddTicks(u64 ticks) override {
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/// We are using host timing, NOP
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this->ticks -= ticks;
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}
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u64 GetTicksRemaining() override {
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if (!parent.interrupt_handler.IsInterrupted()) {
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return 1000ULL;
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return std::max<s64>(ticks, 0);
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}
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return 0ULL;
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}
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u64 GetCNTPCT() override {
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return parent.system.CoreTiming().GetClockTicks();
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}
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void ResetTicks() {
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ticks = 1000LL;
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}
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ARM_Dynarmic_64& parent;
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std::size_t num_interpreted_instructions = 0;
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u64 tpidrro_el0 = 0;
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u64 tpidr_el0 = 0;
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s64 ticks{};
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};
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std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable& page_table,
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@ -181,6 +188,7 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable&
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}
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void ARM_Dynarmic_64::Run() {
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cb->ResetTicks();
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jit->Run();
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}
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@ -342,7 +342,7 @@ static ResultCode SendSyncRequest(Core::System& system, Handle handle) {
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thread->InvokeHLECallback(SharedFrom(thread));
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}
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return RESULT_SUCCESS;
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return thread->GetSignalingResult();
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}
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static ResultCode SendSyncRequest32(Core::System& system, Handle handle) {
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