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https://git.suyu.dev/suyu/suyu
synced 2024-12-24 10:23:01 -06:00
BufferCache: Implement OnCPUWrite and SyncGuestHost
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parent
da8f17715d
commit
8b1eb44b3e
6 changed files with 67 additions and 7 deletions
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@ -5,6 +5,7 @@
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#pragma once
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#pragma once
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#include <array>
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#include <array>
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#include <list>
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#include <memory>
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#include <memory>
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#include <mutex>
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#include <mutex>
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#include <unordered_map>
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#include <unordered_map>
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@ -137,7 +138,9 @@ public:
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});
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});
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for (auto& object : objects) {
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for (auto& object : objects) {
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if (object->IsModified() && object->IsRegistered()) {
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if (object->IsModified() && object->IsRegistered()) {
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mutex.unlock();
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FlushMap(object);
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FlushMap(object);
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mutex.lock();
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}
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}
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}
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}
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}
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}
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@ -154,6 +157,30 @@ public:
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}
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}
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}
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}
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void OnCPUWrite(VAddr addr, std::size_t size) {
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std::lock_guard lock{mutex};
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for (const auto& object : GetMapsInRange(addr, size)) {
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if (object->IsMemoryMarked() && object->IsRegistered()) {
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Unmark(object);
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object->SetSyncPending(true);
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marked_for_unregister.emplace_back(object);
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}
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}
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}
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void SyncGuestHost() {
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std::lock_guard lock{mutex};
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for (const auto& object : marked_for_unregister) {
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if (object->IsRegistered()) {
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object->SetSyncPending(false);
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Unregister(object);
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}
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}
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marked_for_unregister.clear();
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}
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virtual BufferType GetEmptyBuffer(std::size_t size) = 0;
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virtual BufferType GetEmptyBuffer(std::size_t size) = 0;
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protected:
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protected:
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@ -196,17 +223,30 @@ protected:
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const IntervalType interval{new_map->GetStart(), new_map->GetEnd()};
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const IntervalType interval{new_map->GetStart(), new_map->GetEnd()};
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mapped_addresses.insert({interval, new_map});
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mapped_addresses.insert({interval, new_map});
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rasterizer.UpdatePagesCachedCount(cpu_addr, size, 1);
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rasterizer.UpdatePagesCachedCount(cpu_addr, size, 1);
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new_map->SetMemoryMarked(true);
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if (inherit_written) {
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if (inherit_written) {
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MarkRegionAsWritten(new_map->GetStart(), new_map->GetEnd() - 1);
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MarkRegionAsWritten(new_map->GetStart(), new_map->GetEnd() - 1);
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new_map->MarkAsWritten(true);
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new_map->MarkAsWritten(true);
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}
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}
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}
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}
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/// Unregisters an object from the cache
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void Unmark(const MapInterval& map) {
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void Unregister(MapInterval& map) {
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if (!map->IsMemoryMarked()) {
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return;
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}
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const std::size_t size = map->GetEnd() - map->GetStart();
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const std::size_t size = map->GetEnd() - map->GetStart();
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rasterizer.UpdatePagesCachedCount(map->GetStart(), size, -1);
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rasterizer.UpdatePagesCachedCount(map->GetStart(), size, -1);
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map->SetMemoryMarked(false);
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}
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/// Unregisters an object from the cache
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void Unregister(const MapInterval& map) {
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Unmark(map);
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map->MarkAsRegistered(false);
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map->MarkAsRegistered(false);
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if (map->IsSyncPending()) {
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marked_for_unregister.remove(map);
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map->SetSyncPending(false);
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}
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if (map->IsWritten()) {
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if (map->IsWritten()) {
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UnmarkRegionAsWritten(map->GetStart(), map->GetEnd() - 1);
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UnmarkRegionAsWritten(map->GetStart(), map->GetEnd() - 1);
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}
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}
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@ -479,6 +519,7 @@ private:
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u64 modified_ticks = 0;
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u64 modified_ticks = 0;
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std::vector<u8> staging_buffer;
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std::vector<u8> staging_buffer;
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std::list<MapInterval> marked_for_unregister;
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std::recursive_mutex mutex;
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std::recursive_mutex mutex;
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};
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};
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@ -46,6 +46,22 @@ public:
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return is_registered;
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return is_registered;
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}
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}
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void SetMemoryMarked(bool is_memory_marked_) {
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is_memory_marked = is_memory_marked_;
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}
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bool IsMemoryMarked() const {
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return is_memory_marked;
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}
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void SetSyncPending(bool is_sync_pending_) {
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is_sync_pending = is_sync_pending_;
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}
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bool IsSyncPending() const {
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return is_sync_pending;
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}
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VAddr GetStart() const {
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VAddr GetStart() const {
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return start;
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return start;
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}
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}
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@ -83,6 +99,8 @@ private:
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bool is_written{};
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bool is_written{};
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bool is_modified{};
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bool is_modified{};
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bool is_registered{};
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bool is_registered{};
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bool is_memory_marked{};
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bool is_sync_pending{};
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u64 ticks{};
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u64 ticks{};
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};
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};
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@ -21,6 +21,7 @@ MICROPROFILE_DEFINE(DispatchCalls, "GPU", "Execute command buffer", MP_RGB(128,
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void DmaPusher::DispatchCalls() {
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void DmaPusher::DispatchCalls() {
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MICROPROFILE_SCOPE(DispatchCalls);
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MICROPROFILE_SCOPE(DispatchCalls);
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gpu.SyncGuestHost();
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// On entering GPU code, assume all memory may be touched by the ARM core.
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// On entering GPU code, assume all memory may be touched by the ARM core.
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gpu.Maxwell3D().OnMemoryWrite();
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gpu.Maxwell3D().OnMemoryWrite();
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@ -78,7 +78,7 @@ void ThreadManager::SwapBuffers(const Tegra::FramebufferConfig* framebuffer) {
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}
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}
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void ThreadManager::FlushRegion(VAddr addr, u64 size) {
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void ThreadManager::FlushRegion(VAddr addr, u64 size) {
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PushCommand(FlushRegionCommand(addr, size));
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system.Renderer().Rasterizer().FlushRegion(addr, size);
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}
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}
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void ThreadManager::InvalidateRegion(VAddr addr, u64 size) {
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void ThreadManager::InvalidateRegion(VAddr addr, u64 size) {
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@ -667,13 +667,13 @@ void RasterizerOpenGL::OnCPUWrite(VAddr addr, u64 size) {
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}
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}
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texture_cache.OnCPUWrite(addr, size);
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texture_cache.OnCPUWrite(addr, size);
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shader_cache.InvalidateRegion(addr, size);
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shader_cache.InvalidateRegion(addr, size);
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buffer_cache.InvalidateRegion(addr, size);
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buffer_cache.OnCPUWrite(addr, size);
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}
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}
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void RasterizerOpenGL::SyncGuestHost() {
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void RasterizerOpenGL::SyncGuestHost() {
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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MICROPROFILE_SCOPE(OpenGL_CacheManagement);
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texture_cache.SyncGuestHost();
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texture_cache.SyncGuestHost();
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// buffer_cache.SyncGuestHost();
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buffer_cache.SyncGuestHost();
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}
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}
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void RasterizerOpenGL::FlushAndInvalidateRegion(VAddr addr, u64 size) {
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void RasterizerOpenGL::FlushAndInvalidateRegion(VAddr addr, u64 size) {
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@ -530,12 +530,12 @@ void RasterizerVulkan::OnCPUWrite(VAddr addr, u64 size) {
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}
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}
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texture_cache.OnCPUWrite(addr, size);
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texture_cache.OnCPUWrite(addr, size);
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pipeline_cache.InvalidateRegion(addr, size);
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pipeline_cache.InvalidateRegion(addr, size);
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buffer_cache.InvalidateRegion(addr, size);
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buffer_cache.OnCPUWrite(addr, size);
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}
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}
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void RasterizerVulkan::SyncGuestHost() {
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void RasterizerVulkan::SyncGuestHost() {
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texture_cache.SyncGuestHost();
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texture_cache.SyncGuestHost();
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// buffer_cache.SyncGuestHost();
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buffer_cache.SyncGuestHost();
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}
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}
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void RasterizerVulkan::FlushAndInvalidateRegion(VAddr addr, u64 size) {
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void RasterizerVulkan::FlushAndInvalidateRegion(VAddr addr, u64 size) {
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