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Merge pull request #547 from Subv/compressed_alignment
GLCache: Align compressed texture sizes to their compression ratio, and then align that compressed size to the block height for tiled textures.
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commit
a931cf9e8b
1 changed files with 7 additions and 2 deletions
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@ -1033,8 +1033,11 @@ Surface RasterizerCacheOpenGL::GetTextureSurface(const Tegra::Texture::FullTextu
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params.addr = config.tic.Address();
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params.addr = config.tic.Address();
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params.is_tiled = config.tic.IsTiled();
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params.is_tiled = config.tic.IsTiled();
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params.pixel_format = SurfaceParams::PixelFormatFromTextureFormat(config.tic.format);
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params.pixel_format = SurfaceParams::PixelFormatFromTextureFormat(config.tic.format);
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params.width = config.tic.Width() / params.GetCompresssionFactor();
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params.height = config.tic.Height() / params.GetCompresssionFactor();
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params.width = Common::AlignUp(config.tic.Width(), params.GetCompresssionFactor()) /
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params.GetCompresssionFactor();
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params.height = Common::AlignUp(config.tic.Height(), params.GetCompresssionFactor()) /
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params.GetCompresssionFactor();
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// TODO(Subv): Different types per component are not supported.
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// TODO(Subv): Different types per component are not supported.
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ASSERT(config.tic.r_type.Value() == config.tic.g_type.Value() &&
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ASSERT(config.tic.r_type.Value() == config.tic.g_type.Value() &&
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@ -1045,6 +1048,8 @@ Surface RasterizerCacheOpenGL::GetTextureSurface(const Tegra::Texture::FullTextu
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if (config.tic.IsTiled()) {
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if (config.tic.IsTiled()) {
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params.block_height = config.tic.BlockHeight();
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params.block_height = config.tic.BlockHeight();
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params.width = Common::AlignUp(params.width, params.block_height);
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params.height = Common::AlignUp(params.height, params.block_height);
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} else {
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} else {
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// Use the texture-provided stride value if the texture isn't tiled.
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// Use the texture-provided stride value if the texture isn't tiled.
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params.stride = static_cast<u32>(params.PixelsInBytes(config.tic.Pitch()));
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params.stride = static_cast<u32>(params.PixelsInBytes(config.tic.Pitch()));
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