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video_core/GPU Implemented the GPU PFIFO puller semaphore operations. (#1908)
* Implemented the puller semaphore operations. * Nit: Fix 2 style issues * Nit: Add Break to default case. * Fix style. * Update for comments. Added ReferenceCount method * Forgot to remove GpuSmaphoreAddress union. * Fix the clang-format issues. * More clang formatting. * two more white spaces for the Clang formatting. * Move puller members into the regs union * Updated to use Memory::WriteBlock instead of Memory::Write* * Fix clang style issues * White space clang error * Removing unused funcitons and other pr comment * Removing unused funcitons and other pr comment * More union magic for setting regs value. * union magic refcnt as well * Remove local var * Set up the regs and regs_assert_positions up properly * Fix clang error
This commit is contained in:
Kevin
bunnei
parent
2561a79c39
commit
ba38d91fe2
2 changed files with 242 additions and 12 deletions
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@ -3,6 +3,8 @@
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "core/core_timing.h"
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#include "core/memory.h"
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#include "video_core/engines/fermi_2d.h"
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#include "video_core/engines/kepler_memory.h"
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#include "video_core/engines/maxwell_3d.h"
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@ -124,9 +126,36 @@ u32 DepthFormatBytesPerPixel(DepthFormat format) {
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}
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}
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// Note that, traditionally, methods are treated as 4-byte addressable locations, and hence
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// their numbers are written down multiplied by 4 in Docs. Here we are not multiply by 4.
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// So the values you see in docs might be multiplied by 4.
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enum class BufferMethods {
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BindObject = 0,
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CountBufferMethods = 0x40,
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BindObject = 0x0,
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Nop = 0x2,
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SemaphoreAddressHigh = 0x4,
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SemaphoreAddressLow = 0x5,
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SemaphoreSequence = 0x6,
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SemaphoreTrigger = 0x7,
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NotifyIntr = 0x8,
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WrcacheFlush = 0x9,
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Unk28 = 0xA,
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Unk2c = 0xB,
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RefCnt = 0x14,
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SemaphoreAcquire = 0x1A,
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SemaphoreRelease = 0x1B,
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Unk70 = 0x1C,
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Unk74 = 0x1D,
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Unk78 = 0x1E,
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Unk7c = 0x1F,
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Yield = 0x20,
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NonPullerMethods = 0x40,
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};
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enum class GpuSemaphoreOperation {
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AcquireEqual = 0x1,
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WriteLong = 0x2,
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AcquireGequal = 0x4,
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AcquireMask = 0x8,
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};
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void GPU::CallMethod(const MethodCall& method_call) {
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@ -135,20 +164,78 @@ void GPU::CallMethod(const MethodCall& method_call) {
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ASSERT(method_call.subchannel < bound_engines.size());
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if (method_call.method == static_cast<u32>(BufferMethods::BindObject)) {
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// Bind the current subchannel to the desired engine id.
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LOG_DEBUG(HW_GPU, "Binding subchannel {} to engine {}", method_call.subchannel,
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method_call.argument);
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bound_engines[method_call.subchannel] = static_cast<EngineID>(method_call.argument);
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return;
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if (ExecuteMethodOnEngine(method_call)) {
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CallEngineMethod(method_call);
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} else {
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CallPullerMethod(method_call);
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}
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}
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if (method_call.method < static_cast<u32>(BufferMethods::CountBufferMethods)) {
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// TODO(Subv): Research and implement these methods.
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LOG_ERROR(HW_GPU, "Special buffer methods other than Bind are not implemented");
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return;
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bool GPU::ExecuteMethodOnEngine(const MethodCall& method_call) {
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const auto method = static_cast<BufferMethods>(method_call.method);
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return method >= BufferMethods::NonPullerMethods;
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}
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void GPU::CallPullerMethod(const MethodCall& method_call) {
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regs.reg_array[method_call.method] = method_call.argument;
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const auto method = static_cast<BufferMethods>(method_call.method);
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switch (method) {
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case BufferMethods::BindObject: {
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ProcessBindMethod(method_call);
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break;
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}
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case BufferMethods::Nop:
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case BufferMethods::SemaphoreAddressHigh:
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case BufferMethods::SemaphoreAddressLow:
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case BufferMethods::SemaphoreSequence:
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case BufferMethods::RefCnt:
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break;
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case BufferMethods::SemaphoreTrigger: {
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ProcessSemaphoreTriggerMethod();
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break;
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}
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case BufferMethods::NotifyIntr: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method NotifyIntr not implemented");
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break;
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}
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case BufferMethods::WrcacheFlush: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method WrcacheFlush not implemented");
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break;
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}
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case BufferMethods::Unk28: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method Unk28 not implemented");
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break;
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}
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case BufferMethods::Unk2c: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method Unk2c not implemented");
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break;
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}
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case BufferMethods::SemaphoreAcquire: {
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ProcessSemaphoreAcquire();
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break;
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}
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case BufferMethods::SemaphoreRelease: {
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ProcessSemaphoreRelease();
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break;
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}
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case BufferMethods::Yield: {
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// TODO(Kmather73): Research and implement this method.
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LOG_ERROR(HW_GPU, "Special puller engine method Yield not implemented");
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break;
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}
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default:
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LOG_ERROR(HW_GPU, "Special puller engine method {:X} not implemented",
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static_cast<u32>(method));
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break;
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}
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}
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void GPU::CallEngineMethod(const MethodCall& method_call) {
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const EngineID engine = bound_engines[method_call.subchannel];
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switch (engine) {
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@ -172,4 +259,76 @@ void GPU::CallMethod(const MethodCall& method_call) {
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}
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}
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void GPU::ProcessBindMethod(const MethodCall& method_call) {
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// Bind the current subchannel to the desired engine id.
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LOG_DEBUG(HW_GPU, "Binding subchannel {} to engine {}", method_call.subchannel,
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method_call.argument);
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bound_engines[method_call.subchannel] = static_cast<EngineID>(method_call.argument);
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}
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void GPU::ProcessSemaphoreTriggerMethod() {
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const auto semaphoreOperationMask = 0xF;
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const auto op =
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static_cast<GpuSemaphoreOperation>(regs.semaphore_trigger & semaphoreOperationMask);
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if (op == GpuSemaphoreOperation::WriteLong) {
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auto address = memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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struct Block {
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u32 sequence;
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u32 zeros = 0;
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u64 timestamp;
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};
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Block block{};
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block.sequence = regs.semaphore_sequence;
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// TODO(Kmather73): Generate a real GPU timestamp and write it here instead of
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// CoreTiming
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block.timestamp = CoreTiming::GetTicks();
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Memory::WriteBlock(*address, &block, sizeof(block));
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} else {
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const auto address =
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memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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const u32 word = Memory::Read32(*address);
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if ((op == GpuSemaphoreOperation::AcquireEqual && word == regs.semaphore_sequence) ||
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(op == GpuSemaphoreOperation::AcquireGequal &&
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static_cast<s32>(word - regs.semaphore_sequence) > 0) ||
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(op == GpuSemaphoreOperation::AcquireMask && (word & regs.semaphore_sequence))) {
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// Nothing to do in this case
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} else {
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regs.acquire_source = true;
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regs.acquire_value = regs.semaphore_sequence;
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if (op == GpuSemaphoreOperation::AcquireEqual) {
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regs.acquire_active = true;
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regs.acquire_mode = false;
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} else if (op == GpuSemaphoreOperation::AcquireGequal) {
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regs.acquire_active = true;
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regs.acquire_mode = true;
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} else if (op == GpuSemaphoreOperation::AcquireMask) {
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// TODO(kemathe) The acquire mask operation waits for a value that, ANDed with
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// semaphore_sequence, gives a non-0 result
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LOG_ERROR(HW_GPU, "Invalid semaphore operation AcquireMask not implemented");
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} else {
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LOG_ERROR(HW_GPU, "Invalid semaphore operation");
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}
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}
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}
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}
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void GPU::ProcessSemaphoreRelease() {
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const auto address = memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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Memory::Write32(*address, regs.semaphore_release);
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}
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void GPU::ProcessSemaphoreAcquire() {
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const auto address = memory_manager->GpuToCpuAddress(regs.smaphore_address.SmaphoreAddress());
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const u32 word = Memory::Read32(*address);
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const auto value = regs.semaphore_acquire;
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if (word != value) {
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regs.acquire_active = true;
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regs.acquire_value = value;
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// TODO(kemathe73) figure out how to do the acquire_timeout
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regs.acquire_mode = false;
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regs.acquire_source = false;
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}
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}
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} // namespace Tegra
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@ -156,6 +156,46 @@ public:
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/// Returns a const reference to the GPU DMA pusher.
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const Tegra::DmaPusher& DmaPusher() const;
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struct Regs {
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static constexpr size_t NUM_REGS = 0x100;
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union {
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struct {
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INSERT_PADDING_WORDS(0x4);
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struct {
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u32 address_high;
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u32 address_low;
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GPUVAddr SmaphoreAddress() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) |
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address_low);
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}
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} smaphore_address;
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u32 semaphore_sequence;
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u32 semaphore_trigger;
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INSERT_PADDING_WORDS(0xC);
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// The puser and the puller share the reference counter, the pusher only has read
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// access
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u32 reference_count;
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INSERT_PADDING_WORDS(0x5);
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u32 semaphore_acquire;
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u32 semaphore_release;
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INSERT_PADDING_WORDS(0xE4);
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// Puller state
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u32 acquire_mode;
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u32 acquire_source;
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u32 acquire_active;
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u32 acquire_timeout;
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u32 acquire_value;
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};
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std::array<u32, NUM_REGS> reg_array;
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};
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} regs{};
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private:
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std::unique_ptr<Tegra::DmaPusher> dma_pusher;
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std::unique_ptr<Tegra::MemoryManager> memory_manager;
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@ -173,6 +213,37 @@ private:
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std::unique_ptr<Engines::MaxwellDMA> maxwell_dma;
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/// Inline memory engine
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std::unique_ptr<Engines::KeplerMemory> kepler_memory;
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void ProcessBindMethod(const MethodCall& method_call);
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void ProcessSemaphoreTriggerMethod();
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void ProcessSemaphoreRelease();
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void ProcessSemaphoreAcquire();
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// Calls a GPU puller method.
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void CallPullerMethod(const MethodCall& method_call);
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// Calls a GPU engine method.
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void CallEngineMethod(const MethodCall& method_call);
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// Determines where the method should be executed.
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bool ExecuteMethodOnEngine(const MethodCall& method_call);
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};
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#define ASSERT_REG_POSITION(field_name, position) \
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static_assert(offsetof(GPU::Regs, field_name) == position * 4, \
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"Field " #field_name " has invalid position")
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ASSERT_REG_POSITION(smaphore_address, 0x4);
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ASSERT_REG_POSITION(semaphore_sequence, 0x6);
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ASSERT_REG_POSITION(semaphore_trigger, 0x7);
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ASSERT_REG_POSITION(reference_count, 0x14);
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ASSERT_REG_POSITION(semaphore_acquire, 0x1A);
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ASSERT_REG_POSITION(semaphore_release, 0x1B);
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ASSERT_REG_POSITION(acquire_mode, 0x100);
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ASSERT_REG_POSITION(acquire_source, 0x101);
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ASSERT_REG_POSITION(acquire_active, 0x102);
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ASSERT_REG_POSITION(acquire_timeout, 0x103);
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ASSERT_REG_POSITION(acquire_value, 0x104);
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#undef ASSERT_REG_POSITION
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} // namespace Tegra
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