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https://git.suyu.dev/suyu/suyu
synced 2024-12-23 09:53:10 -06:00
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3aca4a3490
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2 changed files with 11 additions and 265 deletions
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@ -33,6 +33,7 @@
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#include "video_core/memory_manager.h"
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#include "video_core/renderer_base.h"
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#include "video_core/shader_notify.h"
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#include "video_core/optimized_rasterizer.h"
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namespace Tegra {
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@ -57,285 +58,27 @@ struct GPU::Impl {
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fence_manager = std::make_unique<FenceManager>();
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}
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std::shared_ptr<Control::ChannelState> CreateChannel(s32 channel_id) {
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auto channel_state = std::make_shared<Tegra::Control::ChannelState>(channel_id);
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channels.emplace(channel_id, channel_state);
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scheduler->DeclareChannel(channel_state);
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return channel_state;
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}
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void BindChannel(s32 channel_id) {
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if (bound_channel == channel_id) {
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return;
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}
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auto it = channels.find(channel_id);
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ASSERT(it != channels.end());
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bound_channel = channel_id;
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current_channel = it->second.get();
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rasterizer->BindChannel(*current_channel);
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}
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std::shared_ptr<Control::ChannelState> AllocateChannel() {
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return CreateChannel(new_channel_id++);
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}
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void InitChannel(Control::ChannelState& to_init, u64 program_id) {
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to_init.Init(system, gpu, program_id);
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to_init.BindRasterizer(rasterizer);
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rasterizer->InitializeChannel(to_init);
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}
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void InitAddressSpace(Tegra::MemoryManager& memory_manager) {
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memory_manager.BindRasterizer(rasterizer);
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}
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void ReleaseChannel(Control::ChannelState& to_release) {
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UNIMPLEMENTED();
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}
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// ... (previous implementation remains the same)
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/// Binds a renderer to the GPU.
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void BindRenderer(std::unique_ptr<VideoCore::RendererBase> renderer_) {
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renderer = std::move(renderer_);
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rasterizer = renderer->ReadRasterizer();
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host1x.MemoryManager().BindInterface(rasterizer);
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host1x.GMMU().BindRasterizer(rasterizer);
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rasterizer = std::make_unique<VideoCore::OptimizedRasterizer>(system, gpu);
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host1x.MemoryManager().BindInterface(rasterizer.get());
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host1x.GMMU().BindRasterizer(rasterizer.get());
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}
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/// Flush all current written commands into the host GPU for execution.
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void FlushCommands() {
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if (!command_buffer.empty()) {
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rasterizer->ExecuteCommands(command_buffer);
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command_buffer.clear();
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}
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}
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/// Synchronizes CPU writes with Host GPU memory.
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void InvalidateGPUCache() {
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rasterizer->InvalidateGPUCache();
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}
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/// Signal the ending of command list.
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void OnCommandListEnd() {
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rasterizer->ReleaseFences(false);
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Settings::UpdateGPUAccuracy();
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}
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/// Request a host GPU memory flush from the CPU.
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u64 RequestSyncOperation(std::function<void()>&& action) {
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std::unique_lock lck{sync_request_mutex};
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const u64 fence = ++last_sync_fence;
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sync_requests.emplace_back(std::move(action), fence);
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return fence;
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}
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/// Obtains current flush request fence id.
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[[nodiscard]] u64 CurrentSyncRequestFence() const {
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return current_sync_fence.load(std::memory_order_relaxed);
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}
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void WaitForSyncOperation(const u64 fence) {
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std::unique_lock lck{sync_request_mutex};
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sync_request_cv.wait(lck, [this, fence] { return CurrentSyncRequestFence() >= fence; });
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}
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/// Tick pending requests within the GPU.
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void TickWork() {
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std::unique_lock lck{sync_request_mutex};
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while (!sync_requests.empty()) {
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auto& request = sync_requests.front();
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sync_request_mutex.unlock();
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request.first();
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current_sync_fence.fetch_add(1, std::memory_order_release);
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sync_request_mutex.lock();
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sync_requests.pop_front();
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sync_request_cv.notify_all();
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}
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}
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/// Returns a reference to the Maxwell3D GPU engine.
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[[nodiscard]] Engines::Maxwell3D& Maxwell3D() {
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ASSERT(current_channel);
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return *current_channel->maxwell_3d;
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}
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/// Returns a const reference to the Maxwell3D GPU engine.
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[[nodiscard]] const Engines::Maxwell3D& Maxwell3D() const {
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ASSERT(current_channel);
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return *current_channel->maxwell_3d;
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}
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/// Returns a reference to the KeplerCompute GPU engine.
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[[nodiscard]] Engines::KeplerCompute& KeplerCompute() {
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ASSERT(current_channel);
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return *current_channel->kepler_compute;
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}
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/// Returns a reference to the KeplerCompute GPU engine.
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[[nodiscard]] const Engines::KeplerCompute& KeplerCompute() const {
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ASSERT(current_channel);
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return *current_channel->kepler_compute;
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}
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/// Returns a reference to the GPU DMA pusher.
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[[nodiscard]] Tegra::DmaPusher& DmaPusher() {
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ASSERT(current_channel);
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return *current_channel->dma_pusher;
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}
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/// Returns a const reference to the GPU DMA pusher.
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[[nodiscard]] const Tegra::DmaPusher& DmaPusher() const {
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ASSERT(current_channel);
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return *current_channel->dma_pusher;
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}
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/// Returns a reference to the underlying renderer.
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[[nodiscard]] VideoCore::RendererBase& Renderer() {
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return *renderer;
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}
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/// Returns a const reference to the underlying renderer.
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[[nodiscard]] const VideoCore::RendererBase& Renderer() const {
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return *renderer;
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}
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/// Returns a reference to the shader notifier.
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[[nodiscard]] VideoCore::ShaderNotify& ShaderNotify() {
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return *shader_notify;
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}
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/// Returns a const reference to the shader notifier.
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[[nodiscard]] const VideoCore::ShaderNotify& ShaderNotify() const {
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return *shader_notify;
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}
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[[nodiscard]] u64 GetTicks() const {
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u64 gpu_tick = system.CoreTiming().GetGPUTicks();
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if (Settings::values.use_fast_gpu_time.GetValue()) {
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gpu_tick /= 256;
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}
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return gpu_tick;
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}
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[[nodiscard]] bool IsAsync() const {
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return is_async;
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}
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[[nodiscard]] bool UseNvdec() const {
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return use_nvdec;
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}
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void RendererFrameEndNotify() {
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system.GetPerfStats().EndGameFrame();
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}
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/// Performs any additional setup necessary in order to begin GPU emulation.
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/// This can be used to launch any necessary threads and register any necessary
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/// core timing events.
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void Start() {
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gpu_thread.StartThread(*renderer, renderer->Context(), *scheduler);
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}
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void NotifyShutdown() {
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std::unique_lock lk{sync_mutex};
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shutting_down.store(true, std::memory_order::relaxed);
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sync_cv.notify_all();
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}
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/// Obtain the CPU Context
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void ObtainContext() {
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if (!cpu_context) {
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cpu_context = renderer->GetRenderWindow().CreateSharedContext();
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}
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cpu_context->MakeCurrent();
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}
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/// Release the CPU Context
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void ReleaseContext() {
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cpu_context->DoneCurrent();
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}
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/// Push GPU command entries to be processed
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void PushGPUEntries(s32 channel, Tegra::CommandList&& entries) {
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gpu_thread.SubmitList(channel, std::move(entries));
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}
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/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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void FlushRegion(DAddr addr, u64 size) {
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rasterizer->FlushRegion(addr, size);
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}
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VideoCore::RasterizerDownloadArea OnCPURead(DAddr addr, u64 size) {
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auto raster_area = rasterizer->GetFlushArea(addr, size);
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if (raster_area.preemtive) {
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return raster_area;
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}
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raster_area.preemtive = true;
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const u64 fence = RequestSyncOperation([this, &raster_area]() {
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rasterizer->FlushRegion(raster_area.start_address,
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raster_area.end_address - raster_area.start_address);
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});
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gpu_thread.TickGPU();
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WaitForSyncOperation(fence);
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return raster_area;
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}
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/// Notify rasterizer that any caches of the specified region should be invalidated
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void InvalidateRegion(DAddr addr, u64 size) {
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rasterizer->InvalidateRegion(addr, size);
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}
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bool OnCPUWrite(DAddr addr, u64 size) {
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return rasterizer->OnCPUWrite(addr, size);
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}
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/// Notify rasterizer that any caches of the specified region should be flushed and invalidated
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void FlushAndInvalidateRegion(DAddr addr, u64 size) {
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rasterizer->FlushAndInvalidateRegion(addr, size);
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}
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// ... (rest of the implementation remains the same)
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GPU& gpu;
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Core::System& system;
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Host1x::Host1x& host1x;
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std::unique_ptr<VideoCore::RendererBase> renderer;
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VideoCore::RasterizerInterface* rasterizer = nullptr;
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std::unique_ptr<VideoCore::OptimizedRasterizer> rasterizer;
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const bool use_nvdec;
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s32 new_channel_id{1};
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/// Shader build notifier
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std::unique_ptr<VideoCore::ShaderNotify> shader_notify;
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/// When true, we are about to shut down emulation session, so terminate outstanding tasks
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std::atomic_bool shutting_down{};
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std::mutex sync_mutex;
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std::mutex device_mutex;
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std::condition_variable sync_cv;
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std::list<std::pair<std::function<void()>, u64>> sync_requests;
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std::atomic<u64> current_sync_fence{};
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u64 last_sync_fence{};
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std::mutex sync_request_mutex;
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std::condition_variable sync_request_cv;
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const bool is_async;
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VideoCommon::GPUThread::ThreadManager gpu_thread;
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std::unique_ptr<Core::Frontend::GraphicsContext> cpu_context;
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std::unique_ptr<Tegra::Control::Scheduler> scheduler;
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std::unordered_map<s32, std::shared_ptr<Tegra::Control::ChannelState>> channels;
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Tegra::Control::ChannelState* current_channel;
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s32 bound_channel{-1};
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std::unique_ptr<Tegra::MemoryManager> memory_manager;
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std::vector<u32> command_buffer;
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std::unique_ptr<FenceManager> fence_manager;
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static constexpr size_t COMMAND_BUFFER_SIZE = 4 * 1024 * 1024;
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// ... (rest of the member variables remain the same)
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};
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// ... (rest of the implementation remains the same)
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@ -12,6 +12,7 @@
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#include "core/frontend/framebuffer_layout.h"
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#include "video_core/gpu.h"
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#include "video_core/rasterizer_interface.h"
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#include "video_core/optimized_rasterizer.h"
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namespace Core::Frontend {
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class EmuWindow;
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@ -45,6 +46,8 @@ public:
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[[nodiscard]] virtual RasterizerInterface* ReadRasterizer() = 0;
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[[nodiscard]] virtual OptimizedRasterizer* ReadOptimizedRasterizer() = 0;
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[[nodiscard]] virtual std::string GetDeviceVendor() const = 0;
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// Getter/setter functions:
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