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https://git.suyu.dev/suyu/suyu
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glsl: implement phi nodes
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parent
3d9ecbe998
commit
e99d01ff53
4 changed files with 54 additions and 20 deletions
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@ -2,6 +2,7 @@
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <ranges>
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#include <string>
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#include <tuple>
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@ -9,6 +10,7 @@
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#include "shader_recompiler/backend/glsl/emit_context.h"
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#include "shader_recompiler/backend/glsl/emit_glsl.h"
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#include "shader_recompiler/backend/glsl/emit_glsl_instructions.h"
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#include "shader_recompiler/frontend/ir/ir_emitter.h"
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#include "shader_recompiler/frontend/ir/program.h"
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#include "shader_recompiler/profile.h"
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@ -96,6 +98,22 @@ void EmitInst(EmitContext& ctx, IR::Inst* inst) {
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throw LogicError("Invalid opcode {}", inst->GetOpcode());
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}
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void Precolor(EmitContext& ctx, const IR::Program& program) {
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for (IR::Block* const block : program.blocks) {
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for (IR::Inst& phi : block->Instructions() | std::views::take_while(IR::IsPhi)) {
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ctx.Add("{};", ctx.reg_alloc.Define(phi, phi.Arg(0).Type()));
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const size_t num_args{phi.NumArgs()};
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for (size_t i = 0; i < num_args; ++i) {
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IR::IREmitter{*phi.PhiBlock(i)}.PhiMove(phi, phi.Arg(i));
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}
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// Add reference to the phi node on the phi predecessor to avoid overwritting it
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for (size_t i = 0; i < num_args; ++i) {
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IR::IREmitter{*phi.PhiBlock(i)}.Reference(IR::Value{&phi});
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}
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}
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}
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}
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void EmitCode(EmitContext& ctx, const IR::Program& program) {
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for (const IR::AbstractSyntaxNode& node : program.syntax_list) {
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switch (node.type) {
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@ -105,37 +123,31 @@ void EmitCode(EmitContext& ctx, const IR::Program& program) {
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}
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break;
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case IR::AbstractSyntaxNode::Type::If:
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ctx.Add("if (");
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ctx.Add("if ({}){{", ctx.reg_alloc.Consume(node.data.if_node.cond));
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break;
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case IR::AbstractSyntaxNode::Type::EndIf:
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ctx.Add("){{");
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break;
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case IR::AbstractSyntaxNode::Type::Loop:
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ctx.Add("while (");
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break;
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case IR::AbstractSyntaxNode::Type::Repeat:
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if (node.data.repeat.cond.IsImmediate()) {
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if (node.data.repeat.cond.U1()) {
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ctx.Add("ENDREP;");
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} else {
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ctx.Add("BRK;"
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"ENDREP;");
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}
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}
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ctx.Add("}}");
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break;
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case IR::AbstractSyntaxNode::Type::Break:
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if (node.data.break_node.cond.IsImmediate()) {
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if (node.data.break_node.cond.U1()) {
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ctx.Add("break;");
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}
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} else {
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// TODO: implement this
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ctx.Add("MOV.S.CC RC,{};"
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"BRK (NE.x);",
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0);
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}
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break;
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case IR::AbstractSyntaxNode::Type::Return:
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case IR::AbstractSyntaxNode::Type::Unreachable:
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ctx.Add("return;");
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ctx.Add("return;\n}}");
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break;
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case IR::AbstractSyntaxNode::Type::Loop:
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case IR::AbstractSyntaxNode::Type::Repeat:
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default:
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ctx.Add("UNAHNDLED {}", node.type);
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throw NotImplementedException("{}", node.type);
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break;
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}
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}
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@ -146,8 +158,8 @@ void EmitCode(EmitContext& ctx, const IR::Program& program) {
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std::string EmitGLSL(const Profile& profile, const RuntimeInfo&, IR::Program& program,
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Bindings& bindings) {
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EmitContext ctx{program, bindings, profile};
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Precolor(ctx, program);
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EmitCode(ctx, program);
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ctx.code += "}";
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return ctx.code;
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}
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@ -28,11 +28,14 @@ void EmitVoid(EmitContext& ctx) {
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}
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void EmitReference(EmitContext&) {
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NotImplemented();
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// NotImplemented();
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}
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void EmitPhiMove(EmitContext& ctx, const IR::Value& phi, const IR::Value& value) {
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NotImplemented();
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if (phi == value) {
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return;
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}
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ctx.Add("{}={};", ctx.reg_alloc.Consume(phi), ctx.reg_alloc.Consume(value));
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}
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void EmitBranch(EmitContext& ctx, std::string_view label) {
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@ -74,6 +74,23 @@ std::string RegAlloc::Define(IR::Inst& inst, Type type) {
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return type_str + Representation(id);
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}
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std::string RegAlloc::Define(IR::Inst& inst, IR::Type type) {
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switch (type) {
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case IR::Type::U1:
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return Define(inst, Type::U1);
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case IR::Type::U32:
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return Define(inst, Type::U32);
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case IR::Type::F32:
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return Define(inst, Type::F32);
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case IR::Type::U64:
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return Define(inst, Type::U64);
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case IR::Type::F64:
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return Define(inst, Type::F64);
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default:
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throw NotImplementedException("IR type {}", type);
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}
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}
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std::string RegAlloc::Consume(const IR::Value& value) {
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return value.IsImmediate() ? MakeImm(value) : Consume(*value.InstRecursive());
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}
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@ -12,6 +12,7 @@
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namespace Shader::IR {
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class Inst;
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class Value;
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enum class Type;
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} // namespace Shader::IR
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namespace Shader::Backend::GLSL {
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@ -50,6 +51,7 @@ class RegAlloc {
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public:
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std::string Define(IR::Inst& inst);
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std::string Define(IR::Inst& inst, Type type);
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std::string Define(IR::Inst& inst, IR::Type type);
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std::string Consume(const IR::Value& value);
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